FDP7N50_0704 [FAIRCHILD]

500V N-Channel MOSFET; 500V N沟道MOSFET
FDP7N50_0704
型号: FDP7N50_0704
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

500V N-Channel MOSFET
500V N沟道MOSFET

文件: 总10页 (文件大小:472K)
中文:  中文翻译
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April 2007  
TM  
UniFET  
FDP7N50/FDPF7N50  
500V N-Channel MOSFET  
Features  
Description  
7A, 500V, RDS(on) = 0.9Ω @VGS = 10 V  
Low gate charge ( typical 12.8 nC)  
Low Crss ( typical 9 pF)  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary, planar  
stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the avalanche  
and commutation mode. These devices are well suited for high  
efficient switched mode power supplies and active power factor  
correction.  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
G
TO-220F  
TO-220  
FDP Series  
G D  
S
G
D S  
FDPF Series  
S
Absolute Maximum Ratings  
Symbol  
Parameter  
FDP7N50  
FDPF7N50  
Unit  
VDSS  
Drain-Source Voltage  
Drain Current  
500  
V
ID  
- Continuous (TC = 25°C)  
- Continuous (TC = 100°C)  
7
4.2  
7 *  
4.2 *  
A
A
(Note 1)  
(Note 2)  
IDM  
Drain Current  
- Pulsed  
28  
28 *  
A
V
VGSS  
EAS  
IAR  
Gate-Source voltage  
±30  
270  
7
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
(Note 1)  
(Note 1)  
(Note 3)  
EAR  
dv/dt  
PD  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
8.9  
4.5  
mJ  
V/ns  
Power Dissipation  
(TC = 25°C)  
- Derate above 25°C  
89  
0.71  
31.3  
0.25  
W
W/°C  
TJ, TSTG  
TL  
Operating and Storage Temperature Range  
-55 to +150  
300  
°C  
Maximum Lead Temperature for Soldering Purpose,  
1/8” from Case for 5 Seconds  
°C  
* Drain current limited by maximum junction temperature.  
Thermal Characteristics  
Symbol  
Parameter  
FDP7N50  
FDPF7N50  
Unit  
°C/W  
°C/W  
RθJC  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Case-to-Sink Typ.  
Thermal Resistance, Junction-to-Ambient  
1.4  
0.5  
4.0  
--  
RθCS  
RθJA  
62.5  
62.5  
°C/W  
©2007 Fairchild Semiconductor Corporation  
FDP7N50/FDPF7N50 REV. B  
1
www.fairchildsemi.com  
Package Marking and Ordering Information  
Device Marking  
FDP7N50  
Device  
FDP7N50  
FDPF7N50  
Package  
TO-220  
Reel Size  
Tape Width  
Quantity  
--  
--  
--  
--  
50  
50  
FDPF7N50  
TO-220F  
Electrical Characteristics  
T
= 25°C unless otherwise noted  
C
Symbol  
Parameter  
Conditions  
Min. Typ. Max Units  
Off Characteristics  
BVDSS  
Drain-Source Breakdown Voltage  
VGS = 0V, ID = 250μA  
500  
--  
--  
--  
--  
V
ΔBVDSS  
Breakdown Voltage Temperature  
Coefficient  
ID = 250μA, Referenced to 25°C  
0.5  
V/°C  
/
ΔTJ  
IDSS  
Zero Gate Voltage Drain Current  
VDS = 500V, VGS = 0V  
VDS = 400V, TC = 125°C  
--  
--  
--  
--  
1
10  
μA  
μA  
IGSSF  
IGSSR  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
VGS = 30V, VDS = 0V  
VGS = -30V, VDS = 0V  
--  
--  
--  
--  
100  
nA  
nA  
-100  
On Characteristics  
VGS(th) Gate Threshold Voltage  
RDS(on)  
VDS = VGS, ID = 250μA  
VGS = 10V, ID = 3.5A  
VDS = 40V, ID = 3.5A  
3.0  
--  
--  
5.0  
0.9  
--  
V
Ω
S
Static Drain-Source  
On-Resistance  
0.76  
2.5  
gFS  
Forward Transconductance  
(Note 4)  
--  
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Input Capacitance  
VDS = 25V, VGS = 0V,  
f = 1.0MHz  
--  
--  
--  
720  
95  
9
940  
190  
13.5  
pF  
pF  
pF  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics  
td(on) Turn-On Delay Time  
tr  
td(off)  
tf  
VDD = 250V, ID = 7A  
RG = 25Ω  
--  
--  
--  
--  
--  
--  
--  
6
55  
20  
120  
60  
ns  
ns  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
25  
ns  
(Note 4, 5)  
(Note 4, 5)  
35  
80  
ns  
Qg  
VDS = 400V, ID = 7A  
VGS = 10V  
12.8  
3.7  
5.8  
16.6  
--  
nC  
nC  
nC  
Qgs  
Qgd  
--  
Drain-Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain-Source Diode Forward Current  
Maximum Pulsed Drain-Source Diode Forward Current  
--  
--  
--  
--  
--  
--  
--  
7
28  
1.4  
--  
A
A
ISM  
VSD  
trr  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
VGS = 0V, IS = 7A  
--  
V
VGS = 0V, IS = 7A  
275  
0.04  
ns  
μC  
dIF/dt =100A/μs  
(Note 4)  
Qrr  
Reverse Recovery Charge  
--  
NOTES:  
1. Repetitive Rating: Pulse width limited by maximum junction temperature  
2. I = 7A, V = 50V, L=10mH, R = 25Ω, Starting T = 25°C  
AS  
DD  
G
J
3. I 7A, di/dt 200A/μs, V BV  
, Starting T = 25°C  
SD  
DD  
DSS  
J
4. Pulse Test: Pulse width 300μs, Duty Cycle 2%  
5. Essentially Independent of Operating Temperature Typical Characteristics  
2
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Typical Performance Characteristics  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
20  
VGS  
Top :  
10.0 V  
8.0 V  
7.5 V  
7.0 V  
6.5 V  
6.0 V  
5.5 V  
101  
15  
10  
5
150oC  
Bottom : 5.0 V  
100  
10-1  
10-2  
25oC  
-55oC  
* Notes :  
1. 250μs Pulse Test  
2. TC = 25oC  
* Note:  
1. VDS = 40V  
2. 250μs Pulse Test  
0
0
10  
20  
30  
40  
50  
2
4
6
8
10  
VDS, Drain-Source Voltage [V]  
VGS , Gate-Source Voltage [V]  
Figure 3. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperature  
2.5  
101  
2.0  
1.5  
1.0  
0.5  
0.0  
VGS = 10V  
100  
VGS = 20V  
150oC  
25oC  
* Notes :  
1. VGS = 0V  
* Note : TJ = 25oC  
15  
2. 250μs Pulse Test  
10-1  
0.2  
0
5
10  
20  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
VSD , Source-Drain Voltage [V]  
ID, Drain Current [A]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
12  
10  
8
Ciss = Cgs + Cgd (Cds = shorted)  
Coss = Cds + Cgd  
VDS = 100V  
VDS = 250V  
Crss = Cgd  
1000  
VDS = 400V  
Ciss  
Coss  
6
100  
Crss  
4
* Notes :  
1. VGS = 0 V  
2. f = 1 MHz  
2
10  
* Note : ID = 7 A  
0
100  
101  
0
5
10  
15  
QG, Total Gate Charge [nC]  
VDS, Drain-Source Voltage [V]  
3
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Typical Performance Characteristics (Continued)  
Figure 7. Breakdown Voltage Variation  
vs. Temperature  
Figure 8. On-Resistance Variation  
vs. Temperature  
3.0  
1.2  
1.1  
1.0  
0.9  
0.8  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
*Notes :  
1. VGS = 0 V  
Notes :  
1. VGS = 10 V  
2. ID = 250 μA  
2. ID = 3.5 A  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
TJ, Junction Temperature [oC]  
TJ, Junction Temperature [oC]  
Figure 9-1. Maximum Safe Operating Area  
- FDP7N50  
Figure 9-2. Maximum Safe Operating Area  
- FDPF7N50  
10 us  
10 us  
101  
101  
100 us  
100 us  
1 ms  
10 ms  
100 ms  
1 ms  
10 ms  
100 ms  
100  
10-1  
10-2  
Operation in This Area  
is Limited by R DS(on)  
100  
10-1  
10-2  
Operation in This Area  
is Limited by R DS(on)  
DC  
DC  
* Notes :  
* Notes :  
1. TC = 25 o  
2. TJ = 150 o  
1. TC = 25 o  
C
C
2. TJ = 150 o  
C
C
3. Single Pulse  
3. Single Pulse  
100  
101  
102  
100  
101  
102  
VDS, Drain-Source Voltage [V]  
VDS, Drain-Source Voltage [V]  
Figure 10. Maximum Drain Current Vs. Case Temperature  
8
6
4
2
0
25  
50  
75  
100  
125  
150  
TC, Case Temperature [oC]  
4
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Figure 11-1. Transient Thermal Response Curve - FDP7N50  
100  
D=0.5  
0.2  
0.1  
10-1  
PDM  
0.05  
t1  
0.02  
0.01  
t2  
*
N otes :  
1. Zθ JC (t)  
2. D uty Factor, D =t1/t2  
=
1.4 oC /W M ax.  
single pulse  
10-4  
3. TJM  
-
TC  
=
PDM  
*
Zθ JC (t)  
10-2  
10-5  
10-3  
10-2  
10-1  
100  
101  
t1, Square W ave Pulse Duration [sec]  
Figure 11-2. Transient Thermal Response Curve - FDPF7N50  
D=0.5  
100  
0.2  
0.1  
0.05  
PDM  
10-1  
0.02  
t1  
0.01  
t2  
*
N otes  
1. ZθJC(t)  
2. D uty Factor, D =t1/t2  
3. TJM TC PDM θJC(t)  
:
=
4.0 oC /W M ax.  
-
=
* Z  
single pulse  
10-4  
10-2  
10-5  
10-3  
10-2  
10-1  
100  
101  
t1, Square W ave Pulse Duration [sec]  
5
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Gate Charge Test Circuit & Waveform  
Resistive Switching Test Circuit & Waveforms  
Unclamped Inductive Switching Test Circuit & Waveforms  
6
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
7
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Mechanical Dimensions  
TO-220  
Dimensions in Millimeters  
8
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
Mechanical Dimensions (Continued)  
TO-220F  
2.54 ±0.20  
10.16 ±0.20  
ø3.18 ±0.10  
(7.00)  
(0.70)  
(1.00x45°)  
MAX1.47  
0.80 ±0.10  
#1  
0.35 ±0.10  
+0.10  
–0.05  
0.50  
2.76 ±0.20  
2.54TYP  
2.54TYP  
[2.54 ±0.20]  
[2.54 ±0.20]  
9.40 ±0.20  
Dimensions in Millimeters  
9
www.fairchildsemi.com  
FDP7N50/FDPF7N50 REV. B  
TRADEMARKS  
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not  
intended to be an exhaustive list of all such trademarks.  
ACEx®  
Power247®  
Green FPS  
Green FPSe-Series™  
GTO™  
i-Lo™  
IntelliMAX™  
ISOPLANAR™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
SuperSOT-8  
POWEREDGE®  
Power-SPM™  
PowerTrench®  
Programmable Active Droop™  
QFET®  
Build it Now™  
CorePLUS™  
CROSSVOLT™  
CTL™  
SyncFET™  
The Power Franchise®  
TinyBoost™  
TinyBuck™  
TinyLogic®  
TINYOPTO™  
TinyPower™  
TinyPWM™  
TinyWire™  
μSerDes™  
UHC®  
Current Transfer Logic™  
EcoSPARK®  
QS™  
®
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
SMART START™  
SPM®  
STEALTH™  
SuperFET™  
Fairchild®  
Fairchild Semiconductor®  
FACT Quiet Series™  
FACT®  
MicroPak™  
MillerDrive™  
Motion-SPM™  
OPTOLOGIC®  
FAST®  
OPTOPLANAR®  
FastvCore™  
®
SuperSOT-3  
SuperSOT-6  
UniFET™  
VCX™  
FPS™  
FRFET®  
PDP-SPM™  
Power220®  
Global Power ResourceSM  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS  
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,  
which, (a) are intended for surgical implant into the body or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
device, or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In Design  
This datasheet contains the design specifications for product  
development. Specifications may change in any manner without notice.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains preliminary data; supplementary data will be  
published at a later date. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve design.  
No Identification Needed  
Obsolete  
This datasheet contains final specifications. Fairchild Semiconductor  
reserves the right to make changes at any time without notice to improve  
design.  
This datasheet contains specifications on a product that has been  
discontinued by Fairchild Semiconductor. The datasheet is printed for  
reference information only.  
Rev. I31  
© 2007 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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