FDS8333C [FAIRCHILD]

30V N & P-Channel PowerTrench MOSFETs; 30V N' P沟道PowerTrench MOSFET的


型号：	FDS8333C
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	30V N & P-Channel PowerTrench MOSFETs 30V N' P沟道PowerTrench MOSFET的晶体晶体管功率场效应晶体管开关脉冲光电二极管
文件：	总8页 (文件大小：134K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

August 2002

FDS8333C

30V N & P-Channel PowerTrench^ÒMOSFETs

General Description

Features

These

P-Channel MOSFETs are

Q1 4.1 A, 30V. R_DS(ON)= 80 mW @ V_GS= 10 V

R_DS(ON)= 130 mW @ V_GS= 4.5 V

produced using Fairchild Semiconductor’s

advanced PowerTrench process that has been

especially tailored to minimize on-state

resistance and yet maintain superior switching

performance.

Q2 –3.4 A, 30V. R_DS(ON)= 130 mW @ V_GS= –10 V

R_DS(ON)= 200 mW @ V_GS= –4.5 V

These devices are well suited for low voltage

and battery powered applications where low

in-line power loss and fast switching are

required.

Low gate charge

High performance trench technology for extremely

low R_DS(ON)

High power and handling capability in a widely used

surface mount package.

SO-8

Pin 1 SO-8

Absolute Maximum Ratings T_A=25^oC unless otherwise noted

Symbol

V_DSS

Parameter

Drain-Source Voltage

Units

–30

±20

–3.4

–20

V_GSS

I_D

Gate-Source Voltage

±16

4.1

Drain Current – Continuous

– Pulsed

(Note 1a)

Power Dissipation for Dual Operation

1.6

P_D

Power Dissipation for Single Operation

(Note 1a)

(Note 1b)

(Note 1c)

°C

0.9

T_J, T_STG

Operating and Storage Junction Temperature Range

–55 to +150

Thermal Characteristics

°C/W

R_qJA

Thermal Resistance, Junction-to-Ambient

(Note 1a)

(Note 1)

R_qJC

Thermal Resistance, Junction-to-Case

Package Marking and Ordering Information

Device Marking

Device

Reel Size

Tape width

Quantity

FDS8333C

7’’

12mm

2500 units

Ó2002 Fairchild Semiconductor Corporation

FDS8333C Rev C (W)

Electrical Characteristics

T_A= 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min Typ Max Units

Off Characteristics

–30

V_GS= 0 V, I_D= 250 mA

V_GS= 0 V, I_D= –250 mA

I_D= 250 mA,Ref. to 25°C

I_D= –250 mA,Ref. to 25°C

BV_DSS

Drain–Source Breakdown Voltage

Breakdown Voltage Temperature

Coefficient

–22

DBVDSS

DT_J

mV/°C

V_DS

24 V, V_GS= 0 V

–1

±100

I_DSS

Zero Gate Voltage Drain Current

V_DS= –24 V, V_GS= 0 V

V_GS= ± 16 V, V_DS= 0 V

V_GS= ± 20V , V_DS= 0 V

I_GSSF/I_GSSRGate–Body Leakage, Forward

I_GSSF/I_GSSRGate–Body Leakage, Reverse

On Characteristics

(Note 2)

V_GS(th)

Gate Threshold Voltage

V_DS= V_GS, I_D= 250 mA

V_DS= V_GS, I_D= –250 mA

1.7

–1

–1.8

–3

Gate Threshold Voltage

Temperature Coefficient

–4.2

3.7

DVGS(th)

DT_J

I_D= 250 mA,Ref. To 25°C

I_D= –250 mA,Ref. to 25°C

V_GS= 10 V, I_D= 4.1 A

V_GS= 4.5 V, I_D= 3.2 A

mV/°C

103

130

145

R_DS(on)

Static Drain–Source

On–Resistance

V_GS= 10 V, I_D= 4.1 A T_J=125°C

V_GS= –10 V, I_D= –3.4 A

V_GS= – 4.5 V, I_D= –2.5 A

V_GS= –10V,I_D= –3.4A, T_J=125°C

105

167

147

130

200

220

V_GS

V_GS= –10 V, V_DS= –5 V

V_DS= 5 V I_D= 4.1 A

= 10 V, V_DS= 5 V

I_D(on)

On–State Drain Current

–5

g_FS

Forward Transconductance

V_DS= –5 V I_D= –3.4A

Dynamic Characteristics

V_DS=10 V, V _GS= 0 V, f=1.0MHz

V_DS=–10 V, V _GS= 0 V, f=1.0MHz

V_DS=10 V, V _GS= 0 V, f=1.0MHz

282

185

Input Capacitance

iss

C_oss

Output Capacitance

V_DS=–10 V, V _GS= 0 V, f=1.0MHz

V_DS=10 V, V _GS= 0 V, f=1.0MHz

V_DS=–10 V, V _GS= 0 V, f=1.0MHz

V_GS= 15 mV, f=1.0MHz

Reverse Transfer Capacitance Q1

rss

R_G

Gate Resistance

2.3

–9.6

V_GS=–15 mV, f=1.0MHz

Switching Characteristics (Note 2)

4.5

t_d(on)

t_r

t_d(off)

t_f

Turn–On Delay Time

Turn–On Rise Time

Turn–Off Delay Time

Turn–Off Fall Time

Total Gate Charge

Gate–Source Charge

Gate–Drain Charge

For Q1:

Q2 V_DS=10 V, I_DS= 1 A

V_GS= 4.5 V, R_GEN= 6 W

1.5

For Q2:

V_DS=–10 V, I_DS= –1 A

V_GS= –4.5 V, R_GEN= 6 W

4.7

4.1

0.9

0.8

0.6

0.4

6.6

5.7

Q_g

For Q1:

Q2 V_DS=10 V, I_DS= 4.1 A

V_GS= 4.5 V, R_GEN= 6 W

Q_gs

Q_gd

For Q2:

V_DS=–10 V, I_DS= –3.4 A

V_GS= –4.5 V,

FDS8333C Rev C (W)

Electrical Characteristics

T_A= 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min Typ Max Units

Drain–Source Diode Characteristics and Maximum Ratings

V_GS= 0 V, I_S= 1.3 A

(Note 2)

V_SD

Drain–Source Diode Forward Q1

0.8

1.2

Voltage

V_GS= 0 V, I_S= –1.3 A

(Note 2)

–1.2

I_F= 4.1 A, d_iF/d_t= 100 A/µs

I_F= –3.4 A, d_iF/d_t= 100 A/µs

I_F= 4.1 A, d_iF/d_t= 100 A/µs

I_F= –3.4 A, d_iF/d_t= 100 A/µs

t_rr

Diode Reverse Recovery

Time

16.3

14.5

26.7

21.1

Q_rr

Diode Reverse Recovery

Charge

Notes:

1. R_qJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

the drain pins. R_qJCis guaranteed by design while R_qCAis determined by the user's board design.

78°C/W when

mounted on a

0.5in pad of 2

125°C/W when

mounted on a

0.02 in pad of

135°C/W when

mounted on a

minimum pad.

oz copper

2 oz copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300ms, Duty Cycle < 2.0%

FDS8333C Rev C (W)

Typical Characteristics: N-Channel

1.8

1.6

1.4

1.2

V_GS= 10V

6.0V

V_GS= 3.0V

4.5V

3.5V

3.0V

4.0V

4.5V

6.0V

10V

0.8

V_DS, DRAIN-SOURCE VOLTAGE (V)

I_D, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics.

Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

0.25

0.2

1.6

1.4

1.2

I_D= 4.1A

I_D= 2 A

V_GS= 10V

0.15

0.1

T_A= 125^oC

T_A= 25^oC

0.8

0.05

0.6

-50

-25

100

125

150

T_J, JUNCTION TEMPERATURE (^oC)

V_GS, GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation

withTemperature.

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

100

T_A=-55^oC

V_GS= 0V

25^oC

125^oC

V_DS=5V

T_A= 125^oC

25^oC

0.1

-55^oC

0.01

0.001

0.0001

1.5

2.5

3.5

0.2

0.4

0.6

0.8

1.2

V_GS, GATE TO SOURCE VOLTAGE (V)

V_SD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics.

Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS8333C Rev C (W)

Typical Characteristics: N-Channel (continued)

400

300

200

100

V_DS= 5V

f = 1MHz

V_GS= 0 V

I_D= 4.1A

10V

15V

C_ISS

C_OSS

C_RSS

Q_g, GATE CHARGE (nC)

VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics.

Figure 8. Capacitance Characteristics.

100

SINGLE PULSE

R_q_JA= 135°C/W

T_A= 25°C

R_DS(ON)LIMIT

100ms

1ms

10ms

100ms

10s

V_GS= 10V

SINGLE PULSE

_qJA= 135^oC/W

T_A= 25^oC

0.1

0.01

0.001

0.01

0.1

100

1000

0.1

100

t₁, TIME (sec)

V_DS, DRAIN-SOURCE VOLTAGE (V)

Figure 9. Maximum Safe Operating Area.

Figure 10. Single Pulse Maximum

Power Dissipation.

FDS8333C Rev C (W)

Typical Characteristics: P-Channel

2.5

V_GS= -10V

-6.0V

V_GS= -3.5V

-4.5V

-4.0V

-4.5V

-5.0V

1.5

-3.5V

-6.0V

-10V

0.5

-I_D, DRAIN CURRENT (A)

-V_DS, DRAIN-SOURCE VOLTAGE (V)

Figure 11. On-Region Characteristics.

Figure 12. On-Resistance Variation with

Drain Current and Gate Voltage.

0.4

0.3

0.2

0.1

1.6

1.4

1.2

I_D= -3.4A

V_GS=-10V

I_D= -1.7A

T_A= 125^oC

T_A= 25^oC

0.8

0.6

-50

-25

100

125

150

T_J, JUNCTION TEMPERATURE (^oC)

-V_GS, GATE TO SOURCE VOLTAGE (V)

Figure 13. On-Resistance Variation

withTemperature.

Figure 14. On-Resistance Variation with

Gate-to-Source Voltage.

V_GS= 0V

25^oC

V_DS= -5V

T_A= -55^oC

125^oC

T_A= 125^oC

0.1

0.01

25^oC

-55^oC

0.001

0.0001

1.5

2.5

3.5

4.5

0.2

0.4

0.6

0.8

1.2

1.4

-V_GS, GATE TO SOURCE VOLTAGE (V)

-VSD , BODY DIODE FORWARD VOLTAGE (V)

Figure 15. Transfer Characteristics.

Figure 16. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS8333C Rev C (W)

Typical Characteristics: P-Channel (continued)

300

250

200

150

100

f = 1MHz

V_GS= 0 V

I_D= -3.4A

-10V

V_DS= -5V

C_ISS

-15V

C_OSS

C_RSS

Q_g, GATE CHARGE (nC)

-V_DS, DRAIN TO SOURCE VOLTAGE (V)

Figure 17. Gate Charge Characteristics.

Figure 18. Capacitance Characteristics.

100

SINGLE PULSE

100ms

R_{q JA}= 135°C/W

R_DS(ON)LIMIT

1ms

10ms

100ms

T_A= 25°C

0.1

10s

V_GS= -10V

SINGLE PULSE

_qJA= 135^oC/W

T_A= 25^oC

0.01

0.001

0.01

0.1

100

1000

0.1

100

t₁, TIME (sec)

-V_DS, DRAIN-SOURCE VOLTAGE (V)

Figure 19. Maximum Safe Operating Area.

Figure 20. Single Pulse Maximum

Power Dissipation.

D = 0.5

RqJA(t) = r(t) * RqJA

RqJA = 135^oC/W

0.2

0.1

P(pk)

0.05

0.02

0.01

t₂

SINGLE PULSE

0.01

TJ - TA = P * R JA(t)

Duty Cycle, D = t₁/ t₂

0.001

0.0001

0.001

0.01

0.1

100

1000

t₁, TIME (sec)

Figure 21. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c.

Transient thermal response will change depending on the circuit board design.

FDS8333C Rev C (W)

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx

PACMAN

POP

Power247

PowerTrench

QFET

SPM

Stealth

SuperSOT-3

SuperSOT-6

SuperSOT-8

SyncFET

ImpliedDisconnect

ISOPLANAR

LittleFET

MicroFET

MicroPak

MICROWIRE

MSX

FACT

ActiveArray

Bottomless

CoolFET

CROSSVOLT

DOME

EcoSPARK

E²CMOS^TM

EnSigna^TM

FACT Quiet Series

FAST

FASTr

FRFET

GlobalOptoisolator

GTO

HiSeC

I²C

QT Optoelectronics TinyLogic

Quiet Series

RapidConfigure

RapidConnect

TruTranslation

UHC

UltraFET

MSXPro

OCX

OCXPro

OPTOLOGIC

Across the board. Around the world.

The Power Franchise

ProgrammableActive Droop

SILENT SWITCHER VCX

SMARTSTART

OPTOPLANAR

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I1

FDS8333C [FAIRCHILD]

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