FI1031M [FAIRCHILD]

Line Driver, 4 Func, 4 Driver, PDSO16, 0.150 INCH, MS-012, SOIC-16;


型号：	FI1031M
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Line Driver, 4 Func, 4 Driver, PDSO16, 0.150 INCH, MS-012, SOIC-16 驱动光电二极管接口集成电路驱动器
文件：	总6页 (文件大小：194K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Preliminary

November 2000

Revised December 2000

FI1031

3.3V LVDS Quad High Speed Differential Driver

(Preliminary)

General Description

Features

■ Greater than 400Mbs data rate

This quad driver is designed for high speed interconnects

utilizing Low Voltage Differential Signaling (LVDS) technol-

ogy. The driver translates LVTTL signal levels to LVDS lev-

els with a typical differential output swing of 350mV which

provides low EMI at ultra low power dissipation even at

high frequencies. This device is ideal for high speed trans-

fer of clock and data.

■ 3.3V power supply operation

■ 0.4ns maximum differential pulse skew

■ 2.0ns maximum propagation delay

■ Low power dissipation

■ Power OFF protection

The FI1031 can be paired with its companion receiver, the

FI1032, or any other Fairchild LVDS receiver.

■ 100mV receiver input sensitivity

■ Meets or exceeds the TIA/EIA-644 LVDS standard

■ Pin compatible with equivalent RS-422 and LVPECL

devices

■ 16-Lead SOIC and TSSOP packages save space

Ordering Code:

Order Number Package Number

Package Description

FI1031M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

FI1031MTC

MTC16

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Function Table

Connection Diagram

Inputs

Outputs

Din

Dout+

Dout−

OPEN

H = HIGH Logic Level

X = Don’t Care

L = LOW Logic Level

Z = High Impedance

Pin Descriptions

Pin Name

Din1, Din2, Din3, Din4

Description

LVTTL Data Inputs

Dout1+, Dout2+, Dout3+, Dout4+ Non-Inverting Driver Outputs

Dout1−, Dout2−, Dout3−, Dout4− Inverting Driver Outputs

Driver Enable Pin

V_CC

GND

Inverting Driver Enable Pin

Power Supply

Ground

DS500507

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Preliminary

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions

Supply Voltage (V_CC

DC Input Voltage (V_IN

DC Input Voltage (V_OUT

Driver Short Circuit Current (I_OSD

)

−0.5V to +4.6V

−0.5V to +6V

−0.5V to 4.7V

Continuous

)

Supply Voltage (V_CC

Input Voltage (V_IN

Operating Temperature (T_A)

)

3.0V to 3.6V

0 to V_CC

)

−40°C to +85°C

Storage Temperature Range (T_STG

Max Junction Temperature (T_J)

Lead Temperature (T_L)

)

−65°C to +150°C

150°C

Note 1: The “Absolute Maximum Ratings”: are those values beyond which

damage to the device may occur. The databook specifications should be

met, without exception, to ensure that the system design is reliable over its

power supply, temperature and output/input loading variables. Fairchild

does not recommend operation of circuits outside databook specification.

(Soldering, 10 seconds)

260°C

≥ 8000V

≥ 600V

ESD (Human Body Model)

ESD (Machine Model)

DC Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified

Min

Typ

(Note 2)

350

Max

Symbol

V_OD

Parameter

Test Conditions

Units

Output Differential Voltage

V_ODMagnitude Change from

Differential LOW-to-HIGH

Offset Voltage

250

450

∆V_OD

_L= 100Ω, Driver Enabled,

V_OS

See Figure 1

1.125

1.25

1.375

∆V_OS

Offset Magnitude Change from

Differential LOW-to-HIGH

Power Off Output Current

Short Circuit Output Current

µA

I_OFF

I_OS

_CC= 0V, V_OUT= 0V or 3.6V

_OUT= 0V, Driver Enabled

_OD= 0V, Driver Enabled

±20

−6

±6

V_IH

V_IL

I_IN

Input HIGH Voltage

Input LOW Voltage

Input Current

2.0

V_CC

0.8

±20

GND

_IN= 0V or V_CC

µA

I_OZ

Disabled Output Leakage Current

EN = 0.8V, EN = 2.0V

±20

µA

_OUT= 0V or 4.7V

I_I(OFF)

V_IK

Power-OFF Input Current

Input Clamp Voltage

_CC= 0V, V_IN= 0V or 3.6V

µA

I_IK= −18 mA

−1.5

I_CC

Power Supply Current

No Load, V_IN= 0V or V_CC, Driver Enabled

R_L= 100 Ω, Driver Disabled

R_L= 100 Ω, V_IN= 0V or V_CC, Driver Enabled

C_IN

Input Capacitance

Output Capacitance

C_OUT

Note 2: All typical values are at T_A= 25°C and with V_CC= 3.3V.

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Preliminary

AC Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified

Min

Typ

Max

Symbol

t_PLHD

Parameter

Test Conditions

Units

(Note 3)

Differential Propagation Delay

LOW-to-HIGH

0.5

2.0

t_PHLD

Differential Propagation Delay

HIGH-to-LOW

t_TLHD

t_THLD

t_SK(P)

t_SK(LH)

t_SK(HL)

t_SK(PP)

t_ZHD

Differential Output Rise Time (20% to 80%)

Differential Output Fall Time (80% to 20%)

_L= 100 Ω, C_L= 10 pF,

0.4

1.0

0.4

See Figure 2 and Figure 3

Pulse Skew |t_PLH- t_PHL

Channel-to-Channel Skew

0.3

(Note 4)

Part-to-Part Skew (Note 5)

1.0

5.0

Differential Output Enable Time from Z to HIGH

Differential Output Enable Time from Z to LOW

t_ZLD

R_L= 100Ω, C_L= 10 pF,

t_HZD

Differential Output Disable Time from HIGH to Z See Figure 4 and Figure 5

Differential Output Disable Time from LOW to Z

t_LZD

Note 3: All typical values are at T_A= 25°C and with V_CC= 3.3V.

Note 4: t_SK(LH), t_SK(HL)is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-

tion.

Note 5: t_SK(PP)is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction

(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.

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Preliminary

Note A: All input pulses have frequency = 10 MHz, t_Ror t_F= 1 ns

Note B: C_Lincludes all probe and jig capacitances

FIGURE 1. Differential Driver DC Test Circuit

FIGURE 2. Differential Driver Propagation Delay and

Transition Time Test Circuit

Note B: All input pulses have the frequency = 10 MHz, t_Ror t_F= 1 ns

Note A: C_Lincludes all probe and jig capacitances

FIGURE 4. Differential Driver Enable and

Disable Test Circuit

FIGURE 3. AC Waveforms

FIGURE 5. Enable and Disable AC Waveforms

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Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M16A

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Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

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