FLS3217M [FAIRCHILD]

Single-Stage PFC Primary-Side-Regulation Offline LED Driver with Integrated Power MOSFET; 单级PFC的初级侧调节离线LED驱动器,集成功率MOSFET
FLS3217M
型号: FLS3217M
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Single-Stage PFC Primary-Side-Regulation Offline LED Driver with Integrated Power MOSFET
单级PFC的初级侧调节离线LED驱动器,集成功率MOSFET

驱动器 功率因数校正
文件: 总14页 (文件大小:787K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
May 2012  
FLS3217 / FLS3247  
Single-Stage PFC Primary-Side-Regulation Offline  
LED Driver with Integrated Power MOSFET  
Features  
Description  
This highly integrated PWM controller with power  
.
Cost-Effective Solution without Input Bulk Capacitor  
and Feedback Circuitry  
MOSFET, FLS3217  
/ FLS3247, provides several  
features to enhance the performance of low-power  
flyback converters. The proprietary topology enables  
simplified circuit design for LED lighting applications.  
.
.
.
Power-Factor Correction (PFC)  
Integrated Power MOSFET  
By using the single-stage topology with primary-side  
regulation, an LED lighting board can be implemented  
with the few external components and minimized cost;  
requiring no input bulk capacitor or feedback circuitry.  
To implement good power factor and low THD, constant  
on-time control is utilized with an external capacitor  
connected to COMI.  
Accurate Constant-Current (CC) Control  
Independent Online Voltage, Output Voltage, and  
Magnetizing Inductance Variation  
.
.
.
.
.
.
.
.
Linear Frequency Control for Increased Efficiency  
Open / Short-LED Protection  
Cycle-by-Cycle Current Limiting  
Precise constant-current control regulates accurate  
output current versus changes in input voltage and  
output voltage. The operating frequency is proportionally  
changed by the output voltage to guarantee DCM  
operation with higher efficiency and simple design.  
Over-Temperature Protection with Auto Restart  
Low Startup Current: 20μA  
Low Operating Current: 5mA  
VDD Over-Voltage Protection (OVP)  
VDD Under-Voltage Lockout (UVLO)  
FLS3217 and FLS3247 provide protection features such  
as open-LED, short-LED, and over-temperature  
protection. The current-limit level is automatically  
reduced to minimize the output current and protect  
external components in short-LED condition.  
.
Application Voltage Range: 80VAC ~ 308VAC  
Applications  
.
LED Lighting System  
Ordering Information  
Operating  
Temperature Range  
Part Number  
Package  
Packing Method  
Tape & Reel  
Tube  
FLS3217M  
FLS3217N  
FLS3247N  
7-Lead, Small Outline Package (SOIC)  
7-Lead, Small Outline Package (DIP)  
-40°C to +125°C  
.
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
Application Diagram  
BRIDGE DIODE  
TRANS  
LINE INPUT  
FUSE  
2 VDD DRAIN  
NC  
7
6
4
1
COMI  
5
VS  
CS  
3 GND  
Figure 1. Typical Application  
Internal Block Diagram  
DRAIN  
7
Internal  
Shutdown  
Bias  
Max. Duty  
Controller  
Gate  
Driver  
VDD Good  
+
-
VDD  
2
VOVP  
S
R
Q
OCP Level  
Controller  
VS  
VOCP  
+
OSC  
-
LEB  
1
5
CS  
S
R
Q
Sawtooth  
Generator  
-
TSD  
+
VDD Good  
COMI  
6
3
NC  
Error  
Amp.  
tDIS  
Detector  
DCM Frequency  
Controller  
TRUECURRENT®  
Calculation  
VREF  
Freq.  
Auto Restart Protection:  
OVP (Over-Voltage Protection)  
UVLO (Under-Voltage Lockout)  
4
VS  
GND  
OTP (Over-Temperature Protection)  
VS  
Sample & Hold  
Figure 2. Functional Block Diagram  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
2
Marking Information  
F: Fairchild Logo  
Z: Plant Code  
X: 1-Digit Year Code  
ZXYTT  
S3217  
TM  
ZXYTT  
S3247  
TM  
Y: 1-Digit Week Code  
TT: 2-Digit Die Run Code  
T: Package Type (M=SOIC, N=DIP)  
M: Manufacture Flow Code  
Figure 3. Top Mark  
Pin Configuration  
Figure 4. Pin Configuration  
Description  
Pin Definitions  
Pin #  
Name  
Current Sense. This pin connects a current-sense resistor to detect the MOSFET current for  
the output-current regulation in Constant-Current (CC) regulation.  
1
CS  
2
3
VDD  
GND  
Power Supply. IC operating current and MOSFET driving current are supplied using this pin.  
Ground  
Voltage Sense. This pin detects the output voltage information and discharge time for  
maximum frequency control and constant current regulation. This pin is connected to an  
auxiliary winding of the transformer via resistors of the divider.  
4
VS  
Constant Current Loop Compensation. This pin is connected to a capacitor between the  
COMI and GND pins for compensation current loop gain.  
5
COMI  
6
7
NC  
No Connect  
DRAIN  
Power MOSFET Drain. This pin is the high-voltage power MOSFET drain.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VVDD  
Parameter  
Min.  
Max.  
30  
Unit  
V
DC Supply Voltage(1,2)  
VS Pin Input Voltage  
CS Pin Input Voltage  
COMI Pin Input Voltage  
VVS  
-0.3  
-0.3  
-0.3  
7.0  
V
VCS  
7.0  
V
VCOMI  
7.0  
V
TA=25°C,  
FLS3217M/N  
1
ID  
Continuous Drain Current  
A
TA=25°C, FLS3247N  
FLS3217M/N  
FLS3247N  
4
4
IDM  
IAR  
PD  
Pulsed Drain Current  
Avalanche Current  
Power Dissipation  
A
A
16  
1
FLS3217M/N  
FLS3247N  
-
4
SOIC, TA50°C  
660  
mW  
W
DIP, TA50°C  
SOIC, TA50°C  
DIP, TA50°C  
SOIC, TA50°C  
DIP, TA50°C  
1
150  
95  
Thermal Resistance (Junction-to-Air)  
Thermal Resistance (Junction-to-Case)  
°C/W  
°C/W  
JA  
JC  
40  
25  
+150  
+150  
+260  
5
TJ  
TSTG  
TL  
Maximum Junction Temperature  
°C  
°C  
°C  
Storage Temperature Range  
-55  
Lead Temperature (Soldering 10 seconds)  
ESD Capability, Human Body Model  
ESD Capability, Charged Device Model  
ESD  
V
2
Notes:  
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.  
2. All voltage values, except differential voltages, are given with respect to GND pin.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Min.  
Max.  
Unit  
TA  
Operating Ambient Temperature  
-40  
125  
°C  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
4
Electrical Characteristics  
Unless otherwise specified, VDD=15V and TA=25°C.  
Symbol  
Parameter  
Condition  
Min.  
Typ.  
Max.  
Unit  
MOSFET Section  
BVDSS  
Drain-Source Breakdown Voltage ID=250µA, VGS=0V  
FLS3217M  
700  
V
13  
8.8  
2.4  
175  
250  
435  
23  
16  
11.0  
2.8  
ID=0.5A, VGS=10V  
Static Drain-Source  
On Resistance  
RDS(ON)  
FLS3217N  
FLS3247N  
FLS3217M  
FLS3217N  
FLS3247N  
FLS3217M  
ID=1A, VGS=10V  
200  
pF  
pF  
pF  
pF  
pF  
pF  
VGS=0V, VDS=25V,  
fS=1MHz  
CISS  
Input Capacitance  
25  
VGS=0V, VDS=25V,  
fS=1MHz  
COSS  
Output Capacitance FLS3217N  
FLS3247N  
25  
51  
VDD Section  
VDD-ON  
Turn-On Threshold Voltage  
Turn-Off Threshold Voltage  
14.5  
6.75  
16.0  
7.75  
17.5  
8.75  
V
V
VDD-OFF  
VS=2.4V, CL=MOSFET  
CISS  
IDD-OP  
Operating Current  
2.85  
4.00  
5.00  
mA  
IDD-ST  
VOVP  
Startup Current  
VDD=VDD-ON – 0.16V  
2
20  
μA  
VDD Over-Voltage Protection Level  
22.0  
23.5  
25.0  
V
Oscillator Section  
fMAX-CC Maximum Frequency in CC  
fMIN-CC  
VDD=10V, 20V  
VDD=10V, 20V  
60  
65  
70  
kHz  
kHz  
Minimum Frequency in CC  
21.0  
23.5  
26.0  
Frequency=Maximum  
Frequency-2kHz  
VSMAX-CC  
VS for Maximum Frequency in CC  
2.25  
2.35  
2.45  
V
Frequency=Minimum  
Frequency +1kHz  
VSMIN-CC  
tON(MAX)  
VS for Minimum Frequency in CC  
Maximum Turn-on Time  
0.55  
12  
0.85  
14  
1.15  
16  
V
s  
Current-Sense Section  
VRV  
Reference Voltage  
2.475  
2.38  
2.500  
2.43  
2.525  
2.48  
V
V
Variation Test Voltage on CS Pin  
for Constant Current Regulation  
VCCR  
VCS=0.24V  
tLEB  
tMIN  
Leading-Edge Blanking Time  
Minimum On Time in CC  
300  
600  
ns  
ns  
VVS=-0.5V, VCS=1.5V  
Propagation Delay to GATE  
Output  
tPD  
50  
100  
150  
ns  
DSAW  
tDIS-BNK  
IVS-BNK  
Duty Cycle of SAW Limiter  
tDIS Blanking Time of VS  
VS Current for VS Blanking  
40  
1.5  
100  
%
s  
A  
Continued on the following page…  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
5
Electrical Characteristics (Continued)  
Unless otherwise specified, VDD=15V and TA=25°C.  
Symbol  
Parameter  
Condition  
Min.  
Typ.  
Max.  
Unit  
Current-Error-Amplifier Section  
Gm  
Transconductance  
COMI Sink Current  
85  
mho  
A  
A  
V
ICOMI-SINK  
25  
25  
38  
38  
VEAI=3V, VCOMI=5V  
ICOMI-SOURCE COMI Source Current  
VEAI=2V, VCOMI=0V  
VCOMI-HGH  
VCOMI-LOW  
COMI High Voltage  
COMI Low Voltage  
4.7  
VEAI=2V  
VEAI=3V  
0.1  
V  
Over-Current Protection Section  
VOCP  
VCS Threshold Voltage for OCP  
VCS Threshold Voltage for Low OCP  
0.60  
0.13  
0.67  
0.18  
0.40  
0.60  
0.74  
0.23  
V
V
V
V
VLowOCP  
VLowOCP-EN VS Threshold Voltage to Enable LOW OCP Level  
VLowOCP-DIS VS Threshold Voltage to Disable LOW OCP Level  
Over-Temperature-Protection Section  
TOTP  
Threshold Temperature for OTP(3)  
140  
150  
10  
160  
oC  
oC  
TOTP-HYS  
Restart Junction Temperature Hysteresis  
Note:  
3. When the over-temperature protection (OTP) is activated, the power system enters Auto-Recovery Mode and  
output is disabled.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
6
Typical Performance Characteristics  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
1.5  
1.3  
1.1  
0.9  
FLS3217M  
FLS3217N  
FLS3247N  
FLS3217M  
0.7  
FLS3217N  
FLS3247N  
0.5  
-40  
-40  
-40  
-30  
-15  
0
25  
50  
75  
85  
100 125  
100 125  
100 125  
-40  
-40  
-40  
-30  
-15  
0
25  
50  
75  
85  
100 125  
100 125  
100 125  
Temp [°C]  
Temp [°C]  
Figure 5. VDD-ON vs. Temperature  
Figure 6. VDD-OFF vs. Temperature  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
FLS3217M  
FLS3217N  
FLS3247N  
FLS3217M  
FLS3217N  
FLS3247N  
-30  
-15  
0
25  
50  
75  
85  
-30  
-15  
0
25  
50  
75  
85  
Temp [°C]  
Temp [°C]  
Figure 7. IDD-OP vs. Temperature  
Figure 8. VOVP vs. Temperature  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
FLS3217M  
FLS3217N  
FLS3247N  
FLS3217M  
FLS3217N  
FLS3247N  
-30  
-15  
0
25  
50  
75  
85  
-30  
-15  
0
25  
50  
75  
85  
Temp [°C]  
Temp [°C]  
Figure 9. fMAX_CC vs. Temperature  
Figure 10. fMIN_CC vs. Temperature  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
7
Typical Performance Characteristics (Continued)  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
FLS3217M  
FLS3217N  
FLS3247N  
FLS3217M  
FLS3217N  
FLS3247N  
-40  
-30  
-15  
0
25  
50  
75  
85  
100 125  
-40  
-30  
-15  
0
25  
50  
75  
85  
100 125  
Temp [°C]  
Temp [°C]  
Figure 11. VCCR vs. Temperature  
Figure 12. VVVR vs. Temperature  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
FLS3217M  
FLS3217N  
FLS3247N  
FLS3217M  
FLS3217N  
FLS3247N  
-40  
-30  
-15  
0
25  
50  
75  
85  
100 125  
-40  
-30  
-15  
0
25  
50  
75  
85  
100 125  
Temp [°C]  
Temp [°C]  
Figure 13. VOCP vs. Temperature  
Figure 14. VOCP_Low vs. Temperature  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
8
Functional Description  
FLS3217 / FLS3247 is an AC-DC PWM controller for  
LED lighting applications. TRUECURRENT® techniques  
regulate accurate LED current independent of input  
voltage, output voltage, and magnetizing inductance  
variations. The linear frequency control in the oscillator  
reduces conduction loss and maintains DCM operation  
in the wide range of output voltage, which implements  
high power factor correction in a single-stage flyback  
topology. A variety of protections, such as short/open-  
LED protection, over-temperature protection, and cycle-  
by-cycle current limitation stabilize system operation  
and protect external components.  
Power-Factor Controller (PFC) and Total  
Harmonic Distortion (THD)  
In a conventional boost converter, Boundary Conduction  
Mode (BCM) is generally used to keep input current in  
phase with input voltage for Power Factor (PF) and  
Total Harmonic Distortion (THD). In flyback / buck boost  
topology, constant turn-on time and constant frequency I  
Discontinuous Conduction Mode (DCM) can implement  
high PF and low THD as shown in Figure 16. Constant  
turn-on time is maintained by the internal error amplifier  
and a large external capacitor (typically over 1µF) at the  
COMI pin. Constant frequency and DCM operation is  
managed by linear frequency control.  
Startup  
Powering at startup is slow due to the low feedback-loop  
bandwidth in the PFC converter. To increase power  
during startup, the internal oscillator counts 12ms to  
define Startup Mode. During Startup Mode, turn-on time  
is determined by current-mode control with 0.2V voltage  
limit. Transconductance becomes 14 times bigger, as  
shown in Figure 15. After Startup Mode, turn-on time is  
controlled by Voltage Mode, using the COMI voltage. The  
error amplifier transconductance is reduced to 85µmho.  
IIN  
IIN_AVG  
V
DD = VDD_ON  
VIN  
GATE  
Constant Frequency  
VCS  
0.2V  
Figure 16. Input Current and Switching  
14gm gm  
Linear Frequency Control  
VCOMI  
DCM should be guaranteed for high power factor in  
flyback topology. To maintain DCM in the wide range of  
output voltage, frequency is linearly changed by output  
voltage in linear frequency control. Output voltage is  
detected by auxiliary winding and a resistive divider  
connected to the VS pin, as shown in Figure 17.  
Startup Mode: 12ms  
ILED  
Time  
Figure 15. Startup Sequence  
Constant Current Regulation  
The output current can be estimated using the peak  
drain current and inductor current discharge time  
because output current is same as the average of the  
diode current in steady state. The peak value of the  
drain current is determined by the CS pin and the  
inductor discharge time (tDIS) is sensed by tDIS detector.  
By using three pieces of information (peak drain current,  
inductor discharging time, and operating switching  
period); the TRUECURRENT block calculates estimates  
the output current. The output of the TRUECURRENT  
calculation is compared with an internal precise  
reference to generate an error voltage, VCOMI, which  
determines the turn-on time in Voltage-Mode control.  
With Fairchild’s innovative technique, constant current  
output can be precisely controlled.  
Figure 17. Linear Frequency Control  
When the output voltage decreases, the secondary  
diode conduction time is increased and the linear  
frequency control lengthens the switching period. This  
maintains DCM operation in the wide output voltage  
range, as shown in Figure 18. The frequency control  
also lowers primary rms current with better power  
efficiency in full-load condition.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
9
Primary  
Current  
Secondary  
Current  
LED Short !  
nVo  
Lm  
VO  
=
VIN  
VO.nom  
t
t
DIS  
3
4
Lm  
n
VO  
VO  
=
75% VO.nom  
VCS  
0.2V  
4
3
4
3
t
t
DIS  
3
5
n
VO  
VDD  
VO  
=
Lm  
60% VO.nom  
VDD_ON  
5
3
t
5
3
t DIS  
VDD_OFF  
Figure 18. Primary and Secondary Current  
Figure 20. Waveforms at Short-LED Condition  
BCM Control  
Open LED Protection  
The end of secondary diode conduction time is possibly  
over a switching period set by linear frequency control.  
In this case, FLS3217 and FLS3247 don’t allow CCM  
and the operation mode changes from DCM to BCM.  
Therefore, FLS3217 and FLS3247 eliminate sub-  
harmonic distortion in CCM.  
FLS3217 and FLS3247 protect external components,  
such as diode and capacitor, at secondary side in open-  
LED condition. During switch-off, the VDD capacitor is  
charged up to the auxiliary winding voltage, which is  
applied as the reflected output voltage. Because the VDD  
voltage has output voltage information, the internal  
voltage comparator on the VDD pin can trigger output  
over-voltage protection (OVP), as shown in Figure 21.  
When at least one LED is open-circuited, output load  
impedance becomes very high and the output capacitor  
is quickly charged up to VOVP x Ns / Na. Then switching  
is shutdown and VDD block goes into “Hiccup Mode” until  
the open-LED condition is removed, shown in Figure 22.  
Short-LED Protection  
In the event of a short LED condition, the switching  
MOSFET and secondary diode are usually stressed by  
the high-power current. However, FLS3217 and  
FLS3247 change OCP level in short-LED condition.  
When VS is lower than 0.4V, the OCP level lowers to  
0.2V from 0.7V, as shown in Figure 17. Power is limited  
and external component current stress is relieved.  
Internal  
Bias  
-
1
CS  
LEB  
VDD Good  
+
VOCP  
+
-
VDD  
2
VOVP  
At VS < 0.4V,  
VOCP = 0.2V.  
4
VS  
At VS > 0.6V,  
VOCP = 0.7V.  
Shutdown Gate Driver  
S
Q
Figure 19. Internal OCP Block  
VDD Good  
Figure 21. Internal OVP Block  
R
Figure 20 shows operational waveforms at short-LED  
condition. Output voltage is quickly lowered to 0V after  
the LED-short event. Then the reflected auxiliary voltage  
is also 0V, making VS less than 0.4V. 0.2V OCP level  
limits the primary-side current and VDD “hiccups” up and  
down in between UVLO hysteresis.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
10  
Over-Temperature Protection (OTP)  
The built-in temperature-sensing circuit shuts down  
PWM output once the junction temperature exceeds  
150°C. While PWM output is off, VDD gradually drops to  
the UVLO voltage. Some of the internal circuits are shut  
down and VDD gradually increases again. When VDD  
reaches 16V, all the internal circuits start operating. If  
the junction temperature is still higher than 140°C, the  
PWM controller shuts down immediately.  
Figure 22. Waveforms at Open-LED Condition  
Under-Voltage Lockout (UVLO)  
The turn-on and turn-off thresholds are fixed internally at  
16V and 7.5V, respectively. During startup, the VDD  
capacitor must be charged to 16V through the startup  
resistor, so that the FLS32x7 is enabled. The VDD  
capacitor supplies VDD until power can be delivered  
from the auxiliary winding of the main transformer. VDD  
must not drop below 7.5V during startup. The UVLO  
hysteresis window ensures that the VDD capacitor is  
adequate to supply VDD during startup.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
11  
Physical Dimensions  
5.00  
4.80  
A
3.81  
0.65TYP  
1.75TYP  
3.81  
7 6  
5
B
6.20  
5.80  
4.00  
3.80  
3.85 7.35  
4
1
2
3
PIN #1  
(0.33)  
1.27  
0.25  
C B A  
1.27  
TOP VIEW  
LAND PATTERN RECOMMENDATION  
SEE DETAIL A  
0.25  
0.10  
0.25  
0.19  
C
1.75 MAX  
OPTION A - BEVEL EDGE  
0.10 C  
0.51  
0.33  
FRONT VIEW  
OPTION B - NO BEVEL EDGE  
0.50  
0.25  
x 45°  
NOTES:  
R0.10  
R0.10  
GAGE PLANE  
A) THIS PACKAGE DOES NOT FULLY CONFORMS  
TO JEDEC MS-012 VARIATION AA.  
0.36  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
8°  
0°  
C) DIMENSIONS DO NOT INCLUDE MOLD  
FLASH OR BURRS.  
SEATING PLANE  
0.90  
(1.04)  
DETAIL A  
0.406  
D) DRAWING FILENAME : M07Brev3  
SCALE: 2:1  
Figure 23.  
7-Lead, SOIC, Depopulated JEDEC MS-112, .150" Narrow Body, Dual-DAP,  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev.1. 0.0  
www.fairchildsemi.com  
12  
Physical Dimensions  
9.40  
9.00  
7
5
6.60  
6.20  
1
4
(0.56)  
3.60  
3.20  
7.62  
5.08 MAX  
0.33  
3.60  
3.00  
0.35  
0.20  
2.54  
0.56  
0.36  
9.91  
7.62  
1.62  
1.42  
7.62  
NOTES: UNLESS OTHERWISE SPECIFIED  
A) THIS PACKAGE COMPLIES TO JEDEC  
MS-001, VARIATION BA, EXCEPT FOR  
TERMINAL COUNT (7 RATHER THAN 8)  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH, AND TIE BAR EXTRUSIONS.  
D) DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M-1994  
E) DRAWING FILENAME AND REVISION: MKT-NA07BREV2  
Figure 24. 7-Lead, Molded Dual In-Line Package, MDIP, .300" Wide, Dual DAP  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
13  
© 2012 Fairchild Semiconductor Corporation  
FLS3217 / FLS3247 • Rev. 1.0.0  
www.fairchildsemi.com  
14  

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