FMS6203_0611 [FAIRCHILD]
Low-Cost 3-Channel Video Filter Driver for SD/PS/HD; 支持SD / PS / HD低成本三通道视频滤波驱动器
| 型号： | FMS6203_0611 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low-Cost 3-Channel Video Filter Driver for SD/PS/HD |
| 文件： | 总9页 (文件大小：303K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 2006
FMS6203
Low-Cost 3-Channel Video Filter Driver for SD/PS/HD
Features
Description
The FMS6203 offers comprehensive filtering for set-top
box or DVD applications. It is intended to replace passive
LC filters and drivers with a low-cost integrated device.
Three 6th-Order Video Anti-Aliasing or Reconstruction
Filters
Supports Component YPrPb or RGB Video
Three Channels, Selectable to 8MHz,16MHz, 32MHz
Filter channels are specialized for either component
(YPbPr) or RGB video signals. These channels offer a
selectable frequency response of 8, 16, or 32MHz. The
filters can also be bypassed for high-frequency opera-
tion. Additional functionality of these channels includes
input biasing mode and output disable.
for SD/PS/HD Applications
Includes Wide Bandwidth Bypass Mode
6dB Gain Option Available for 150Ω Double Termi-
nated Video Load
0dB Gain Option Available for High Impedance Loading
The FMS6203 may be driven directly by a DC-coupled
DAC output or an AC-coupled signal. All inputs accept
standard 1Vpp video signals.
Selectable Clamp or Bias Mode on Pb,Pr / B,R Inputs
Inputs and Outputs can be either AC or DC Coupled
DC-Coupled Outputs Eliminate Expensive Coupling
Each channel includes an output amplifier capable of
driving a single (150Ω) AC- or DC-coupled video load. All
outputs can be disabled to save power in DC-coupled
applications.
Capacitors
Output Disable
Single 5V supply
2kV CDM / 8kV HBM ESD Protection
Lead-Free TSSOP-14 Package
The device is available in two factory-set options, a 0dB
gain option and a 6dB gain option.
Applications
Cable and Satellite Set-Top Boxes
DVD Players
HDTV
Personal Video Recorders (PVR)
Video On Demand (VOD)
Functional Block Diagram
Y/G In
Clamp
Y/G Out
SD
SD
SD
PS
PS
PS
HD
HD
HD
BP
BP
BP
Pb/B In
Clamp / Bias
Clamp / Bias
Pb/B Out
Pr/R Out
Bias
Pr/R In
FSEL0
FSEL1
OE
Factory Option:
0dB or 6dB Gain
Figure 1. Block Diagram
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
Ordering Information
Gain
Setting
Operating Temperature
Range
Packing
Method
Part Number
Package
TSSOP-14
TSSOP-14
TSSOP-14
TSSOP-14
Pb-Free
Yes
FMS6203MTC1400
FMS6203MTC1400X
FMS6203MTC1406
FMS6203MTC1406X
0dB
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
Tube
0dB
Yes
Tape and Reel
Tube
6dB
Yes
6dB
Yes
Tape and Reel
Note:
1. Moisture sensitivity level for all parts is MSL-1.
Pin Configuration
VCC
VCC
1
2
3
4
5
6
7
14
13
12
11
10
9
FSEL0
Y/G In
FSEL1
FAIRCHILD
Y/G Out
Pb/B Out
Pr/R Out
OE
FMS6203
Pb/B In
Pr/R In
BIAS
14P TSSOP
GND
GND
8
Figure 2. Pin Configuration
Pin Assignments
Pin #
1
Name
VCC
Type
Description
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Input
Input
+5V supply.
2
FSEL0
Y/G In
Pb/B In
Pr/R In
BIAS
Selects filter corner frequency.
Selectable video input.
3
4
Selectable video input.
5
Selectable video input.
6
Input Bias on Pb/B Pr/R 0 = Bias 1 = Clamp.
Must be tied to ground. Do not float.
Must be tied to ground. Do not float.
Output disable control 0 = OFF 1 = ON.
Filtered SD,PS,HD,BP video output.
Filtered SD,PS,HD,BP video output.
Filtered SD,PS,HD,BP video output.
Selects filter corner frequency.
+5V supply.
7
GND
8
GND
9
OE
10
11
12
13
14
Pr/R Out
Pb/B Out
Y/G Out
FSEL1
VCC
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
2
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the
conditions for actual device operation.
Parameter
Min.
-0.3
-0.3
Max.
6
Unit
V
DC Supply Voltage
Analog and Digital I/O
Vcc + 0.3
50
V
Output Current, Any One Channel, Do Not Exceed
mA
Reliability Information
Symbol
TJ
Parameter
Min.
Typ.
Max.
Unit
Junction Temperature
150
150
300
°C
°C
TSTG
TL
Storage Temperature Range
-65
Lead Temperature, Soldering 10 seconds
°C
ΘJA
Thermal Resistance JEDEC Standard Multi-Layer Test
Boards, Still Air
97
°C/W
Recommended Operating Conditions
Symbol
TA
Parameter
Operating Temperature Range
Supply Voltage Range
Min.
-40
Typ.
Max.
85
Unit
°C
VCC
4.75
5.0
5.25
V
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
3
DC Electrical Characteristics
TA = 25°C, Vcc = 5V, Rsource = 37.5Ω, inputs AC coupled with 0.1μF, all outputs AC coupled with 220μF into 150Ω
loads, referenced to 400kHz; all gain options; unless otherwise noted.
Symbol
ICC
Parameter
Supply Current(1)
Supply Current (1)
Conditions
Min.
Typ.
36
Max
75
Units
mA
mA
Vpp
V
No Load
No Load, Output Disabled
ICC1
VIN
15
35
Video Input Voltage Range Referenced to GND if DC Coupled
1.0
VIL
Digital Input Low(1)
Digital Input High(1)
FSEL0,FSEL1
FSEL0,FSEL1
150Ω DC load
0
0.8
Vcc
VIH
2.4
V
tENABLE Output Enable Time
300
ns
Note:
1. 100% tested at 25°C.
Standard Definition Electrical Characteristics
TA = 25°C, VIN = 1Vpp, Vcc = 5V, Rsource = 37.5Ω, all inputs AC coupled with 0.1μF, all outputs AC coupled with 220μF
into 150Ω loads, referenced to 400kHz, all gain options; unless otherwise noted.
Symbol
AVSD
Parameter
Channel Gain Error (1)
-1dB Bandwidth(1)
-3dB Bandwidth
Conditions
Min.
-0.4
Typ.
0
Max
Units
dB
0.4
f1dBSD
fcSD
5.20
7.15
8
MHz
MHz
Attenuation (Stopband
Reject)(1)
fSBSD
f = 27MHz
40
50
dB
DG
DP
Differential Gain
0.3
1.0
%
°
Differential Phase
Total Harmonic Distortion,
Output
THD
VOUT = 1.4Vpp, 3.58MHz
0.6
%
XTALKSD Crosstalk (ch-to-ch)
1MHz
-70
75
85
dB
dB
ns
SNR
tpdSD
Signal-to-Noise Ratio(2)
NTC-7 weighting, 100kHz to 4.2MHz
Delay from input to output, 4.5MHz
Propagation Delay
Notes:
1. 100% tested at 25°C.
2. SNR = 20 * log (714mV / rms noise).
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
4
Progressive Scan Electrical Characteristics
TA = 25°C, VIN = 1Vpp, Vcc = 5V, Rsource = 37.5Ω, all inputs AC coupled with 0.1μF, all outputs AC coupledwith 220μF
into 150Ω loads, referenced to 400kHz, all gain options; unless otherwise noted.
Symbol
Parameter
Channel Gain Error(1)
Conditions
Min.
-0.4
Typ.
0
Max
Units
dB
AVPS
0.4
f1dBSPS -1dB Bandwidth(1)
10.0
13.5
16
MHz
MHz
fcPS
-3dB Bandwidth
Attenuation (Stopband
Reject)(1)
fSBPS
f = 54MHz
37
44
dB
%
Total Harmonic Distortion,
Output
THD
VOUT = 1.4Vpp, 7MHz
0.55
XTALKPS Crosstalk (ch-to-ch)
1MHz
-75
66
dB
dB
ns
SNR
tpdPS
Signal-to-Noise Ratio(2)
Unweighted; 100kHz to 15MHz
Delay from input to output, 10MHz
Propagation Delay
47
Notes:
1. 100% tested at 25°C.
2. SNR = 20 * log (714mV / rms noise).
High-Definition Electrical Characteristic
TA = 25°C, VIN = 1Vpp, Vcc = 5V, Rsource = 37.5Ω, all inputs AC coupled with 0.1μF, all outputs AC coupled with 220μF
into 150Ω loads, referenced to 400kHz, all gain options; unless otherwise noted.
Symbol
AVHD
Parameter
Channel Gain Error(1)
-1dB Bandwidth(1)
-3dB Bandwidth
Conditions
Min.
-0.4
28
Typ.
0
Max. Units
0.4
dB
f1dBHD
fcHD
31
MHz
MHz
32
Attenuation (Stopband
Reject)(1)
fSBHD
f = 74.25MHz
30
40
0.5
0.5
dB
%
V
load
OUT = 0.7Vpp, 22MHz, 0dB, 10kΩ
Total Harmonic Distortion,
Output
THD
VOUT = 1.4Vpp, 22MHz, 6dB, 150Ω
load
%
1MHz
-75
-57
66
dB
dB
dB
ns
XTALKHD Crosstalk (ch-to-ch)
30MHz
SNR
Signal-to-Noise Ratio(2)
Propagation Delay
Unweighted, 100kHz to 30MHz
Delay from input to output, 20MHz
tpdHD
25
Notes:
1. 100% tested at 25°C.
2. SNR = 20 * log (714mV / rms noise).
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
5
Bypass Mode Electrical Characteristics
TA = 25°C, VIN = 1Vpp, Vcc = 5V, Rsource = 37.5Ω, all inputs AC coupled with 0.1μF, all outputs AC coupled with 220μF
into 150Ω loads, referenced to 400kHz, all gain options; unless otherwise noted.
Symbol
AVBP
Parameter
Channel Gain Error(1)
-1dB Bandwidth
Conditions
Min.
Typ.
0
Max. Units
DC
-0.4
0.4
dB
MHz
MHz
%
f1dBBP
fcBP
90
-3dB Bandwidth
115
0.3
0.25
-74
-64
70
VOUT = 0.7Vpp, 22MHz, 0dB, 10kΩ load
Total Harmonic Distor-
tion, Output
THD
VOUT = 1.4Vpp, 22MHz, 6dB, 150Ω load
%
1MHz
dB
XTALKBP Crosstalk (ch-to-ch)
SNR
Notes:
30MHz
dB
Signal-to-Noise Ratio(2) Unweighted, 100kHz to 30MHz
dB
1. 100% tested at 25°C.
2. SNR = 20 * log (714mV / rms noise).
Frequency Select Truth Table
F
F
Filter Frequency
8MHz
Video Format
Sync Format
SEL1
SEL0
0
0
SD,480i
PS,480p
Bi-level, 4.7μs pulse width
Bi-level, 2.35μs pulse width
Tri-level, 589ns pulse width
0
1
1
1
0
1
16MHz
32MHz
HD,1080i,720p
Bypass
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
6
Layout Considerations
General layout and supply bypassing play a major role in
high-frequency performance and thermal characteristics.
Fairchild offers a demonstration board to guide layout
and aid device evaluation. The demo board is a four-
layer board with full power and ground planes. Following
this layout configuration provides optimum performance
and thermal characteristics for the device. For the best
results, follow the steps and recommended routing rules
listed below.
For two-layer boards, use a ground plane that extends
beyond the device body by at least 0.5 inches on all
sides. Include a metal paddle under the device on the
top layer.
Minimize all trace lengths to reduce series inductance.
Thermal Considerations
Since the interior of most systems, such as set-top-
boxes, TVs, and DVD players are at +70ºC; consider-
ation must be given to providing an adequate heat sink
for the device package for maximum heat dissipation.
When designing a system board, determine how much
power each device dissipates. Ensure that devices of
high power are not placed in the same location, such as
directly above (top plane) and below bottom plane) each
other on the PCB.
Recommended Routing/Layout Rules
Do not run analog and digital signals in parallel.
Use separate analog and digital power planes to
supply power.
Traces should run on top of the ground plane at all-
times.
No trace should run over ground/power splits.
Avoid routing at 90-degree angles.
PCB Thermal Layout Considerations
Understand the system power requirements and envi-
Minimize clock and video data trace length differ-
ronmental conditions.
ences.
Maximize thermal performance of the PCB.
Include 10µF and 0.1µF ceramic power supply bypass
Consider using 70µm of copper for high-power
capacitors.
designs.
Place the 0.1µF capacitor within 0.1 inches of the
Make the PCB as thin as possible by reducing FR4
device power pin.
thickness.
Place the 10µF capacitor within 0.75 inches of the
Use vias in power pad to tie adjacent layers together.
device power pin.
Remember that baseline temperature is a function of
For multilayer boards, use a large ground plane to
board area, not copper thickness.
help dissipate heat.
Modeling techniques can provide a first-order approxi-
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
7
Mechanical Dimensions
Dimensions are in millimeters unless otherwise noted.
14-Lead TSSOP
Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP)
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
8
© 2006 Fairchild Semiconductor Corporation
FMS6203 Rev. 1.0.2
www.fairchildsemi.com
9
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