FMS6408MTC143X_NL [FAIRCHILD]

Video Amplifier, 3 Channel(s), 1 Func, PDSO14, LEAD FREE, TSSOP-14;
FMS6408MTC143X_NL
型号: FMS6408MTC143X_NL
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Video Amplifier, 3 Channel(s), 1 Func, PDSO14, LEAD FREE, TSSOP-14

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文件: 总9页 (文件大小:248K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
www.fairchildsemi.com  
FMS6408  
Triple Video Filter Driver for RGB and YUV Signals  
Features  
Description  
• 7.6MHz 5th order RGB/YUV/YC CV filters  
• 50dB stopband attenuation at 27MHz on all outputs  
• Better than 0.5dB flatness to 4.2MHz on all outputs  
• No external frequency selection components or clocks  
• AC coupled inputs and AC or DC coupled outputs  
• Supports both NTSC and PAL luminance bandwidth  
• Continuous time low pass filters for video anti-aliasing  
or reconstruction applications  
The FMS6408 provides three video signal paths including a  
two-input mux, a video filter and a 6dB gain output driver.  
The filter bandwidth supports RGB and YUV signals in  
either NTSC or PAL formats.  
The video filters approximate a 5th order Butterworth low  
pass characteristic optimized for minimum overshoot and  
flat group delay to provide excellent image quality. Four  
different peaking options are available. The video filters can  
be bypassed if desired.  
• <1% differential gain with 0.5° differential phase on  
all channels  
• Integrated DC restore circuitry with low tilt  
In a typical application, the RGB or YUV DAC outputs are  
AC coupled into the filters through the input mux. All  
channels have DC restore circuitry to clamp the DC input  
levels during video sync. The clamp pulse derived from the  
selectedY input controls three independent feedback clamps.  
All outputs are capable of driving 2Vpp, AC or DC coupled,  
into either a single (150) or dual (75) video load. The  
FMS6408 clamp levels can be factory programmed forYUV  
/RGB (250mV for all channels), YC / YPbPr (250mV on  
channel 1 and 1.125V on channels 2 and 3) or YC CV  
(250mV on channels 1 and 3 and 1.125V on channel 2).  
Applications  
• Cable set top boxes  
• Satellite set top boxes  
• Terrestrial set top boxes  
• DVD players  
• Personal Video Recorders (PVR)  
• Video On Demand (VOD)  
Functional Block Diagram  
INMUX (A/B)  
BYPASS (BYPASS/FILTER)  
Y
Y
OUT  
6dB  
INA  
8MHz  
*
Y
INB  
gM  
250mV  
Sync Processing  
U
U
OUT  
6dB  
INA  
INB  
8MHz  
*
U
gM  
250mV or  
1.125V *  
V
V
V
OUT  
6dB  
INA  
INB  
8MHz  
*
gM  
250mV or  
1.125V *  
* Factory Selected Clamp  
and Peaking Levels  
REV. 2C August 31, 2004  
DATA SHEET  
FMS6408  
Electrical Specifications  
(TC = 25˚C, Vi = 1Vpp, VCC = 5.0V, all inputs AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150,  
referenced to 400kHz, 0dB peaking option; unless otherwise noted)  
Symbol Parameter  
Conditions  
Min Typ Max Units  
1
ICC  
Supply Current  
VCC no load  
52  
86  
mA  
Vpp  
V
Vi  
Input Voltage Max  
1.4  
1
Vil  
Digital Input Low  
Bypass, A_NB  
Bypass, A_NB  
YUV/RGB/CV Inputs  
PbPr/C Inputs  
DC  
0
0.8  
1
Vih  
Digital Input High  
2.0  
VCC  
V
2
VCLAMP  
Clamp Voltage  
250  
1.125  
-40  
mV  
V
PSRR  
Power Supply Rejection Ratio  
dB  
AC Electrical Specifications  
(TC = 25˚C, Vi = 1Vpp, VCC = 5.0V, all inputs AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150,  
referenced to 400kHz, 0dB peaking option; unless otherwise noted)  
Symbol Parameter  
Conditions  
Min Typ Max Units  
1
APB  
Passband Response  
4.2MHz  
-0.5  
5.6  
0
5.9  
0.3  
0.7  
1.2  
1.6  
7.6  
52  
dB  
dB  
dB  
dB  
dB  
dB  
MHz  
dB  
%
1
AVLF  
AVHF  
Low Frequency Gain (All Channels) at 400kHz  
6.2  
Delta High Frequency at 5MHz  
0dB Peaking Option  
3
(All Channels)  
0.4dB Peaking Option  
0.9dB Peaking Option  
1.3dB Peaking Option  
All Channels  
fC  
-3dB Bandwidth  
1
fSBh  
Stopband Rejection (All Channels)  
Differential Gain  
at 27MHz  
48  
dG  
All Channels  
0.2  
0.5  
0.2  
75  
dθ  
Differential Phase  
All Channels  
°
THD  
SNR  
HDIST  
VDIST  
tpd  
Total Harmonic Distortion  
at 3.58MHz  
%
SNR All Channels (NTC7 Weighted) 4.2MHz Lowpass, 100kHz Highpass  
dB  
%
Line-Time Distortion  
18µs, 100 IRE Bar  
130 Lines, 18µs, 100 IRE Bar  
400kHz  
TBD  
TBD  
65  
Field-Time Distortion  
%
Propagation Delay (All Channels)  
Group Delay (All Channels)  
tpdSkew Between Any 2 Channels  
ns  
GD  
to 3.58MHz (NTSC)  
at 400kHz  
14  
ns  
tSKEW  
AV(match)  
TCLAMP  
XTALK  
2
ns  
1
Channel Gain Matching  
400kHz  
0
5
%
Clamp Response Time (All Channels) Settled to 10mV, Initial Condition 0V  
5
ms  
dB  
dB  
MHz  
Crosstalk (Channel-to-Channel)  
at 1.0MHz  
-65  
-85  
25  
INMUXISO Input Mux Isolation  
at 1.0MHz  
f1dBWB  
Bypass Mode -1dB Bandwidth  
1.4Vpp Output All Channels  
Notes  
1. 100% tested at 25°C.  
2. Mode selection for YUV/RGB vs. PbPr/YC vs. YC CV operation based on factory programming  
3. Peaking Options boost gain by 0dB, 0.4dB, 0.9dB, or 1.3dB from 4.2MHz to 5MHz based on factory programming  
2
REV. 2C August 31, 2004  
FMS6408  
DATA SHEET  
Factory Programming Options (See Ordering Information Table on Page 9 for current options)  
Part Name  
Part Number  
Clamping  
Mode  
Peaking  
Mode (dB)  
YOUT Level UOUT Level VOUT Level  
(mV)  
250  
250  
250  
250  
250  
250  
250  
250  
250  
250  
250  
250  
(V)  
(V)  
1.125  
1.125  
1.125  
1.125  
250  
FMS6408-1  
FMS6408-2  
FMS6408-3  
FMS6408-4  
FMS6408-5  
FMS6408-6  
FMS6408-7  
FMS6408-8  
FMS6408-9  
FMS6408MTC141_NL  
FMS6408MTC142_NL  
FMS6408MTC143_NL  
FMS6408MTC144_NL  
FMS6408MTC145_NL  
FMS6408MTC146_NL  
FMS6408MTC147_NL  
FMS6408MTC148_NL  
FMS6408MTC149_NL  
YPbPr/YC  
YPbPr/YC  
YPbPr/YC  
YPbPr/YC  
YUV/RGB  
YUV/RGB  
YUV/RGB  
YUV/RGB  
YC/CV  
0
1.125  
1.125  
1.125  
1.125  
250  
0.4  
0.9  
1.3  
0
0.4  
0.9  
1.3  
0
250  
250  
250  
250  
250  
250  
1.125  
1.125  
1.125  
1.125  
250  
FMS6408-10 FMS6408MTC1410_NL  
FMS6408-11 FMS6408MTC1411_NL  
FMS6408-12 FMS6408MTC1412_NL  
YC/CV  
0.4  
0.9  
1.3  
250  
YC/CV  
250  
YC/CV  
250  
Note  
These factory programming options allow a single die to be configured for multiple operating modes.  
Absolute Maximum Ratings (beyond which the device may be damaged)  
Parameter  
Min  
-0.3  
-0.3  
Max  
Units  
VCC  
6
V
V
Analog and Digital  
VCC + 0.3  
50  
Output Current Any One Channel (Do not exceed)  
Input Source Resistance (RS)  
mA  
300  
Note  
Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if operating  
conditions are not exceeded.  
Reliability Information  
Parameter  
Min  
Typ  
Max  
+150  
+150  
+300  
Units  
°C  
Junction Temperature  
Storage Temperature Range  
Lead Temperature (Soldering, 10s)  
-65  
°C  
°C  
θ
Thermal Resistance ( ),  
JEDEC Standard Multi-layer Test Boards, Still Air  
90  
°C/W  
JA  
Recommended Operating Conditions  
Parameter  
Min  
0
Typ  
Max  
70  
Units  
°C  
Temperature Range  
VCC Range  
+4.75  
+5.0  
+5.25  
V
REV. 2C August 31, 2004  
3
DATA SHEET  
FMS6408  
Typical Performance Characteristics  
(TC = 25˚C, Vi = 1Vpp, VCC = 5.0V, all inputs AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150,  
referenced to 400kHz, 0dB peaking option; unless otherwise noted)  
SD Frequency Response  
SD Group Delay vs. Frequency  
60  
40  
20  
0
10  
0
2
1
1
-10  
-20  
-30  
Mkr  
Freq.  
Gain  
Ref 400kHz 6dB  
-20  
-40  
-60  
1
2
3
6.91MHz -1dB BW  
7.8MHz -3dB BW  
-40  
-50  
27MHz  
-43.24dB  
1 = 7.6MHz (31.88ns)  
fSBSD = Gain(ref) – Gain(3) = 49.24dB  
3
400kHz  
5
10  
15  
20  
25  
30  
400kHz  
5
10  
15  
20  
25  
30  
Frequency (MHz)  
Frequency (MHz)  
SD Noise vs. Frequency  
SD Differential Gain  
-50  
-60  
0.2  
0
NTSC  
-70  
-80  
-0.2  
-0.4  
-0.6  
-0.8  
-90  
-100  
-110  
-120  
Min = -0.61  
Max = 0.00  
ppMax = 0.61  
1st  
2nd  
3rd  
4th  
5th  
6th  
0
1.0  
2.0  
3.0  
4.0  
5.0  
6.0  
Frequency (MHz)  
SD Differential Phase  
Bypass Mode Frequency Response  
0.05  
0
7
6
VO = 1.4pp  
5
4
3
2
1
0
1
-0.05  
-0.10  
-0.15  
-0.20  
2
Mkr Frequency  
Gain  
6dB  
Ref 400kHz  
Min = -0.13  
Max = 0.00  
ppMax = 0.13  
1
2
28.75MHz -1dB BW  
36.94MHz -3dB BW  
1st  
2nd  
3rd  
4th  
5th  
6th  
400kHz  
5
10 15 20 25 30 35 40 45  
Frequency (MHz)  
Bypass Mode Group Delay vs. Freq.  
16  
14  
12  
10  
8
1
6
4
2
1 = 25MHz (8.99ns)  
0
400kHz  
5
10 15 20 25 30 35 40 45  
Frequency (MHz)  
4
REV. 2C August 31, 2004  
FMS6408  
DATA SHEET  
Pin Configuration  
Pin#  
Pin  
Type Description  
Y
V
Y
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
INA  
INA  
INA  
CC  
1
Y
Input Y (Luminance) or Green input A, must be  
connected to a signal which includes sync  
INA  
U
V
OUT  
FMS6408  
14-pin  
TSSOP  
2
3
4
5
U
V
Input U or Blue input A  
INA  
BYPASS  
Input V or Red input A  
INA  
U
GND  
OUT  
GND  
Input Must be tied to ground, do not float  
Y
GND  
INB  
Y
Input Y (Luminance) or Green input B, must be  
connected to a signal which includes sync  
INB  
U
V
INB  
OUT  
6
7
8
U
V
Input U or Blue input B  
Input V or Red input B  
INB  
V
IN  
(A/B)  
MUX  
8
INB  
INB  
IN  
(A/B) Input Mux select, A = ‘1’, B = ‘0’, must be  
externally tied high or low  
MUX  
9
V
Output V or Red output  
OUT  
10  
11  
12  
GND  
Input Must to be tied to ground, do not float  
Output U or Blue output  
U
OUT  
BYPASS  
(Bypass/Filter)  
Input Filter bypass, BYPASS = ‘1’, FILTER = ‘0’,  
must be externally tied high or low  
13  
14  
Y
Output Y or Green output  
Input +5V supply  
OUT  
V
CC  
Sync processing is based on the Y/G input channel in all  
operating modes.  
Functional Description  
Introduction  
This product is a three channel monolithic continuous time  
video filter designed for reconstructing YUV, YC CV or  
RGB signals from a video D/A source. Inputs should be AC  
coupled while outputs can be either AC or DC coupled.  
The reconstruction filters approximate a 5th order Butter-  
worth response optimized for minimum overshoot and flat  
group delay. This provides a maximally flat response in  
terms of delay and amplitude. Each of the three outputs is  
capable of driving 2Vpp into 75loads.  
Inputs  
The inputs will typically be driven by either a low impedance  
source of 1Vpp or the output of a 75terminated line driven  
by the output of a current DAC. In either case, the inputs  
must be capacitively coupled to allow the sync-detect and  
DC restore circuitry to operate properly.  
Outputs  
The outputs are low impedance voltage drivers which can  
handle either a single or dual load. A single load consists of  
a 75series termination resistor feeding a 75terminated  
line for a total load at the part of 150. Even when two loads  
are present (75) the driver will produce a full 2Vpp signal  
at its output pin. The driver can also be used to drive an AC  
coupled single or dual load. When driving a dual load either  
output will still function if the other output connection is  
inadvertently shorted providing these loads are AC coupled.  
All channels are clamped during the sync interval to set the  
appropriate dc output level. Sync tip clamping greatly reduces  
the effective input time constant allowing the use of small  
low cost input coupling capacitors. The input will settle to  
10mV in 2ms for typical DC shifts present in the video signal.  
In most applications the input coupling capacitors are 0.1µF.  
The inputs typically sink 1uA of current during active video.  
For YUV signals, this translates into a 2mV tilt in a horizon-  
tal line at the Y output. During sync, the clamp restores this  
leakage current by sourcing an average of 20µA over the  
clamp interval. Any change in the coupling capacitor values  
will affect the amount of tilt per line. Any reduction in tilt  
will come with an increase in settling time.  
REV. 2C August 31, 2004  
5
DATA SHEET  
FMS6408  
Typical Application Diagrams  
+5V  
0.1  
uF  
1.0  
uF  
0.1uF  
0.1uF  
0.1uF  
1
14  
13  
12  
Y
Y
V
CC  
INA  
INA  
FMS6408  
14L TSSOP  
220uF  
220uF  
220uF  
2
3
4
5
6
7
U
U
Y
OUT  
INA  
INA  
INA  
V
V
BYPASS  
INA  
11  
GND  
U
OUT  
300k  
10  
0.1uF  
0.1uF  
0.1uF  
Y
Y
GND  
INB  
INB  
9
8
U
U
V
INB  
INB  
OUT  
10k  
V
V
IN  
MUX  
(A/B)  
INB  
INB  
Figure 1. AC-CoupledYUV Line Driver with Single Video Loads  
+5V  
0.1  
uF  
1.0  
uF  
0.1uF  
0.1uF  
0.1uF  
75 Video Cables  
75  
75  
75  
75  
75  
75  
1
14  
13  
12  
11  
Y
Y
V
CC  
INA  
INA  
75  
75  
75  
75  
75  
75  
FMS6408  
14L TSSOP  
2
U
U
Y
OUT  
INA  
INA  
INA  
3
4
5
6
7
V
V
BYPASS  
INA  
GND  
U
OUT  
300kΩ  
0.1uF  
0.1uF  
0.1uF  
10  
Y
Y
GND  
INB  
INB  
9
8
U
U
V
V
OUT  
INB  
INB  
10kΩ  
V
IN  
(A/B)  
INB  
INB  
MUX  
Figure 2. DC-CoupledYUV Line Driver with Dual Video Loads  
6
REV. 2C August 31, 2004  
FMS6408  
DATA SHEET  
Application Notes  
Pdiss (Y) = (5V - 1.55V) * 20.6mA = 71mW  
Output Drive Capability  
The average DC level for the U and V channels is set by the  
clamp circuit to 1.125V. The signal will be symmetrical  
about this voltage so:  
The FMS6408 can drive dual 75loads where each load  
consists of a 75resistor in series with a 75termination  
resistor in the driven device. This presents a 150load to  
the output so two similar loads in parallel look like 75from  
the output to ground. In some cases it may be desirable to  
drive a single load on one or more outputs with a dual load  
on the remaining outputs. This is an acceptable loading con-  
dition but might cause a slight degradation in gain matching.  
Iload (U) = 1.125V/75= 15mA  
The device dissipation due to this load will be the internal  
voltage drop multiplied by the load current:  
Pdiss (U) = (5V - 1.125V) * 15mA = 58.125mW  
Since the U and V power dissipation are approximately the  
same, the total dissipation due to the load can be estimated  
by:  
Device Power Dissipation  
Pdiss (load) = P (Y) + 2 * P (U) = 71mW +  
(2 * 58.125mW) = 187.55mW  
The FMS6408 specifications provide a quiescent no-load  
supply current of 52mA (typical). With a nominal 5V  
supply, this results in a power dissipation of 260mW. The  
overall power dissipation can be significantly affected by the  
applied load, particularly in DC-coupled applications. In  
order to calculate the total power dissipation the typical  
output voltages and the loading must be known.  
This will bring the typical total device power dissipation to  
260mW (quiescent power) + 187.55mW (load power) or  
447.55mW. It is advisable to calculate the highest possible  
power dissipation using worst-case quiescent supply current  
and the maximum allowable power supply voltage. This  
result should be used when calculating the die temperature  
rise with the supplied θJA, thermal resistance value.  
The highest power dissipation will occur for YUV video sig-  
nals that are DC-coupled into dual video loads. Refer to the  
the diagram in Figure 3 below.  
Field Time Distortion  
In applications with AC-coupled outputs, the AC-coupling  
capacitors will dominate the field time distortion. Perfor-  
mance is specified with 220µF coupling capacitors; if better  
performance is desired, the capacitors may be increased or  
the outputs may be DC-coupled.  
Assume a video signal on the Y channel that averages 50%  
luminance with an output voltage of 1.55V then calculate the  
load current:  
Iload (Y) = 1.55V/75= 20.6mA  
The device dissipation due to this load will be the internal  
voltage drop multiplied by the load current:  
+5V  
75Video Cables  
75Ω  
V
2.25V  
1.55V  
CC  
75Ω  
I
Y
0.85V  
0.25V  
75Ω  
Y
OUT  
Driver  
+ VI  
75Ω  
-
Y
75Ω  
1.825V  
1.125V  
0.425V  
75Ω  
I
U
75Ω  
U
OUT  
Driver  
+ VI  
75Ω  
-
U
75Ω  
1.825V  
1.125V  
0.425V  
75Ω  
I
V
75Ω  
V
OUT  
Driver  
+ VI  
75Ω  
-
V
Figure 3. YUV Video Signals that are DC-Coupled into Dual Video Loads  
REV. 2C August 31, 2004  
7
DATA SHEET  
FMS6408  
Package Dimensions  
7
6
– B –  
MTC-14  
e
N
5
(b)  
2X E/2  
MTC-14  
8
1.0 DIA  
SYMBOL  
MIN  
NOM  
MAX  
1.10  
0.15  
0.95  
0.75  
E1 E  
c
c1  
A
A1  
A2  
L
R
R1  
b
0.05  
0.85  
0.50  
0.09  
0.09  
0.19  
0.19  
0.09  
0.09  
0
0.90  
0.60  
0.22  
1.0  
b1  
1
2 3  
6
ddd C B A  
SECTION AA  
2X  
e /2  
9
N/2 TIPS  
1.0  
0.30  
0.25  
0.20  
0.16  
8
b1  
c
ccc  
D
c1  
01  
L1  
aaa  
bbb  
ccc  
ddd  
e
A2  
A
8
3
7
– A –  
aaa C  
1.0 REF  
0.10  
0.10  
0.05  
0.20  
0.65 BSC  
12 REF  
12 REF  
5.00  
– C –  
b
NX A1  
(02)  
(0.20)  
M
bbb C B A  
R1  
02  
03  
D
– H –  
R
GAGE  
PLANE  
4.90  
4.30  
5.10  
4.50  
E1  
E
e
4.40  
6.4 BSC  
0.65 BSC  
14  
10  
(03)  
A
A
0.25  
01  
L
N
(L1)  
NOTES:  
1
2
3
4
5
All dimensions are in millimeters (angle in degrees).  
Dimensioning and tolerancing per ASME Y14.5–1994.  
Dimensions "D" does not include mold flash, protusions or gate burrs. Mold flash protusions or gate burrs shall not exceed 0.15 per side .  
Dimension "E1" does not include interlead flash or protusion. Interlead flash or protusion shall not exceed 0.25 per side.  
Dimension "b" does not include dambar protusion. Allowable dambar protusion shall be 0.08mm total in excess of the "b" dimension at maximum  
material condition. Dambar connot be located on the lower radius of the foot. Minimum space between protusion and adjacent lead is 0.07mm  
for 0.5mm pitch packages.  
6
7
8
9
Terminal numbers are shown for reference only.  
Datums – A – and – B – to be determined at datum plane – H – .  
Dimensions "D" and "E1" to be determined at datum plane – H – .  
This dimensions applies only to variations with an even number of leads per side. For variation with an odd number of leads per side, the "center"  
lead must be coincident with the package centerline, Datum A.  
10 Cross sections A – A to be determined at 0.10 to 0.25mm from the leadtip.  
8
REV. 2C August 31, 2004  
FMS6408  
DATA SHEET  
Ordering Information  
Lead  
Free  
Output  
Peaking  
Pack  
Qty  
Model  
Part Number  
Mode  
Package  
Container  
FMS6408  
FMS6408  
FMS6408  
FMS6408  
FMS6408MTC141_NL  
FMS6408MTC141X_NL  
FMS6408MTC143_NL  
FMS6408MTC143X_NL  
YUV/RGB  
YUV/RGB  
YUV/RGB  
YUV/RGB  
0dB  
0dB  
TSSOP-14  
TSSOP-14  
TSSOP-14  
TSSOP-14  
Tube  
94  
2500  
94  
Tape and Reel  
Tube  
0.9dB  
0.9dB  
Tape and Reel  
2500  
Temperature range for all parts: 0°C to +70°C.  
Contact Fairchild for ordering information regarding other clamping and peaking options. Refer to the Factory Programming Options Table on  
page 3 for a detailed description of available options.  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION  
OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES  
IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN  
APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems which, (a) are intended for  
surgical implant into the body, or (b) support or sustain life, and (c) whose failure to per  
form when properly used in accordance with instructions for use provided in the labeling,  
can be reasonably expected to result in a significant injury of the user.  
2. A critical component in any component of a life support device or system whose failure  
to perform can be reasonably expected to cause the failure of the life support device or  
system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
© 2004 Fairchild Semiconductor Corporation  

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