FMS6410BCS [FAIRCHILD]
Dual Channel Video Drivers with Integrated Filters and Composite Video Summer; 具有集成滤波器和复合视频夏双通道视频驱动器
| 型号： | FMS6410BCS |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Dual Channel Video Drivers with Integrated Filters and Composite Video Summer |
| 文件： | 总8页 (文件大小：79K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 2005
FMS6410B
Dual Channel Video Drivers with Integrated Filters and
Composite Video Summer
Features
Description
■ 7.1MHz 5th order Y,C filters with composite summer
■ 50dB stopband attenuation at 27MHz on Y, C and CV outputs
■ Better than 0.1dB flatness to 4.5MHz on Y,C and CV outputs
■ No external frequency selection components or clocks
■ < 5ns group delay on Y, C and CV outputs
The FMS6410B is a dual Y/C 5th order Butterworth lowpass
video filter optimized for minimum overshoot and flat group
delay. The device also contains a summing circuit to generate
filtered composite video. In a typical application, the Y and C
input signals from DACs are AC coupled into the filters. Both
channels have DC restore circuitry to clamp the DC input levels
during video sync. The Y and C channels use separate feed-
back clamps. The clamp pulse is derived from the Y channel.
■ AC-Coupled Inputs
■ AC or DC-Coupled Outputs
■ Capable of PAL frequency selection components or clocks
All outputs are capable of driving 2Vpp, AC or DC coupled, into
either a single or dual video load. A single video load consists of
a series 75Ω impedance matching resistor connected to a ter-
minated 75Ω line. This presents a total of 150Ω of loading to the
part. A dual load would be two of these in parallel which would
present a total of 75Ω to the part. The gain of the Y, C and CV
signals is 6dB with 1Vpp input levels. All video channels are
clamped during sync to establish the appropriate output voltage
reference levels.
■ 0.3% differential gain with 0.2° differential phase on Y,C and
CV channels
■ Integrated DC restore circuitry with low tilt
■ Lead (Pb) Free SOIC-8 Package
Applications
■ Cable and Satellite set top boxes
■ DVD players
■ Personal Video Recorders (PVR)
■ Video On Demand (VOD)
Block Diagrams
VCC
7
Sync Strip
Reference and
Timing
YIN
1
8
6
YOUT
6dB
gM
gM
250mV
250mV
+
+
S
CVOUT
CIN
4
5
COUT
6dB
3
GND
©2004 Fairchild Semiconductor Corporation
FMS6410B Rev. 1A
1
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Pin Configuration
Pin Assignments
Pin#
Pin
Type
Description
1
YIN
Input
Luminance (Luma) Input: In a typical system,
this pin is connected to the Luma or compos-
ite video output pin from the external video
encoder.
FAIRCHILD
YIN
NC
1
2
3
4
8
7
6
5
YOUT
VCC
2
3
4
NC
GND
CIN
-
No Connect.
FMS6410B
8L SOIC
Input
Input
Must be tied to Ground
Chrominance (Chroma) Input: In a typical
system, this pin is connected to the Chroma
output pin from the external video encoder.
GND
CIN
CVOUT
COUT
5
6
COUT
Output Filtered Chrominance Video Output from the
IN channel.
C
CVOUT
Output Composite Video Output: This pin is the sum
of YOUT and COUT
.
7
8
VCC
YOUT
Input
+5V supply
Output Filtered Luminance Output from the YIN
channel.
Typical Application Diagram
FMS6410B may also
be DC-Coupled
0.1µF
75Ω
220µF
YOUT
75Ω
1
8
6
YIN
YIN
YOUT
FMS6410B
75Ω
75Ω
75Ω
220µF
To TV
75Ω
CVOUT
0.1µF
220µF
4
CIN
CIN
CVOUT
to VCR
COUT 5
GND
75Ω
VCC
7
3
220µF
COUT
75Ω
5V
0.1µF
10µF
Figure 1. AC or DC-Coupled Application Diagram
2
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FMS6410B Rev. 1A
Absolute Maximum Ratings
Parameter
DC Supply Voltage
Min.
-0.3
Max.
6
Unit
V
Analog and Digital I/O
-0.3
Vcc + 0.3
40
V
Output Current Any One Channel, Do Not Exceed
mA
Note:
Functional operation under any of these conditions in NOT implied. Performance and reliability are guaranteed only if operating con-
ditions are not exceeded.
Reliability Information
Parameter
Min.
Typ.
Max.
150
Unit
°C
Junction Temperature
Storage Temperature Range
-65
150
°C
Lead Temperature (Soldering, 10s)
300
°C
Thermal Resistance (ThetaJA), JEDEC Standard Multi-Layer Test Boards, Still Air
115
°C/W
Recommended Operating Conditions
Parameter
Min.
0
Typ.
Max.
Unit
Operating Temperature Range
Supply Voltage Range
70
°C
V
4.75
5.0
5.25
3
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FMS6410B Rev. 1A
DC Electrical Characteristics
T = 25°C, V = 5V, V = 1V , all inputs AC coupled with 0.1uF, all outputs AC coupled with 220uF into
c
cc
in
pp
150Ω loads, referenced to 400kHz; unless otherwise noted.
Symbol
ICC
Parameter
Supply Current1
Conditions
Min.
Typ.
50
Max
Units
mA
No load
60
Vi
Input Voltage Max
1.4
60
Vpp
PSRR
Power Supply Rejection Ratio
All channels, DC
dB
AC Electrical Characteristics
T = 25°C, V = 5V, V = 1V , all inputs AC coupled with 0.1uF, all outputs AC coupled with 220uF into
c
cc
in
pp
150Ω loads, referenced to 400kHz; unless otherwise noted.
Symbol
AV
Parameter
Channel Gain1
COUT Output Level (during sync)1
YOUT Output Level (during sync)1
CVOUT Output Level (during sync)1 Sync present on YIN (after 6dB gain)
Conditions
Min.
Typ.
6.0
1.0
0.35
0.35
10
Max
6.25
1.3
Units
dB
V
All Channels
5.75
Csync
Ysync
CVsync
TCLAMP
fFLAT
fC
Sync present on YIN (after 6dB gain)
Sync present on YIN (after 6dB gain)
0.5
V
0.5
V
Clamp Response Time (Y channel) Settled to within 10mV
ms
dB
MHz
dB
%
Gain Flatness to 4.5MHz
-3dB Bandwidth1
Stopband Attenuation1
Differential Gain
All Channels
0
All Channels
6.7
42
7.1
50
fSB
All Channels at 27MHz
All Channels
dG
0.3
0.2
0.3
-50
82
dP
Differential Phase
Output Distortion
Crosstalk
All Channels
deg
%
THD
XTALK
SNR
VOUT = 1.4Vpp, 3.58MHz
at 3.58MHz
dB
dB
Signal-to-Noise Ratio
All Channels
NTC-7 weighting, 4.2MHz LP,
100kHz HP
tpd
Propagation Delay
All Channels
115
4
ns
ns
ns
%
GD
Group Delay Deviation
Skew Between YOUT and COUT
All Channels at 3.58MHz
at 1MHz
tSKEW
tCLGCV
tCLDCV
0
1
Chroma-Luma Gain CVOUT
f = 3.58MHz (ref to YIN at 400kHz)
f = 3.58MHz (ref to YIN at 400kHz)
96
100
4
104
Chroma-Luma Delay CVOUT
ns
Notes:
1. 100% tested at 25°C
4
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FMS6410B Rev. 1A
Layout Considerations
Applications Information
General layout and supply bypassing play major roles in high
frequency performance and thermal characteristics. Fairchild
offers a demonstration board, FMS6410BDEMO, to use as a
guide for layout and to aid in device testing and characterization.
The FMS6410BDEMO is a 4-layer board with a full power and
ground plane. For optimum results, follow the steps below as a
basis for high frequency layout:
Functional Description
This product is a two channel monolithic continuous time video
filter designed for reconstructing the luminance and chromi-
nance signals from an S-Video D/A source. Composite video
output is generated by summing the Y and C outputs. The chip
is designed to have AC coupled inputs and will work equally well
with either AC or DC coupled outputs.
•
•
•
•
Include 10µF and 0.1µF ceramic bypass capacitors
The reconstruction filters provide a 5th order Butterworth
response with group delay equalization. This provides a maxi-
mally flat response in terms of delay and amplitude. Each of the
three outputs is capable of driving 2Vpp into a 75Ω load.
Place the 10µF capacitor within 0.75 inches of the power pin
Place the 0.1µF capacitor within 0.1 inches of the power pin
If using DC-coupled outputs, use a large ground plane to help
dissipate heat
All channels are clamped during the sync interval to set the
appropriate minimum output dc level. With this operation the
effective input time constant is greatly reduced, which allows for
the use of small low cost coupling capacitors. The net effect is
that the input will settle to 10mV in 10ms for any DC shifts
present in the input video signal.
•
Minimize all trace lengths to reduce series inductances
In most applications the input coupling capacitors are 0.1µF.
The Y and C inputs typically sink 1µA of current during active
video, which normally tilts a horizontal line by 2mV at the Y out-
put. During sync, the clamp restores this leakage current by
sourcing an average of 20µA over the clamp interval. Any
change in the coupling capacitor values will affect the amount of
tilt per line. Any reduction in tilt will come with an increase in set-
tling time.
Luminance (Y) I/O
The typical luma input is driven by either a low impedance
source of 1Vpp or the output of a 75Ω terminated line driven by
the output of a current DAC. In either case, the input must be
capacitively coupled to allow the sync-detect and DC restore cir-
cuitry to operate properly.
All outputs are capable of driving 2Vpp, AC or DC coupled, into
either a single or dual video load. A single video load consists of
a series 75Ω impedance matching resistor connected to a ter-
minated 75Ω line, this presents a total of 150Ω of loading to the
part. A dual load would be two of these in parallel which would
present a total of 75Ω to the part. The gain of the Y, C and CV
signals is 6dB with 1Vpp input levels.
Chrominance (C) I/O
The chrominance input can be driven in the same manner as
the luminance input but is typically only a 0.7Vpp signal.
Since the chrominance signal doesn't contain any DC content,
the output signal can be AC coupled using as small as a 0.1µF
capacitor if DC coupling is not desired.
Composite Video (CV) Output
The composite video output driver is same as the other outputs.
5
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FMS6410B Rev. 1A
Mechanical Dimensions
6
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FMS6410B Rev. 1A
Ordering Information
Pack
Qty
Model
Part Number
Lead Free Package Container
FMS6410B FMS6410BCS
FMS6410B FMS6410BCSX
Yes
Yes
SOIC-8
SOIC-8
Rail
95
Reel
2500
Temperature range for all parts: 0°C to 70°C.
7
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FMS6410B Rev. 1A
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As used herein:
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the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
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effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I7
8
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FMS6410B Rev. 1A
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