FQB7N65CTM [FAIRCHILD]
650V N-Channel MOSFET; 650V N沟道MOSFET型号: | FQB7N65CTM |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 650V N-Channel MOSFET |
文件: | 总8页 (文件大小:723K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
September 2006
®
QFET
FQB7N65C
650V N-Channel MOSFET
Features
Description
•
•
•
•
•
•
7A, 650V, RDS(on) = 1.4Ω @VGS = 10 V
Low gate charge ( typical 28 nC)
Low Crss ( typical 12 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies, active power factor
correction, electronic lamp ballast based on half bridge
topology.
D
D
G
D2-PAK
G
S
FQB Series
S
Absolute Maximum Ratings
Symbol
Parameter
FQB7N65C
Units
V
VDSS
ID
Drain-Source Voltage
650
7
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
A
4.45
28
A
(Note 1)
IDM
Drain Current
A
VGSS
EAS
IAR
Gate-Source Voltage
± 30
212
V
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
7
EAR
dv/dt
PD
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
17.3
4.5
mJ
V/ns
W
173
- Derate above 25°C
1.38
-55 to +150
W/°C
°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
300
°C
Thermal Characteristics
Symbol
Parameter
FQB7N65C
0.75
Units
°C/W
RθJC
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
62.5
°C/W
©2006 Fairchild Semiconductor Corporation
FQB7N65C Rev. A
1
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Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FQB7N65C
FQB7N65CTM
D2-PAK
330mm
24mm
800
Electrical Characteristics
T
= 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
650
--
--
--
V
∆BVDSS
∆TJ
/
Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C
--
0.8
V/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 650 V, VGS = 0 V
VDS = 520 V, TC = 125°C
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
--
--
--
--
--
--
--
--
1
µA
µA
nA
nA
10
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
100
-100
On Characteristics
VGS(th)
RDS(on)
gFS
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 3.5 A
VDS = 40 V, ID =3.5 A
2.0
--
--
1.2
8
4.0
1.4
--
V
Ω
S
Static Drain-Source On-Resistance
Forward Transconductance
(Note 4)
--
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
--
--
955
100
12
1245
130
16
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
td(on) Turn-On Delay Time
tr
td(off)
tf
VDD = 325 V, ID = 7A,
--
--
--
--
--
--
--
ns
ns
20
50
90
55
28
4.5
12
50
RG = 25 Ω
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
110
190
120
ns
(Note 4, 5)
ns
Qg
VDS = 520 V, ID = 7A,
GS = 10 V
nC
nC
nC
36
--
V
Qgs
Qgd
(Note 4, 5)
--
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
--
--
--
--
--
--
--
7
28
1.4
--
A
A
ISM
VSD
trr
Drain-Source Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = 7 A
--
V
VGS = 0 V, IS = 7 A,
400
3.3
ns
dIF / dt = 100 A/µs
(Note 4)
Qrr
Reverse Recovery Charge
--
µC
NOTES:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 8mH, I = 7A, V = 50V, R = 25 Ω, Starting T = 25°C
AS
DD
G
J
3. I ≤ 7A, di/dt ≤200A/µs, V ≤ BV Starting T = 25°C
DSS, J
SD
DD
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
2
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FQB7N65C Rev. A
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
VGS
Top:
15.0V
10.0V
8.0V
7.0V
6.0V
5.5V
1
10
1
10
Bottom: 5.0V
150oC
-55oC
0
25oC
10
0
10
※Notes:
1. 250µ s Pulse Test
※Notes :
1. VDS = 40V
2. T = 25℃
C
2. 250µ s Pulse Test
-1
10
-1
10
0
10
1
10
2
4
6
8
10
VGS, Gate-Source Voltage [V]
V , Drain-Source Voltage [V]
DS
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
3.0
2.5
101
VGS = 10V
2.0
100
150℃
25℃
1.5
VGS = 20V
※Notes :
1. VGS = 0V
2. 250µ s Pulse Test
※Note: T = 25℃
J
-1
1.0
10
0
5
10
15
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
2000
12
Ciss = Cgs + Cgd (Cds = shorted)
C
oss = Cds + C
gd
C
rss = C
gd
10
8
VDS = 130V
VDS = 325V
VDS = 520V
1600
1200
800
400
0
C
iss
6
C
oss
※Note;
1. VGS = 0 V
2. f =1MHz
4
C
rss
2
※ Note : ID = 7A
0
-1
0
10
1
10
10
0
4
8
12
16
20
24
28
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
3
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FQB7N65C Rev. A
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
1.2
1.1
1.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.9
0.8
※Notes :
1. VGS = 0 V
2. ID= 250 µ A
※Notes :
1. VGS = 10 V
2. ID = 3.5 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T, Junction Temperature [oC]
T, Junction Temperature [oC]
J
J
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
102
8
6
4
2
0
10 µs
100 µs
101
100
1ms
10ms
100ms
Operation in This Area
is Limited by R DS(on)
DC
10-1
* Notes :
1. TC = 25 o
2. TJ = 150 o
3. Single Pulse
C
C
10-2
100
101
102
103
25
50
75
100
125
150
TC, Case Temperature [oC]
VDS, Drain-SourceVoltage[V]
Figure 11. Transient Thermal Response Curve
100
D=0.5
0.2
0.1
10-1
0.05
PDM
0.02
0.01
t1
t2
* Notes :
1. ZθJC(t) = 0.75 0C/W Max.
2. Duty Factor, D=t1/t2
10-2
single pulse
3. TJM - TC = PDM * Z? (t)
JC
10-5
10-4
10-3
10-2
10-1
100
101
t1, Square Wave Pulse Duration [sec]
4
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FQB7N65C Rev. A
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
5
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FQB7N65C Rev. A
Peak Diode Recovery dv/dt Test Circuit & Waveforms
6
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FQB7N65C Rev. A
Mechanical Dimensions
D2-PAK
4.50 ±0.20
9.90 ±0.20
+0.10
–0.05
1.30
0.10 ±0.15
2.40 ±0.20
0.80 ±0.10
1.27 ±0.10
+0.10
0.50
–0.05
2.54 TYP
2.54 TYP
10.00 ±0.20
(8.00)
(4.40)
10.00 ±0.20
(2XR0.45)
0.80 ±0.10
Dimensions in Millimeters
7
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FQB7N65C Rev. A
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Definition
Advance Information
Formative or In
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This datasheet contains the design specifications for
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First Production
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supplementary data will be published at a later date.
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Full Production
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The datasheet is printed for reference information only.
Rev. I20
8
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FQB7N65C Rev. A
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