FQI32N12V2

更新时间:2024-10-29 02:04:02
品牌:FAIRCHILD
描述:120V N-Channel MOSFET

FQI32N12V2 概述

120V N-Channel MOSFET 120V N沟道MOSFET 功率场效应晶体管

FQI32N12V2 规格参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:IN-LINE, R-PSIP-T3针数:3
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.9其他特性:FAST SWITCHING
雪崩能效等级(Eas):439 mJ配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:120 V最大漏极电流 (Abs) (ID):32 A
最大漏极电流 (ID):32 A最大漏源导通电阻:0.05 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PSIP-T3
JESD-609代码:e0元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:175 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):150 W最大脉冲漏极电流 (IDM):128 A
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

FQI32N12V2 数据手册

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®
QFET  
FQB32N12V2/FQI32N12V2  
120V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for DC to DC converters, sychronous rectification,  
and other applications lowest Rds(on) is required.  
32A, 120V, R  
= 0.05@V = 10 V  
DS(on) GS  
Low gate charge ( typical 41 nC)  
Low Crss ( typical 70 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
!
D
"
! "  
"
"
G !  
I2-PAK  
D2-PAK  
FQB Series  
G
S
FQI Series  
!
S
G D S  
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB32N12V2/FQI32N12V2  
Units  
V
V
I
Drain-Source Voltage  
120  
32  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
23  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
128  
± 30  
439  
32  
A
DM  
V
E
I
Gate-Source Voltage  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
15  
mJ  
V/ns  
W
AR  
dv/dt  
4.5  
Power Dissipation (T = 25°C) *  
3.75  
150  
1
A
P
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
W/°C  
°C  
T , T  
-55 to +175  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
1.0  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
40  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Electrical Characteristics  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV  
V
= 0 V, I = 250 µA  
GS D  
Drain-Source Breakdown Voltage  
120  
--  
--  
--  
--  
V
DSS  
BV  
Breakdown Voltage Temperature  
Coefficient  
DSS  
I
= 250 µA, Referenced to 25°C  
0.14  
V/°C  
D
/
T  
J
I
V
V
V
V
= 120 V, V = 0 V  
--  
--  
--  
--  
--  
--  
--  
--  
1
µA  
µA  
nA  
nA  
DSS  
DS  
GS  
Zero Gate Voltage Drain Current  
= 96 V, T = 150°C  
10  
DS  
GS  
GS  
C
I
= 30 V, V = 0 V  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
100  
-100  
GSSF  
DS  
I
= -30 V, V = 0 V  
GSSR  
DS  
On Characteristics  
V
V
V
V
= V , I = 250 µA  
Gate Threshold Voltage  
2.0  
--  
--  
0.043  
25  
4.0  
0.05  
--  
V
S
GS(th)  
DS  
GS  
DS  
GS  
D
R
Static Drain-Source  
On-Resistance  
DS(on)  
= 10 V, I = 16 A  
D
g
= 40 V, I = 16 A  
(Note 4)  
Forward Transconductance  
--  
FS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
--  
--  
--  
1430  
310  
70  
1860  
405  
90  
pF  
pF  
pF  
iss  
V
= 25 V, V = 0 V,  
GS  
DS  
Output Capacitance  
oss  
rss  
f = 1.0 MHz  
Reverse Transfer Capacitance  
Switching Characteristics  
t
t
t
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
--  
--  
--  
--  
--  
--  
--  
16  
190  
114  
158  
41  
42  
390  
238  
326  
53  
ns  
ns  
d(on)  
V
= 60 V, I = 32 A,  
DD  
D
r
R
= 25 Ω  
G
ns  
d(off)  
f
(Note 4, 5)  
(Note 4, 5)  
ns  
Q
Q
Q
nC  
nC  
nC  
g
V
V
= 96 V, I = 32 A,  
DS  
D
8
--  
= 10 V  
gs  
gd  
GS  
18  
--  
Drain-Source Diode Characteristics and Maximum Ratings  
I
Maximum Continuous Drain-Source Diode Forward Current  
--  
--  
--  
--  
--  
--  
--  
32  
128  
1.4  
--  
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current  
SM  
V
t
V
V
= 0 V, I = 32 A  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
--  
V
SD  
GS  
S
= 0 V, I = 32 A,  
123  
0.54  
ns  
µC  
rr  
GS  
S
dI / dt = 100 A/µs  
(Note 4)  
Q
Reverse Recovery Charge  
--  
F
rr  
Notes:  
1. Repetitive Rating : Pulse width limited by maximum junction temperature  
2. L = 0.5mH, I = 32A, V = 50V, R = 25 Ω, Starting T = 25°C  
AS  
DD  
G
J
3. I 32A, di/dt 200A/µs, V BV  
Starting T = 25°C  
SD  
DD  
DSS,  
J
4. Pulse Test : Pulse width 300µs, Duty cycle 2%  
5. Essentially independent of operating temperature  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Typical Characteristics  
VGS  
2
Top :  
15.0 V  
10.0 V  
8.0 V  
7.0 V  
6.0 V  
5.5 V  
5.0 V  
10  
102  
101  
100  
o
175 C  
o
1
10  
25 C  
Bottom: 4.5 V  
o
-55 C  
0
10  
Notes :  
Notes :  
μ
1. VDS = 40V  
1. 250 s Pulse Test  
μ
2. 250 s Pulse Test  
2. TC = 25  
-1  
10  
-1  
10  
100  
101  
2
4
6
8
10  
VDS, Drain-Source Voltage [V]  
VGS, Gate-Source Voltage [V]  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
160  
140  
120  
100  
80  
102  
101  
100  
VGS = 10V  
60  
175  
25  
VGS = 20V  
40  
Notes :  
1. V = 0V  
2. 250 s Pulse Test  
20  
GS μ  
Note : T = 25  
J
-1  
0
10  
0
20  
40  
60  
80  
100  
120  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
ID, Drain Current [A]  
VSD, Source-Drain voltage [V]  
Figure 3. On-Resistance Variation vs  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation with Source Current  
and Temperature  
3500  
12  
10  
8
C
iss = Cgs + Cgd (Cds = shorted)  
oss = Cds + Cgd  
Crss = Cgd  
C
3000  
2500  
2000  
1500  
1000  
500  
VDS = 30V  
VDS = 60V  
VDS = 96V  
C
iss  
6
Coss  
4
Notes ;  
1. VGS = 0 V  
2. f = 1 MHz  
C
rss  
2
Note : ID = 32A  
40  
0
10  
0
-1  
100  
101  
0
10  
20  
30  
50  
VDS, Drain-Source Voltage [V]  
QG, Total Gate Charge [nC]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Typical Characteristics (Continued)  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.2  
1.1  
1.0  
Notes :  
0.9  
0.8  
1. VGS = 0 V  
2. ID = 250  
Notes :  
μ
A
1. VGS = 10 V  
2. ID = 16 A  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
TJ, Junction Temperature [oC]  
TJ, Junction Temperature [oC]  
Figure 7. Breakdown Voltage Variation  
vs Temperature  
Figure 8. On-Resistance Variation  
vs Temperature  
103  
102  
101  
100  
35  
Operation in This Area  
is Limited by R DS(on)  
30  
25  
20  
15  
10  
5
100 µs  
1 ms  
10 ms  
DC  
Notes :  
1. TC = 25 o  
2. TJ = 175 o  
C
C
3. Single Pulse  
-1  
10  
0
25  
100  
101  
102  
50  
75  
100  
125  
150  
175  
TC, Case Temperature [ ]  
VDS, Drain-Source Voltage [V]  
Figure 9. Maximum Safe Operating Area  
Figure 10. Maximum Drain Current  
vs Case Temperature  
1 0 0  
D = 0 .5  
N o te s  
:
0 .2  
/W M a x .  
1 . Z θ (t)  
=
1 .0  
J C  
2 . D u ty F a c to r, D = t1 /t2  
0 .1  
1 0 -1  
3 . T J M  
-
T C  
=
P D  
* Z θ (t)  
M J C  
0 .0 5  
0 .0 2  
0 .0 1  
PDM  
t1  
t2  
s in g le p u ls e  
1 0 -2  
1 0 -5  
1 0 -4  
1 0 -3  
1 0 -2  
1 0 -1  
1 0 0  
1 0 1  
t
1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]  
Figure 11. Transient Thermal Response Curve  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Gate Charge Test Circuit & Waveform  
VGS  
Same Type  
50K  
as DUT  
Qg  
12V  
200nF  
10V  
300nF  
VDS  
VGS  
Qgs  
Qgd  
DUT  
3mA  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
10V  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Unclamped Inductive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS - VDD  
L
1
2
2
----  
EAS  
=
LIAS  
VDS  
ID  
BVDSS  
IAS  
RG  
VDD  
ID (t)  
VDD  
VDS (t)  
DUT  
10V  
t p  
t p  
Time  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Package Dimensions  
D2-PAK  
4.50 ±0.20  
9.90 ±0.20  
+0.10  
–0.05  
1.30  
0.10 ±0.15  
2.40 ±0.20  
0.80 ±0.10  
1.27 ±0.10  
+0.10  
0.50  
–0.05  
2.54 TYP  
2.54 TYP  
10.00 ±0.20  
(8.00)  
(4.40)  
10.00 ±0.20  
(2XR0.45)  
0.80 ±0.10  
Dimensions in Millimeters  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
Package Dimensions (Continued)  
I2-PAK  
4.50 ±0.20  
9.90 ±0.20  
+0.10  
0.05  
1.30  
1.27 ±0.10  
1.47 ±0.10  
0.80 ±0.10  
+0.10  
0.05  
0.50  
2.40 ±0.20  
2.54 TYP  
2.54 TYP  
10.00 ±0.20  
Dimensions in Millimeters  
©2003 Fairchild Semiconductor Corporation  
Rev. A, December 2003  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not  
intended to be an exhaustive list of all such trademarks.  
ACEx™  
FACT Quiet series™ LittleFET™  
Power247™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
ActiveArray™  
Bottomless™  
CoolFET™  
FAST®  
MICROCOUPLER™ PowerTrench®  
FASTr™  
FRFET™  
MicroFET™  
MicroPak™  
QFET™  
QS™  
CROSSVOLT™ GlobalOptoisolator™ MICROWIRE™  
QT Optoelectronics™ TinyLogic®  
DOME™  
GTO™  
HiSeC™  
I2C™  
ImpliedDisconnect™ OCXPro™  
ISOPLANAR™  
MSX™  
MSXPro™  
OCX™  
Quiet Series™  
TINYOPTO™  
TruTranslation™  
UHC™  
EcoSPARK™  
E2CMOS™  
EnSigna™  
FACT™  
Across the board. Around the world.™  
The Power Franchise™  
RapidConfigure™  
RapidConnect™  
SILENT SWITCHER® UltraFET®  
OPTOLOGIC®  
OPTOPLANAR™  
PACMAN™  
POP™  
SMART START™  
SPM™  
Stealth™  
VCX™  
SuperFET™  
Programmable Active Droop™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY  
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY  
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;  
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR  
CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body,  
or (b) support or sustain life, or (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in significant injury to the user.  
2. A critical component is any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In  
Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
©2003 Fairchild Semiconductor Corporation  
Rev. I6  

FQI32N12V2 相关器件

型号 制造商 描述 价格 文档
FQI32N12V2TU FAIRCHILD Power Field-Effect Transistor, 32A I(D), 120V, 0.05ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, I2PAK-3 获取价格
FQI32N20C FAIRCHILD 200V N-Channel MOSFET 获取价格
FQI33N10 FAIRCHILD 100V N-Channel MOSFET 获取价格
FQI33N10L FAIRCHILD 100V LOGIC N-Channel MOSFET 获取价格
FQI33N10TU FAIRCHILD Power Field-Effect Transistor, 33A I(D), 100V, 0.052ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, I2PAK-3 获取价格
FQI34N20 FAIRCHILD 200V N-Channel MOSFET 获取价格
FQI34N20L FAIRCHILD 200V LOGIC N-Channel MOSFET 获取价格
FQI34P10 FAIRCHILD 100V P-Channel MOSFET 获取价格
FQI34P10TU FAIRCHILD Power Field-Effect Transistor, 33.5A I(D), 100V, 0.06ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, I2PAK-3 获取价格
FQI34P10TU_NL FAIRCHILD Power Field-Effect Transistor, 33.5A I(D), 100V, 0.06ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, I2PAK-3 获取价格

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