FSA1157P6_NL [FAIRCHILD]

SPST, 1 Func, 1 Channel, CMOS, PDSO6, 1.25 MM, LEAD FREE, SC-70, SC-88, 6 PIN;


型号：	FSA1157P6_NL
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	SPST, 1 Func, 1 Channel, CMOS, PDSO6, 1.25 MM, LEAD FREE, SC-70, SC-88, 6 PIN 光电二极管
文件：	总11页 (文件大小：756K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

January 2008

FSA1156, FSA1157

Low-R_ONLow-Voltage SPST Analog Switch

Features

General Description

■ Maximum 0.9Ω R_ONfor 4.5V Supply at 25°C

■ 0.3Ω Maximum R_ONFlatness for 4.5V Supply

■ Broad V_CCOperating Range: 1.65V to 5.5V

■ Fast Turn-on and Turn-off Time

The FSA1156 and FSA1157 are high-performance Sin-

gle-Pole / Single-Throw (SPST) analog switches. The

devices feature ultra-low R_ONof 0.75Ω (typical) and

operate over a wide V_CCrange of 1.65V to 5.5V. The

devices are fabricated with sub-micron CMOS technol-

ogy to achieve fast switching speeds. The select input is

TTL-level compatible. The FSA1156 has normally open

operation; the FSA1157 has normally closed operation.

■ Over-voltage Tolerant, TTL-compatible Control Input

■ Available in SC70 and MicroPak™ Space-saving,

Surface-mount Packages

Ordering Information

Order

Number

Package

Number

Top Mark

Package Description

Packing Method

FSA1156P6

FSA1156P6X

FSA1156L6X

FSA1157P6

FSA1157P6X

FSA1157L6X

MAA06A

MAC06A

MAA06A

MAC06A

156

6-Lead SC70, EIAJ SC88, 1.25mm Wide

6-Lead MicroPak, 1.0mm Wide

250 Units Tape and Reel

3000 Units Tape and Reel

5000 Units Tape and Reel

250 Units Tape and Reel

3000 UnitsTape and Reel

5000 UnitsTape and Reel

157

6-Lead SC70, EIAJ SC88, 1.25mm Wide

6-Lead MicroPak, 1.0mm Wide

All packages are lead free per JEDEC: J-STD-020B standard.

MicroPak™ is a trademark of Fairchild Semiconductor Corporation.

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

Analog Symbols

Pin Assignment for MicroPak™

Pin Assignment for SC70 Package

GND

V_CC

GND

(Top View)

FSA1156 (Normally Open)

(Top Through View)

FSA1156 (Normally Open)

GND

V_CC

GND

(Top View)

FSA1157 (Normally Closed)

(Top Through View)

FSA1157 (Normally Closed)

Figure 1. Pin Configurations

Truth Table

Pin Descriptions

Control

Input(s)

Pin Names

Function

Data Ports

FSA1156

FSA1157

A, B

LOW Logic Level

HIGH Logic Level

OFF

Control Input

No Connect

OFF

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-

ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-

tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The

absolute maximum ratings are stress ratings only.

Symbol

V_CC

V_SW

V_IN

Parameter

Min.

–0.5

Max.

+6.0

Unit

Supply Voltage

Switch Voltage^(1.)

Input Voltage^(1.)

Input Diode Current

Switch Current

V_CC+0.5V

+6.0

I_IK

–50

°C

I_SW

200

I_SWPEAKPeak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle)

400

P_D

T_STG

T_J

Power Dissipation at 85°C, SC70 Package

Storage Temperature Range

180

–65

+150

+260

8000

Maximum Junction Temperature

Lead Temperature (Soldering, 10 seconds)

Human Body Model

T_L

ESD

Note:

1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Symbol

V_CC

V_IN

Parameter

Min.

1.65

Max.

5.50

V_CC

+85

Unit

Supply Voltage

Control Input Voltage^(2.)

Switch Input Voltage

Operating Temperature

V_SW

T_A

−40

350

°C

Θ_JA

Thermal Resistance in Still Air, SC70 package

°C/W

Note:

2. Control input must be held HIGH or LOW. It must not float.

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

DC Electrical Characteristics

All typical values are at 25°C unless otherwise specified.

T = −40°C to

T = +25°C

+85°C

(V)

Symbol

Parameter

Conditions

Unit

Min. Typ. Max. Min. Max.

2.7 to 3.6

4.5 to 5.5

2.7 to 3.6

4.5 to 5.5

2.7 to 3.6

4.5 to 5.5

2.0

2.4

0.6

0.8

V_IH

V_IL

I_IN

Input Voltage High

Input Voltage Low

-1.0

1.0

Control Input Leak-

age

V_IN= 0V to V_CC

μA

I_NO(OFF)

I_NC(OFF)

A = 1V, 4.5V;

B = 4.5V, 1V

Off Leakage Current

On Leakage Current

5.5

–2.0

-4.0

2.0

20.0 20.0

-40.0 40.0

A = 1V, 4.5V;

B = 1V, 4.5V or Floating

I_A(ON)

4.0

2.1

I_OUT= 100mA, B = 1.5V

2.7

4.5

1.4

2.5

Switch On

R_ON

Resistance^(3.)

_OUT= 100mA, B = 3.5V

0.75 0.90

1.00

I_OUT= 100mA;

B₀= 0V, 0.75V, 1.5V

2.7

4.5

0.6

On Resistance

Flatness^(4.)

R_FLAT(ON)

I_OUT= 100mA;

B₀= 0V, 1V, 2V

0.1

0.2

0.3

3.6

5.5

0.1

0.5

1.0

Quiescent Supply

Current

V_IN= 0V or V_CC

I_OUT= 0V

I_CC

μA

Notes:

3. On resistance is determined by the voltage drop between the A and B pins at the indicated current through the switch.

4. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified

range of conditions.

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

AC Electrical Characteristics

All typical values are at 25°C unless otherwise specified.

T = -40°C to

T =+25°C

Figure

Number

+85°C

(V)

Symbol Parameter

Conditions

Unit

Min. Typ. Max. Min. Max.

B = 1.5V, R_L= 50Ω,

C_L= 35pF

2.7 to 3.6

4.5 to 5.5

2.7 to 3.6

4.5 to 5.5

t_ON

Turn-On Time

Turn-Off Time

Figure 4

B = 3.0V, R_L= 50Ω,

C_L= 35pF

B = 1.5V, R_L= 50Ω,

C_L= 35pF

t_OFF

B = 3.0V, R_L= 50Ω,

C_L= 35pF

C_L= 1.0nF,

V_GE= 0V,

2.7 to 3.6

4.5 to 5.5

Charge

Injection

Figure 5

Figure 6

R_GEN= 0Ω

f = 1MHz, R_L= 50Ω 2.7 to 3.6

-65

OIRR Off Isolation

4.5 to 5.5

R_L= 50Ω

2.7 to 3.6

4.5 to 5.5

2.7 to 3.6

300

−3db Band-

width

MHz Figure 7

300

R_L= 600Ω,

V_IN= 0.5V_PP

f = 20Hz to 20kHz

0.001

Total Harmonic

THD

Figure 8

Distortion

4.5 to 5.5

0.001

Capacitance

T = +25°C

Figure

Number

(V)

Symbol

Parameter

Conditions

Units

Min.

Typ. Max.

C_IN

C_OFF

C_ON

Control Pin Input Capacitance

A/B Port Off Capacitance

A/B Port On Capacitance

f = 1MHz

0.0

Figure 9

4.5

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

Typical Characteristics

1.6

1.4

1.2

1.0

V_CC= 2.7V

V_CC= 3.6V

V_CC= 4.5V

0.0

0.6

0.4

0.2

V_CC= 5.0V

_IN(V)

Figure 2. On Resistance vs. Input Voltage, Over Supply Voltage, T_A=25°

1.2

V_CC= 4.5V

_A= 85°C

1.0

0.8

0.6

0.4

0.2

T_A= 25°C

T_A= 40°C

_IN(V)

Figure 3. On Resistance vs. Input Voltage, Over Temperature

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

AC Loading and Waveforms

V_CC

t_r= t_f= 2ns

10%–90%

V_CC

V_INL

Control

Input

50%

V_B

V_OUT

C_L

35Ω

R_L

50Ω

t_OFF

V_OUT

Switch

Output

0.9 x V_OUT

GND

I_ON

C_LIncludes Fixture and Stray Capacitance

Logic Input Waveforms Inverted for Switches

that have the Opposite Logic Sense

Figure 4. Turn-On / Off Timing

V_CC

ΔV_OUT

V_OUT

R_GEN

V_OUT

OFF

C_L

V_GE

GND

OFF

Control

Input

Q = (ΔV_OUT)(C_L)

Figure 5. Charge Injection

V_CC10nF

Network

Analyzer

OUT

OFF-ISOLATION = 20log

ON-LOSS = 20log

50Ω

V_IN

V_CC

0 or V_CC

OUT

0dBm

V_OUT

MEAS

50Ω

REF

GND

50Ω

Figure 6. Off Isolation

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

AC Loading and Waveforms (Continued)

10nF

Signal

V_CC

Generator

Analyzer

0dBm

50Ω

Logic Input

0V or V_CC

GND

Figure 7. Bandwidth

10nF

V_CC

Analyzer

B_N

Signal

Generator

Logic Input

0V or V

GND

Figure 8. Harmonic Distortion

V_CC

10nF

V_CC

Capacitance

Meter

f = 1MHz

GND

Figure 9. On / Off Capacitance

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

Physical Dimensions

Figure 10. 6-Lead SC70, EIAJ SC88, 1.25mm Wide

Note: click here for tape and reel specifcations, available at:

http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

Physical Dimensions (Continued)

0.05

1.45

(1)

0.05 C

(0.49)

1.00

(0.75)

(0.52)

TOP VIEW

0.55MAX

(0.30)

PIN 1

0.05 C

0.05

0.00

RECOMMENED

LAND PATTERN

0.05 C

0.45

0.35

0.10

0.00

0.25

0.15

0.10

1.0

DETAIL A

C B A

0.40

0.05

0.30

0.35

0.25

0.40

0.30

DETAIL A

PIN 1 TERMINAL

0.075 X 45

CHAMFER

0.5

BOTTOM VIEW

(0.05)

(0.13)

Notes:

1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD

2. DIMENSIONS ARE IN MILLIMETERS

3. DRAWING CONFORMS TO ASME Y14.5M-1994

MAC06AREVC

Figure 11. 6-Lead MicroPak, 1.0mm Wide

Note: click here for tape and reel specifcations, available at:

http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

FSA1156, FSA1157 • Rev. 1.0.3

www.fairchildsemi.com

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