FSA221_12_技术文档

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translated into Chinese!

April 2012

FSA221 — USB2.0 High-Speed (480Mbps) and

Audio Switches with Negative Signal Capability

Features

Description

The FSA221 is a Double-Pole, Double Throw (DPDT)

multiplexer that combines a low-distortion audio and a

USB2.0 High-Speed (HS) switch path. This

configuration enables audio and USB data to share a

common connector port. The architecture is designed to

allow audio signals to swing below ground. This means

a common USB and headphone jack can be used for

personal media players and portable peripheral devices.

.

HS-USB: 4Ω Typical On Resistance

HS-USB: 4.5pF Typical On Capacitance

Audio: 3Ω Typical On Resistance

-3db Bandwidth: > 720MHz

Low Power Consumption

Power-off Protection on Common D+/R, D-/L Ports

Since USB2.0 is an industry standard for shared data-

path in portable devices, the FSA221 also incorporates

a V_busdetection capability. The FSA221 includes a

power-off feature to minimize current consumption when

V_busis not present. This power-off circuitry is available

for the common D+/R, D-/L ports only. Typical

applications involve switching in portables and

consumer applications, such as cell phones, digital

cameras, and notebooks with hubs or controllers.

Automatically Detects V_busfor Switch Path

Selection

Applications

.

Cell Phone, PDA, Digital Camera, and Notebook

LCD Monitor, TV, and Set-Top Box

Ordering Information

Part Number

Package Number Top Mark

Package Description

FSA221L10X

FSA221MUX

FSA221UMX

MAC10A

MUA10A

UMLP10A

GK

FSA221

GL

10-Lead MicroPak™, JEDEC MO-255, 1.6 x 2.1mm

10-Lead MSOP JEDEC MO-187, 3.0 mm Wide

10-Lead Quad, Ultrathin MLP, 1.4 x 1.8mm

V_bus

ASel

Switch Select

Control Circuitry

V_AUDIO

R

pd

D+

R

GND

D+/R

D-/L

D--

L

Figure 1.

Analog Symbol

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

Pin Assignments

Vbus

10

1

9

D+

1

10

9

Vbus

R

2

D-

1

D+

ASel

D-

R

2

3

ASel

D+/R

3

4

10 D+

9

L

GND

Vaudio

2

3

4

D-

R

L

D+/R

D-/L

8

7

6

8

Vbus

L

4

5

7

D-/L

5

8

ASel

6

7

GND

Vaudio

D-/L D+/R

6

Vaudio

5

GND

Figure 2. 10-Lead MicroPak™

Figure 3. 10-Lead MSOP

Figure 4. 10-Lead UMLP

Pin Descriptions

Name

Description

V_audio

V_bus

Power supply (Audio)

Power supply (USB) and auto USB switch-path select

Audio select to override auto USB detect when V_AUDIOsupply is present

USB data bus input sources

A_Sel

D+, D-

R, L

Audio right and left input sources

D+/R, D-/L USB and audio common connector ports

Truth Table

(1)

A_Sel

V_audio

V_bus

L, R

D+, D-

LOW

HIGH⁽²⁾

LOW

HIGH⁽²⁾

LOW

HIGH⁽²⁾

OFF

ON

OFF

ON

OFF

ON

LOW

HIGH

OFF

ON

OFF

Notes:

1. A_Sel- Internal resistor to GND provides auto-V_busdetect if there is no external connection. Forcing A_SelHIGH

when V_AUDIOis present overrides the USB path even if V_busis present.

2. HIGH - Value is the threshold as defined to meet USB2.0 V_busrequirements and audio supply threshold in a

system (see DC Tables).

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

2

Functional Description

The FSA221 is a combined USB and audio switch that

enables sharing the D+/D- lines of a USB connector with

stereo audio CODEC outputs. The switch is optimized

for high-speed USB signals and includes an automatic

V_bus-detection circuit. When a USB connector, rather

than a headphone, is connected to the ultra-portable

device the switch is automatically configured for high-

speed USB data transfer. If no V_busis detected, and yet

V_AUDIOis present, the switch is configured for the low-

distortion audio switch path. The audio switch path also

handles negative signals (down to -2V), which

eliminates the need for large coupling capacitors.

control, to the audio path. The A_Selpin is internally

terminated by a resistor to GND (typical value 3M) and

requires no connection for the standard ultra-portable

(cell-phone, MP3, or portable media player). In an

application where the supply to the FSA221 V_buspin is

not guaranteed to be removed, a GPIO pin can be used

to switch out of high-speed USB mode into audio mode,

using the A_Selpin.

The FSA221 V_buspin must be connected directly to V_bus

or a supply > 3.8V, not an LDO regulated down to 3.6V

or a V_bat-generated supply that may fall below 3.8V in

normal operation.

For those applications where the V_busis generated as a

self-powered device or where V_busis not removed, the

A_Selpin provides the ability to switch, under software

Application Diagram

V_bus

3.0V - 3.6V

A_Sel

5V

V_audio

Switch Select

Control Circuitry

R

pd

D+

R

USB 2.0

Source

GND

D+/R

D-/L

V_bus

USB

Mini-AB

Connector

D-

L

ID

Audio

CODEC

GND

Figure 5.

Typical Application

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameter

Min.

Max.

Unit

V_AUDIO

V_BUS

/

Supply Voltage

-0.5

6.0

V

D+, D-, D+/R, D-/L Pins

R, L, Pins

V_BUS-7.0 V_BUS+0.3

V_AUDIO-7.0 V_AUDIO-0.3

V

V_SW

Switch I/O Voltage⁽³⁾

A_SEL

I_IK

Control Input Voltage⁽³⁾

-0.5

-50

6.0

V

Input Clamp Diode Current

mA

USB

50

I_SW

Switch I/O Current (Continuous)

mA

Audio

USB

100

Peak Switch Current (Pulsed at 1ms

Duration, <10% Duty Cycle)

I_SWPEAK

Audio

100

T_STG

T_J

Storage Temperature Range

-65

+150

+260

Level 1

7500

12000

2000

°C

Maximum Junction Temperature

Lead Temperature (Soldering, 10 seconds)

T_L

MSL

Moisture Sensitivity Level (JEDEC J-STD-020A)

I/O to GND

Human Body Model

All Other Pins

(JEDEC: JESD22-A114)

ESD

V

V_AUDIOV_BUSto GND

Charged Device Model (JEDEC: JESD22-C101)

Note:

3. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameter

Minimum

Maximum

V_AUDIO

V_BUS

A_Sel

Supply Voltage

3.0V

4.25V

0V

4.2V

5.50V

Supply Voltage

Control Input Voltage

V_AUDIO

V

_AUDIO–6.5V

V_AUDIO–0.3V

V_BUS

V_SW

Switch I/O Voltage

V_BUS–6.5V

-40°C

T_A

Operating Temperature

85°C

Thermal Resistance (Free Air)

MicroPak™

330°C / W (Estimated)

_JA

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

4

DC Electrical Characteristics

All typical values are at T_A=25°C unless otherwise specified.

T_A=- 40°C to

+85°C

V_AUDIO

(V)

Symbol

Parameter

Condition

Unit

Min. Typ. Max.

Common Pins

V_IK

V_IH

V_IL

Clamp Diode Voltage

3.0

I_IK=-18mA

-1.2

Control Input Voltage HIGH 3.0 to 3.6

Control Input Voltage LOW 3.0 to 3.6

1.2

V

0.5

V_IN=3.6V

V_IN=0V

-1

10

1

I_IN

A_SelInput HIGH Current

3.6

µA

Power-Off Leakage Current

(Common Port Only D+/R,

D-/L)

V_AUDIO

=

Common Port (D+/R, D-/L), V_SW=0V

_BUS=0V to 5.5V

I_OFF

10

50

V

V_BUS=0V, 5. 5V, D+/R, D-/L=0.3V,

Off-Leakage Current of Port

D+, D-, R, L

I_NO(0FF)

4.2

V

_AUDIO– 0.3V, D+, D-, R, L=0.3V,

_AUDIO–0.3V or Floating, Figure 11

-50

1

nA

V_bus=0V, 5.5V, D+/R, D-/L=0.3V,

_AUDIO– 0.3V, D+, D-, R, L=Floating, -50

Figure 12

On-Leakage Current of Port

D+/R or D-/L

I_NC(0N)

V

1

3

nA

A_SelInternal Pull-Down

R_PD

M

Resistor

USB Switch Path

USB Analog Signal Range

V_BUS(V)

4.25

0

3.6

6

V

Ω

V

_D+/D-=0V, 0.4V, I_ON=-8mA,

_AUDIO=3V

R_ONUSBHS Switch On Resistance⁽⁴⁾

4

(5,6)

∆R_ONUSBHS Delta R_ON

4.25

V_D+/D-=0V, I_ON=-8mA, V_AUDIO=3V

0.4

Audio Switch Path

V_AUDIO(V)

V_AUDIO

– 5.5

Audio Analog Signal Range

V_AUDIO

5

V

Audio Switch On

R_ONAudio

V_L/R=-2V, 0V, 0.7V, V_BUS=0V,

V_AUDIO-0.7V, V_AUDIO, I_ON=-26mA

3.0

3

Ω

Resistance⁽⁴⁾

(5)

∆R_ONAudioAudio Delta R_ON

3.0

V_L/R=0.7V I_ON=-26mA

I_ON=-26mA

0.4

1.5

Ω

R_FLAT(Audio)Audio R_ONFlatness⁽⁷⁾

2.5

Power Supply

V_busth

V_audiothV_AUDIOThreshold

Quiescent Supply Current

V_BUSThreshold Voltage

3.2

0.5

3.8

1.5

V

I_CC(Audio)

4.2

V_ASel=0 to V_AUDIO, I_OUT=0

6

10

20

µA

(Audio)

Quiescent Supply Current

I_CC(Vbus)

V_ASel=0 to V_AUDIO, I_OUT=0, V_BUS=5.5V

12

(V_BUS

)

V_ASel=2.6V, V_BUS=Floating

V_ASel=1.8V, V_BUS=Floating

10

14

15

18

Increase in I_CCCurrent per

Control Voltage and V_CC

I_CCT

µA

Notes:

4. On resistance is determined by the voltage drop between the A and B pins at the indicated current through the switch.

5. ∆ R_ON=R_{ON max}– R_{ON min}measured at identical V_CC, temperature, and voltage. Worst-case signal path, audio, or

USB channel, is characterized.

6. Guaranteed by characterization, not production tested.

7. Flatness is defined as the difference between the maximum and minimum values of on resistance over the

specified range of conditions.

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

5

AC Electrical Characteristics

All typical value are for V_AUDIO=3.3V and V_bus=5.0 at T_A=25ºC unless otherwise specified.

T_A=- 40°C to +85°C

Min. Typ. Max.

V

_AUDIO/ V_BUS

(V)

Symbol

Parameter

Condition

Unit

V_{D+/R, D-/L}=1.0V,

R_L=50Ω, C_L=50pF

Figure 13, Figure 15

Turn-On Time V_AUDIO↑ to

Output

t_ONAUDIO1

V_BUS=0V

10

2

μs

V

_{D+/R, D-/L}=1.0V,

V_AUDIO=3.0

for V_BUS

t_OFFAUDIO1Turn-Off Time V_Bus↑ to Output

t_ONAUDIO2Turn-On Time A_Selto Output

t_OFFAUDIO2Turn-Off Time A_Selto Output

t_ONAUDIO3Turn-On Time V_Bus↓ to Output

R_L=50Ω, C_L=50pF

Figure 13, Figure 15

↑

V_{D+/R, D-/L}=1.0V,

V_BUS=4.25V

V_AUDIO=3.0

R_L=50Ω, C_L=50pF

Figure 13, Figure 14

V_{D+/R, D-/L}=1.0V,

V_BUS=4.25V

R_L=50Ω, C_L=50pF

Figure 13, Figure 14

2

V_AUDIO=3.0

V_{D+/R, D-/L}=1.0V,

V_AUDIO=3.0 R_L=50Ω, C_L=50pF

10

Figure 13, Figure 15

V_{D+/R, D-/L}=1.0V,

V_AUDIO=3.0 R_L=50Ω, C_L=0pF

Figure 13, Figure 15

t_ONUSB

Turn-On Time V_USB↑ to Output

V_{D+/R, D-/L}=1.0V,

V_AUDIO=3.0 R_L=50Ω, C_L=0pF

Figure 13, Figure 15

t_OFFUSBTurn-Off Time V_USB↓ to Output

10

μs

ns

dB

USB Switch Propagation

V_AUDIO=3.0 R_L=50Ω, C_L=0pF,

t_PDUSB

0.25

Delay⁽⁸⁾

V_BUS=4.25V Figure 16

f=20kHz, R_T=32Ω,

C_L=0pF

Figure 7, Figure 21

Non-Adjacent Channel

Xtalk_A

V_AUDIO=3.0

V_BUS=4.25V

-110

Crosstalk - Audio

R_T=50Ω, C_L=0pF,

Signal 0dBm

Figure 9, Figure 19

V

_AUDIO=3.0

BW

-3db Bandwidth - USB

720

MHz

%

V_BUS=4.25V

f=20Hz to 20kHz,

R_L=32Ω, V_IN=2V_pp

Figure 24

V_AUDIO=3.0

_BUS=0V

THD

Total Harmonic Distortion

0.05

V

Note:

8. Guaranteed by characterization, not production tested.

www.fairchildsemi.com

FSA221 • Rev. 1.1.0

6

USB High-Speed-Related AC Electrical Characteristics

T_A= -40°C to +85°C.

V_AUDIO

/

Symbol

t_SK(o)

Parameter

Conditions

Typ. Unit

V_BUS(V)

Channel-to-Channel V_AUDIO=3.0V t_R=t_F=750ps (10-90%) at 240MHz C_L=0pF, R_L=50Ω

35

Skew⁽⁹⁾

V_BUS=4.25V Figure 17, Figure 18

ps

35

Skew of Opposite

Transitions of the

Same Output⁽⁹⁾

V_AUDIO=3.0V t_R=t_F=750ps (10-90%) at 240MHz C_L=0pF, R_L=50Ω

_BUS=4.25V Figure 17, Figure 18

t_SK(P)

V

_AUDIO=3.0V R_L=50ꢀ, C_L=50pF, t_R=t_F=500ps (10-90%) at

t_J

Total Jitter⁽⁹⁾

130

ps

_BUS=4.25V 480Mbps (PRBS=2¹⁵– 1)

Note:

9. Guaranteed by characterization, not production tested.

Capacitance

T_A= -40°C to +85°C.

Symbol

Parameter

V_AUDIO/ V_BUS(V)

Condition

Typ. Unit

Control Pin Input

Capacitance (A_Sel

C_{IN (ASel)}

V

_AUDIO=3.0V, V_BUS=4.25V

V_Bias=0.2V

2.0

4.5

9.0

1.5

3.0

pF

)

V_AUDIO=3.0V, V_BUS=4.25V,

A_Sel=0V (C_ONUSB

V_Bias=0.2V, f=240MHz,

)

Figure 23

D+/R, D-/L (Source Port)

On Capacitance

C_{ON(D+/R, D-/L)}

V_AUDIO=3.0V, V_BUS=4.25V,

A_Sel=3.0V (C_ONAudio

V_Bias=0.2V, f=1MHz,

Figure 23

)

USB Input Source

Off Capacitance

V_AUDIO=3.0V, V_BUS=4.25V,

A_Sel=3.0V

C_{OFF(D+, D-)}

C_OFF(R/L)

f=1MHz, Figure 22

pF

Audio Input Source

Off Capacitance

V_AUDIO=3.0V, V_BUS=4.25V,

A_Sel=0V

f=1MHz, Figure 22

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

7

Typical Characteristics

Figure 6.

R_ONAudio, V_Audio=3.0V, V_BUS=Float

0.1

0

1.0

10.0

100.0

1000.0

-20

-40

-60

-80

-100

-120

-140

Frequency (KHz)

(Vaudio) = 3.0V

V_CC

Figure 7.

Non-Adjacent Channel Crosstalk – Audio

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

8

Typical Characteristics (Continued)

0.1

1.0

10.0

100.0

1000.0

10000.0

0

-20

-40

-60

-80

-100

-120

-140

-160

Frequency (KHz)

(Vaudio) = 3.0V

V_CC

Figure 8.

Off-Isolation – Audio

1

0

10

100

1000

10000

-1

-2

-3

-4

-5

-6

-7

-8

Frequency (MHz)

Figure #. Bandwidth Characterization, Frequency Response at CL= 0pF,VCC (Vbus)

= 4.25V

Figure 9.

Bandwidth, Gain vs. Frequency – USB

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

9

Test Diagrams

V_ON

I _(OFF)

A

Dn or R/L

D+/R or D-/L

V

D+/R or D-/L

sw

V

SW

D+, D-

or R/L

GND

I_ON

GND

V_CNTRL= fn (Vaudio and Vbus)

R_ON= V_ON/ I_ON

Figure 10. On Resistance

Figure 11. Off Leakage

D+, D- or R,L

D+/R or D-/L

V_OUT

C

D+, D- or R/L

R

I_A(ON)

L

V

sw

R

S

GND

A

GND

D+/R or

D-/L

V

sw

V_CNTRL= fn (Vaudio and Vbus)

GND

R_L, R and C_Lare function of application

S

V_CNTRL= fn (Vaudio and Vbus)

environment (see AC Tables for specific values)

C_Lincludes test fixture and stray capacitance

Figure 12. On Leakage

Figure 13. AC Test Circuit Load

t_RISE= 1us

t_FALL= 1 us

t_RISE= 2.5ns

t_FALL= 2.5ns

Vbus

3V

90%

Vth(min)

90%

50%

90%

50%

Vth(max)

Input - V_CNTRL

10%

Input - V_ASel

GND

10%

90%

10%

90%

GND

V_OH

90%

Output - V_OUT

V_OL

Output - V_OUT

V_OL

Vth = Vbusth or Vaudioth

t_OFF

t_ON

t_OFF

V_CNTRL= fn (Vaudio and Vbus)

Figure 15. Turn-On / Turn-Off Waveforms (USB/Audio)

Figure 14. Turn-On / Turn-Off

Waveforms (A_Sel

)

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

10

Test Diagrams (Continued)

t_RISE= 750ps

t_FALL= 750ps

0.4V

90%

50%

90%

50%

Input – V_D+/D-

10%

50%

GND

V_OH

Output - V_OUT

V_OL

50%

t_pLH

t_pHL

Figure 16. USB Switch Propagation Delay Waveforms

t_RISE= 750ps

t_FALL= 750ps

0.4V

90%

50%

90%

50%

Input – V_D+/D-

10%

50%

GND

V_OH

Output - V_OUT

V_OL

50%

t_pLH

t_pHL

Figure 17. Pulse Skew: t_SK(P)=| t_PHL– t_PLH

|

t_RISE= 750ps

t_FALL= 750ps

0.4V

90%

50%

90%

50%

Input – V_D+/D-

10%

GND

V_OH

Output1 - V_OUT

V_OL

50%

t_pLH1

t_pHL1

t_sk(o)

V_OH

Output2 - V_OUT

V_OL

50%

t_pLH2t_pHL2

Figure 18. Output Skew: t_SK(O)=| t_PLH1– t_PLH2| or | t_PHL1– t_PHL2

|

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

11

Test Diagrams (Continued)

Network Analyzer

R

S

V

IN

V

GND

S

GND

V

V_CNTRL

GND

OUT

GND

R

T

V_CNTRL= fn (Vaudio and Vbus)

GND

R_Sand R_Tare function of application

environment (see AC Tables for specific values)

Figure 19. USB Bandwidth

Network Analyzer

R

S

V

IN

V

S

GND

R

T

GND

V

GND

CNTRL

V

OUT

GND

R

T

V_CNTRL= fn (Vaudio and Vbus)

R_Sand R_Tare function of application

GND

environment (see AC Tables for specific values)

OFF-Isolation = 20 Log (V

/ V

)

OUT

IN

Figure 20. Channel Off Isolation

Network Analyzer

NC

R

S

V

IN

V

GND

S

V

GND

CNTRL

GND

R

T

GND

V

= fn (Vaudio and Vbus)

OUT

GND

CNTRL

R

T

R_Sand R_Tare function of application

environment (see AC Tables for specific values)

CROSSTALK = 20 Log (V

GND

/ V

)

IN

OUT

Figure 21. Non-Adjacent Channel-to-Channel Crosstalk

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

12

Test Diagrams (Continued)

Dn or R/L or D+/R or D-/L

Capacitance

Meter

V_CNTRL= fn (Vaudio and Vbus)

Dn or R/L or

D+/R or D-/L

F = 1MHz

Figure 22. Channel Off Capacitance

Dn or R/L or

D+/R or D-/L

Capacitance

Meter

= fn (Vaudio and Vbus)

V

F= 1MHz, 240MHz

CNTROL

Dn or R/L or

D+/R or D-/L

Figure 23. Channel On Capacitance

Audio Analyzer

R

S

V

IN

V

GND

S

GND

V

V_CNTRL

GND

OUT

GND

R

T

V_CNTRL= fn (Vaudio and Vbus)

GND

R_Sand R_Tare function of application

environment (see AC Tables for specific values)

Figure 24. Total Harmonic Distortion

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

13

Physical Dimensions

0.10

C

2.10

A

2X

1.62

B

KEEPOUT ZONE, NO TRACES

OR VIAS ALLOWED

(0.11)

0.56

1.12

1.60

PIN1 IDENT IS

2X LONGER THAN

OTHER LINES

0.10

C

10X

(0.35)

(0.25)

2X

10X

0.50

TOP VIEW

RECOMMENDED LAND PATTERN

0.55 MAX

0.05 C

0.05

0.00

(0.20)

C

0.35

0.25

SIDE VIEW

(0.15)

D

DETAIL A

(0.36)

0.35

0.25

0.65

0.55

0.35

0.25

DETAIL A 2X SCALE

1

4

0.56

NOTES:

10

5

A. PACKAGE CONFORMS TO JEDEC

REGISTRATION MO-255, VARIATION UABD .

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCES PER

ASME Y14.5M, 1994.

D. PRESENCE OF CENTER PAD IS PACKAGE

SUPPLIER DEPENDENT. IF PRESENT IT

IS NOT INTENDED TO BE SOLDERED AND

HAS A BLACK OXIDE FINISH.

(0.29)

0.35

6

9

9X

0.25

0.50

0.25

0.15

9X

1.62

0.10

0.05

C

A B

ALL FEATURES

E. DRAWING FILENAME: MKT-MAC10Arev5.

BOTTOM VIEW

Figure 25. 10-Lead MicroPak™

Package Designator

Tape Section

Number Cavity

Cavity Status

Cover Tape Status

Leader (Start End)

Carrier

125 (Typical)

5000

Empty

Filled

Sealed

L10X

Trailer (Hub End)

75 (Typical)

Empty

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:

http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

14

Physical Dimensions

Figure 26. 10-Lead Molded Small Outline Package (MSOP)

Tape Size

A

13

B

C

D

N

W1

W2

W3

0.059

(1.5)

0.512

(13)

0.795

(20.2)

7.008

(178)

0.448

(12.4)

0.724

(18.4)

0.486-0.606

(11.9-15.4)

(12mm)

(330)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:

http://www.fairchildsemi.com/products/analog/pdf/msop10_tr.pdf.

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

15

Physical Dimensions

(9X)

0.563

1.70

0.15 C

2X

1.40

A

B

0.663

1

2.10

1.80

PIN#1 IDENT

0.40

0.15 C

0.225

(10X)

TOP VIEW

2X

RECOMMENDED

LAND PATTERN

0.55 MAX.

0.152

0.10 C

0.08 C

9X

0.45

1.45

0.55

0.40

SEATING

PLANE

C

0.05

SIDE VIEW

1.85

0.35

(9X)

0.45

0.225

(10X)

3

OPTIONAL MINIMIAL

TOE LAND PATTERN

0.40

6

DETAIL A

1

NOTES:

PIN#1 IDENT

A. PACKAGE DOES NOT FULLY CONFORM TO

0.15

0.25

10

JEDEC STANDARD.

(10X)

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCES PER

ASME Y14.5M, 1994.

0.10 C A B

0.05 C

BOTTOM VIEW

D. LAND PATTERN RECOMMENDATION IS

BASED ON FSC DESIGN ONLY.

E. DRAWING FILENAME: MKT-UMLP10Arev3.

0.55

0.45

0.10

DETAIL A

SCALE : 2X

PACKAGE

EDGE

LEAD

OPTION 2

SCALE : 2X

OPTION 1

SCALE : 2X

Figure 27. 10-Lead Quad, Ultrathin MLP, 1.4 x 1.8mm

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:

http://www.fairchildsemi.com/products/analog/pdf/umlp10_tnr.pdf.

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

16

FSA221 • Rev. 1.1.0

www.fairchildsemi.com

17


型号：	FSA221_12
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	USB2.0 High-Speed (480Mbps) and Audio Switches with Negative Signal Capability USB2.0高速传输（480Mbps ）和音频处理负信号功能的开关开关
文件：	总17页 (文件大小：773K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FSA221_12 [FAIRCHILD]

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