FSA2257MTCX [ONSEMI]
低 RON低电压双通道 SPDT 双向模拟开关;
| 型号： | FSA2257MTCX |
| 厂家： | 
ONSEMI |
| 描述： | 低 RON低电压双通道 SPDT 双向模拟开关 开关 光电二极管 输出元件 |
| 文件： | 总12页 (文件大小：883K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
May 2013
FSA2257
Low RON, Low-Voltage Dual SPDT Bi-Directional
Analog Switch
Features
Description
The FSA2257 is a high-performance bi-directional dual
Single-Pole/Double-Throw (SPDT) analog switch. This
switch can be configured as either a multiplexer or a de-
multiplexer by select pins. The device features ultra-low
RON of 1.3 maximum at 4.5 V VCC and operates over
the wide VCC range of 1.65 V to 5.50 V. The device is
fabricated with submicron CMOS technology to achieve
fast switching speeds and is designed for break-before-
make operation. The select input is TTL-level compatible.
.
.
.
.
.
.
.
Maximum 1.15 On Resistance (RON) at 4.5 V VCC
0.3 Maximum RON Flatness at +5 V VCC
Space-Saving MicroPak™
Broad VCC Operating Range: 1.65 V to 5.50 V
Fast Turn-On and Turn-Off Time
Break-Before-Make Enable Circuitry
Over-Voltage Tolerant TTL-Compatible Control
Input
Applications
.
.
.
Cell Phone
PDA
Mobile Devices
Ordering Information
Package
Part Number
Top
Mark
Package Description
Packing Method
Number
FSA2257L10X
FSA2257MTCX
MAC10A
EP
10-Lead MicroPak™, 1.6 x 2.1 mm
5000 Units Tape and Reel
2500 Units Tape and Reel
14-Lead Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4 mm Wide
MCT14
FSA2257
FSA
2257
10-Lead Molded Small Outline Package
(MSOP), JEDEC MO-187, 3.0 mm
FSA2257MUX
MUA10A
4000 Units Tape and Reel
Figure 1. Block Diagram
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2257 • Rev. 1.0.6
Pin Configurations
Figure 2. Pin Assignments for TSSOP (Top View)
Figure 3. MicroPak™ Pad Assignments (Top View)
Figure 4. Pin Assignments for MSOP (Top View)
Figure 5. Analog Symbols (Top Through View)
Pin Definitions
Pin#
TSSOP
Pin#
MicroPak™
Pin #
MSOP
Name
Description
1
2,5
3
7
10
9
4
8
1A
GND
1B0
2A
Data Ports
Ground
5
Data Ports
Data Ports
Data Ports
No Connect
Data Ports
Control Inputs
Power Supply
Data Ports
Control Inputs
4
3
9
6
1
10
2B0
NC
2B1
2S
7,8
9
4
2
5
6
8
1
2
3
6
7
10
11,14
12
13
VCC
1B1
1S
Truth Table
Control Input (S)
Low Logic Level
High Logic Level
Function
B0 connected to A
B1 connected to A
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2257 • Rev. 1.0.6
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Min.
-0.5
-0.5
-0.5
-50
Max.
6.0
Unit
V
Supply Voltage
VSW
DC Switch Voltage(1)
DC Input Voltage(1)
Input Diode Current
Switch Current
VCC + 0.5
6.0
V
VIN
V
IIK
200
400
mA
Peak Switch Current (Pulsed at 1 ms duration, <10% duty cycle)
Storage Temperature Range
TSTG
TJ
-65
+150
+150
+260
°C
°C
°C
Maximum Junction Temperature
TL
Lead Temperature (Soldering, 10 seconds)
Human Body Model,
JESD22-A114
8000
2000
ESD
Electrostatic Discharge Capability
V
Charged Device Model,
JESD22-C101
Note:
1. Input and output negative ratings may be exceeded if input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
Parameter
Min.
1.65
0
Max.
5.50
VCC
Unit
V
Supply Voltage
VCNTRL
VSW
Control Input Voltage(2)
Switch Input Voltage
Operating Temperature
V
0
VCC
V
TA
-40
+85
°C
Note:
2. Unused control input must be held HIGH or LOW and it must not float.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2257 • Rev. 1.0.6
3
DC Electrical Characteristics
Typical values are at 25°C unless otherwise specified.
TA=-40°C to
+85°C
TA=+25°C
Typ. Max.
Symbol
Parameter
Conditions
VCC(V)
Unit
V
Min.
Min. Max.
1.8 to 2.7
2.7 to 3.6
4.5 to 5.5
1.8 to 2.7
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
1.0
2.0
2.4
0.4
0.6
0.8
VIH
Input Voltage High
Input Voltage Low
VIL
V
-1.0
-1.0
1.0
1.0
Control Input
Leakage
IIN
VIN=0 V to VCC
µA
nA
Off Leakage
Current of Port B0
and B1
INO(OFF)
,
A=1 V, 4.5 V,
B0 or B1=1 V, 4.5 V
5.5
5.5
-2
-4
2
2
-20
-40
20
40
INC(OFF)
A=1 V, 4.5V, B0 or
B1=1 V,4.5 V or
Floating
On Leakage
Current of Port A
IA(ON)
nA
1.8
2.7
4.6
2.6
IOUT=100 mA,
B0 or B1=1.5 V
Switch On
Resistance
MicroPak(3)
4.0
4.3
IOUT=100 mA,
B0 or B1=3.5 V
4.5
2.7
4.5
0.95
2.8
1.15
1.30
RON
IOUT=100 mA,
B0 or B1=1.5 V
4.5
2.3
Switch On
Resistance
MSOP/TSSOP(3)
IOUT=100 mA,
B0 or B1=3.5 V
1.5
On Resistance
Matching Between
Channels
4.5
4.5
0.06
0.7
0.12
0.15
0.3
MicroPak (4)
IOUT=100 mA,
B0 or B1=3.5 V
RON
On Resistance
Matching Between
Channels MSOP /
TSSOP(4)
1.8
2.7
3.0
1.4
IOUT=100 mA, B0 or
BI =0 V, 0.75 V,1.5 V
On Resistance
Flatness(5)
RFLAT(ON)
IOUT=100 mA,
B0 or BI =0 V, 1 V,
2 V
4.5
0.2
0.3
0.4
3.6
5.5
0.1
0.1
0.5
0.5
1.0
1.0
Quiescent Supply
Current
VIN=0 V or VCC
IOUT=0 V
,
ICC
µA
Notes:
3. On resistance is determined by the voltage drop between A and B pins at the indicated current through the
switch.
4. ΔRON = RONmax – RONmin measured at identical VCC, temperature, and voltage.
5. Flatness is defined as the difference between the maximum and minimum value of on resistance over the
specified range of conditions.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2257 • Rev. 1.0.6
4
AC Electrical Characteristics
Typical values are at 25°C unless otherwise specified.
TA=-40°C to
+85°C
TA=+25°C
Symbol Parameter
Conditions
VCC(V)
Unit Figure
Min. Typ. Max. Min. Max.
1.8 to 2.7
2.7 to 3.6
75
B0 or B1=1.5 V,
RL=50 , CL=35 pF
50
35
60
40
Turn-On
Time
tON
ns
Figure 6
B0 or B1=3.0 V,
RL=50 , CL=35 pF
4.5 to 5.5
1.8 to 2.7
2.7 to 3.6
20
B0 or B1=1.5 V,
RL=50 , CL=35 pF
20
15
30
20
Turn-Off
Time
tOFF
ns
ns
Figure 6
Figure 7
B0 or B1=3.0 V,
RL=50 , CL=35 pF
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
B0 or B1=1.5 V,
RL=50 , CL=35 pF
1
1
Break-
Before-Make
Time
tBBM
B0 or B1=3.0 V,
RL=50 , CL=35 pF
20
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
20
10
CL=1.0 nF, VGEN=0 V,
RGEN=0
Charge
Injection
Q
pC
dB
Figure 9
Figure 8
-70
-70
-75
OIRR
Off Isolation
Crosstalk
f=1 MHz, RL=50
f=1 MHz, RL=50
RL=50
Xtalk
BW
dB
Figure 8
4.5 to 5.5
-75
2.7 to 3.6
4.5 to 5.5
200
200
-3 db
Bandwidth
Figure
11
MHz
2.7 to 3.6
4.5 to 5.5
0.002
0.002
Total
Harmon
Distortion
Figure
12
RL=600 VIN=0.5 VPP
f=20 Hz to 20 kHz
THD
%
Capacitance
TA=+25°C
Symbol
Parameter
Conditions VCC (V)
Unit
Figure
Min.
Typ.
Max.
Control Pin Input
Capacitance
CIN
f=1 MHz
0
3.5
pF
Figure 10
COFF
CON
B Port Off Capacitance
A Port On Capacitance
f=1 MHz
f=1 MHz
4.5
4.5
12.0
40.0
pF
pF
Figure 10
Figure 10
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2257 • Rev. 1.0.6
5
AC Loadings and Waveforms
Figure 6. Turn On / Off Timing
Figure 7.
Break Before Make Timing
Figure 8.
Off Isolation and Crosstalk
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
AC Loadings and Waveforms (Continued)
Figure 9.
Charge Injection
Figure 10. On / Off Capacitance Measurement Setup
Figure 11. Bandwidth
Figure 12. Harmonic Distortion
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2257 • A Rev. 1.0.6
7
0.65
A
ꢀꢁꢂꢂꢂꢁꢃꢂ
0.43TYP
14
8
B
6.4
ꢄꢁꢄꢂꢂꢁꢃꢂ
6.10
3.2
1.65
0.2 C B A
ALL LEAD TIPS
1
7
PIN#1 IDENT
TOP VIEW
0.45
RECOMMENDED LAND PATTERN
SEE DETAIL A
1.2 MAX
+0.15
-0.10
0.90
0.20
0.09
ꢂꢁꢃꢂꢂꢁꢂꢀ
0.30
0.19
ALL LEAD TIPS
C
0.1 C
0.13
A B
C
0.65
ꢃꢅꢁꢂꢂꢆ723ꢆꢇꢆ%27720
FRONT VIEW
0.09 MIN
NOTES:
GAGE PLANE
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
0.25
0.09 MIN
ꢂꢉꢆꢊ
ꢂꢁꢈꢂꢁꢃ
1.00
SEATING PLANE
DETAIL A
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
THIS DRAWING IS THE PROPERTY OF FAIRCHILD SEMICONDUCTOR CORPORATION. NO USE
THEREOF SHALL BE MADE OTHER THAN AS REFERENCE FOR PROPOSALS AS SUBMITTED
TO FAIRCHILD SEMICONDUCTOR CORPORATION FOR JOBS TO BE EXECUTED IN CONFORMITY
WITH SUCH PROPOSALS UNLESS THE CONSENT OF SAID FAIRCHILD SEMICONDUCTOR COR-
PORATION HAS PREVIOUSLY BEEN OBTAINED. NO PART OF THIS DRAWING SHALL BE
A
REVISIONS
DESCRIPTION
DATE
BY/APP'D
NBR
COPIED OR DUPLICATED OR ITS CONTENTS DISCLOSED. THE INFORMATION CONTAINED
ON THIS DRAWING IS CONFIDENTIAL AND PROPRIETARY.
B
REDREW FORMER NSC DWG
07JUN2006
H.ALLEN
* REMOVE SITE ADDRESS AND CHANGE REVISION
TO NUMERICAL & CHANGED LAND PATTERN TO IPC.
* CHANGE LEAD WIDTH FROM 0.27MAX TO 0.33MAX.
* REMOVE DATE OF JEDEC REVISION
2
3
20AUG2009 KHLEE/FSSZ
24SEP2009 KHLEE/FSSZ
* REVERT LEAD WIDTH TO 0.27MAX.
A
3.00±0.10
B
1.40 MIN
0.30
10
6
2.45
4.40
4.90
3.00±0.10
PIN #1 ID
QUADRANT
1
5
1
5
0.50
0.381
TOP VIEW
LAND PATTERN RECOMMENDATION
0.85±0.10
A
1.10 MAX
0.15
0.00
0.50
C
0.23
0.08
END VIEW
0.10
C
0.27
0.17
ALL LEAD TIPS
12°
M
.08
A B C
SIDE VIEW
TOP & BOTTOM
GAUGE
PLANE
R0.13 TYP
4°-8
SEATING
PLANE
NOTES: UNLESS OTHERWISE SPECIFIED
0.80
0.40
0.22
A. THIS PACKAGE CONFORMS TO JEDEC MO-187
VARIATION BA.
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D. DIMENSIONS AND TOLERANCES AS PER ASME
Y14.5-1994.
0.95
DETAIL A
SCALE 20 : 1
DATE
APPROVALS
E. LAND PATTERN AS PER IPC7351#SOP50P490X110-10AN
F. FILE NAME: MKT-MUA10AREV3
DRAWN: BOBOY MALDO
24SEP09
CHECKED:
KH LEE
APPROVED:
10LD, MSOP, JEDEC
BY HUANG
MO-187, 3.0MM WIDE
.
APPROVED:
HOWARD ALLEN
DRAWING NUMBER
SIZE
REV
3
SCALE
PROJECTION
1:1 N/A
MKT-MUA10A
[MM]
INCH
FORMERLY:
1 OF 1
SHEET :
N/A
2.10±0.10
A
PIN#1 IDENT
IS 2X LONGER
THAN OTHER
LINES
B
1.60±0.10
1.62
KEEPOUT ZONE,
NO TRACES OR
VIAS ALLOWED
(0.11)
0.56
TOP VIEW
SIDE VIEW
0.025±0.025
0.50±0.05
1.12
(0.35) 10X
(0.25) 10X
C
0.50
C
(0.36) 2X
0.60±0.05
RECOMMENDED LAND PATTERN
(0.09) 10X
DETAIL A
1
4
0.20±0.05
(0.10±0.10)
0.20±0.05
0.56
5
10
0.30±0.05
0.15±0.05
0.30±0.05 9X
(0.31)
9
6
0.50
1.62
0.20±0.05 9X
0.30±0.05
0.10
0.05
C A B
DETAIL A
(0.20)
C
SCALE 2:1
BOTTOM VIEW
ALL FEATURES
NOTES:
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT
IT IS NOT INTENDED TO BE SOLDERED
AND HAS A BLACK OXIDE FINISH.
D. DRAWING FILENAME: MKT-MAC10ArevG.
E. DIMENSIONS WITHIN ( ) ARE UNCONTROLLED.
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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