FSA266K8X_NL [FAIRCHILD]
SPST, 2 Func, 1 Channel, CMOS, PDSO8, 3.10 MM, MO-187, US-8;型号: | FSA266K8X_NL |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | SPST, 2 Func, 1 Channel, CMOS, PDSO8, 3.10 MM, MO-187, US-8 光电二极管 输出元件 |
文件: | 总11页 (文件大小:205K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
May 2000
Revised December 2005
FSA266 • NC7WB66
Low Voltage Dual SPST
Normally Open Analog Switch or 2-Bit Bus Switch
General Description
Features
The FSA266 or NC7WB66 is an ultra high-speed (UHS) dual
single-pole/single-throw (SPST) analog switch or 2-bit bus
switch. The device is fabricated with advanced sub-micron
CMOS technology to achieve high speed enable and disable
Useful in both analog and digital applications
Space saving US8 surface mount package
MicroPak Pb-Free leadless package
times and low On Resistance over a broad V
device is specified to operate over the 1.65 to 5.5V V operat-
range. The
CC
Typical 7 On Resistance @ 5V V
CC
CC
ing range. The device is organized as a dual switch with inde-
pendent CMOS compatible switch enable (OE) controls. When
OE is HIGH, the switch is ON and Port A is connected to Port B.
When OE is LOW, the switch is OPEN and a high-impedance
state exists between the two ports. The enable inputs tolerate
Broad V operating range: 1.65V to 5.5V
CC
Rail-to-Rail signal handling
Power down high impedance control inputs
Control inputs are overvoltage tolerant
Control inputs are CMOS compatible
300 MHz 3dB bandwidth
voltages up to 5.5V independent of the V operating range.
CC
Ordering Code:
Product
Order
Package
Code
Package Description
Supplied As
Number
FSA266K8X
FSA266L8X
Number Top Mark
MAB08A
MAC08A
WB66
P4
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3K Units on Tape and Reel
Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5K Units on Tape and Reel
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3K Units on Tape and Reel
Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5K Units on Tape and Reel
NC7WB66K8X MAB08A
NC7WB66L8X MAC08A
WB66
P4
Pb-Free package per JEDEC J-STD-020B.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500373
www.fairchildsemi.com
Logic Symbol
Connection Diagrams
Pin Assignments for US8
(Top View)
Pad Assignments for MicroPak
Analog Symbol
(Top Through View)
Pin Descriptions
Pin Names
Description
Switch Port A
Switch Port B
Control Input
A
B
OE
Function Table
Switch Enable Input
Function
(OE)
L
Disconnect
H
B Connected to A
H
L
HIGH Logic Level
LOW Logic Level
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (V
)
0.5V to 7.0V
0.5V to V 0.5V
CC
DC Switch Voltage (V )
S
CC
Supply Voltage (V
)
1.65V to 5.5V
0V to 5.5V
CC
DC Input Voltage (V ) (Note 2)
0.5V to 7.0V
IN
Control Input Voltage (V
)
IN
DC Input Diode Current
Switch Input Voltage (V
)
0V to V
0V to V
IN
CC
CC
@ (I ) V
0V
50 mA
128 mA
IK
IN
Switch Output Voltage (V
)
OUT
DC Switch Output Current (I
)
OUT
Operating Temperature (T )
40 C to 85 C
A
DC V or Ground Current (I /I
)
100 mA
CC
CC GND
Input Rise and Fall Time (t , t )
r
f
Storage Temperature Range (T
)
65 C to 150 C
STG
Control Input V
Control Input V
Control Input V
1.65V 2.7V
3.0V 3.6V
4.5V 5.5V
0 ns/V to 20 ns/V
0 ns/V to 10 ns/V
0 ns/V to 5 ns/V
250 C/W
CC
CC
CC
Junction Lead Temperature
under Bias (T )
150 C
260 C
J
Junction Lead Temperature (T )
L
Thermal Resistance (
)
JA
(Soldering, 10 Seconds)
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety
of the device cannot be guaranteed. The device should not be operated at these lim-
its. The parametric values defined in the Electrical Characteristics tables are not
guaranteed at the absolute maximum ratings. The “Recommended Operating Condi-
tions” table will define the conditions for actual device operation.
Power Dissipation (P ) @ 85 C
D
SC70-6
250 mW
Note 2: The input and output negative voltage ratings may be exceeded if the input
and output diode current ratings are observed.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
V
T
25 C
Typ
T
40 C to 85 C
Max
CC
A
A
Symbol
Parameter
Units
Conditions
(V)
Min
Max
Min
V
V
HIGH Level Input Voltage
1.65 to 1.95 0.75 V
0.75 V
IH
CC
CC
CC
CC
V
V
2.3 to 5.5
1.65 to 1.95
2.3 to 5.5
0 to 5.5
0.7 V
0.7 V
LOW Level Input Voltage
0.25 V
0.25V
IL
CC
CC
0.3 V
0.3 V
CC
CC
I
Input Leakage Current
Switch OFF Leakage Current
Switch On Resistance
(Note 4)
0.1
1.0
A
A
0
0
V
V
5.5V
IN
IN
I
1.65 to 5.5
0.1
10.0
13.5
10.0
15.0
15.0
20.0
20.0
30.0
30.0
1.0
10.0
13.5
10.0
15.0
15.0
20.0
20.0
30.0
30.0
A, B
0V, I
V
CC
OFF
R
6.0
7.0
30 mA
30 mA
30 mA
24 mA
ON
I
O
4.5
3.0
V
2.4V, I
4.5V, I
I
O
6.0
V
V
V
V
V
V
V
V
I
O
7.5
0V, I
3V, I
0V, I
I
O
O
O
8.5
24 mA
8 mA
I
9.0
I
2.3
10.5
12.5
17.0
2.3V, I
0V, I
8 mA
I
O
1.65
4 mA
I
O
1.65V, I
4 mA
I
O
I
Quiescent Supply Current
All Channels ON or OFF
Analog Signal Range
On Resistance Over
Signal Range
V
CC
or GND
CC
IN
5.5
1.0
10.0
A
V
I
0
OUT
V
0
V
0
V
CC
CC
CC
RRange
4.5
3.0
8.0
15.0
45.0
150
0.2
15.0
30.0
75.0
275
15.0
30.0
75.0
275
I
I
I
I
I
I
I
I
I
I
I
I
30 mA, 0
24 mA, 0
8 mA, 0
4 mA, 0
V
V
V
V
O
O
O
O
O
O
O
O
O
O
O
O
I
I
CC
CC
(Note 4)(Note 5)
2.3
V
V
I
I
CC
CC
1.65
4.5
V
V
R
On Resistance Match
Between Channels
(Note 4)(Note 7)
30 mA, V 3.15
I
ON
3.0
0.2
24 mA, V 2.1
I
2.3
0.5
8 mA, V 1.6
I
1.65
4.5
0.6
4 mA, V 1.15
I
R
On Resistance Flatness
(Note 4)(Note 5)(Note 6)
2.5
6.0
17.5
60.0
250
6.0
17.5
60.0
250
30 mA, 0
24 mA, 0
8 mA, 0
4 mA, 0
V
V
V
V
flat
I
I
CC
CC
3.0
8.0
2.3
33.0
135
V
V
I
I
CC
CC
1.65
V
V
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 5: Guaranteed by design.
Note 6: Flatness is defined as the difference between the minimum and maximum value of ON Resistance over the specified range of conditions.
3
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DC Electrical Characteristics (Continued)
Note 7:
R
R
max
R
min measured at identical V , temperature and voltage levels.
ON
ON
ON CC
AC Electrical Characteristics
V
T
40 C to 85 C
Figure
CC
A
Symbol
, t
Parameter
Units
Conditions
(V)
Min
Typ
0.35
0.7
1.1
2.0
2.0
2.5
3.2
5.7
2.6
3.4
4.2
6.2
Max
1.0
1.5
2.5
4.0
3.2
3.9
5.6
10.0
4.1
5.0
6.9
10.5
Number
t
Propagation Delay Bus-to-Bus
(Note 8)
4.5 to 5.5
3.0 to 3.6
2.3 to 2.7
1.65 to 1.95
4.5 to 5.5
3.0 to 3.6
2.3 to 2.7
1.65 to 1.95
4.5 to 5.5
3.0 to 3.6
2.3 to 2.7
1.65 to 1.95
1.65 to 5.5
PHL PLH
V
OPEN
50 pF, RU RD 500
I
Figures
1, 2
ns
C
L
t
, t
Output Enable Time
Turn on Time
0.8
1.2
1.5
2.5
0.8
1.5
2.0
3.0
PZL PZH
V
0V for t
PZH
I
Figures
1, 2
ns
ns
V
2 x V for t
CC PZL
I
C
50 pF, RU RD 500
L
t
, t
Output Disable Time
Turn Off Time
PLZ PHZ
V
V
0V for t
PHZ
I
Figures
1, 2
2 x V for t
PLZ
I
CC
C
C
R
R
f
50 pF, RU RD 500
0.1 nF, V 0V,
, f 1 MHz
L
Q
Charge Injection (Note 9)
Off Isolation (Note 10)
Crosstalk
pC
dB
Figure 3
Figure 4
Figure 5
Figure 8
L
GEN
0
GEN
OIRR
Xtalk
1.65 to 5.5
1.65 to 5.5
1.65 to 5.5
5
-55.0
70.0
300
50 , C
5 pF,
L
L
L
10 MHz
50 , C
10 MHz
dB
R
f
5 pF,
L
BW
3dB Bandwidth
Total Harmonic Distortion
(Note 9)
MHz
%
R
R
50
L
L
THD
600
.016
0.5 V
P-P
f
600 Hz to 20 KHz
Note 8: This parameter is guaranteed by design. The switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load
capacitance.
Note 9: Guaranteed by design.
Note 10: Off Isolation 20 log [V /V ]
Bn
10
A
Capacitance
Symbol
Parameter
Typ
2.5
Max
Units
pF
Conditions
Figures
C
C
C
Control Pin Input Capacitance
V
V
V
0V
IN
CC
CC
CC
(OFF) Switch Port Off Capacitance
5.0
pF
5.0V
5.0V
Figure 6
Figure 7
I/O
I/O
(ON)
Switch Port Capacitance when Switch is Enabled
10.0
pF
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4
AC Loading and Waveforms
Input driven by 50 source terminated in 50
includes load and stray capacitance.
C
L
Input PRR 1.0 MHz; t
500 ns
w
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
FIGURE 3. Charge Injection Test
5
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AC Loading and Waveforms (Continued)
FIGURE 4. Off Isolation
FIGURE 5. Crosstalk
FIGURE 6. Channel Off Capacitance
FIGURE 7. Channel On Capacitance
FIGURE 8. Bandwidth
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6
Tape and Reel Specification
TAPE FORMAT for US8
Package
Tape
Number
Cavity
Cover Tape
Designator
Section
Leader (Start End)
Carrier
Cavities
125 (typ)
250
Status
Empty
Filled
Status
Sealed
Sealed
Sealed
K8X
Trailer (Hub End)
75 (typ)
Empty
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
Package
Tape
Number
Cavity
Cover Tape
Designator
Section
Leader (Start End)
Carrier
Cavities
125 (typ)
250
Status
Empty
Filled
Status
Sealed
Sealed
Sealed
L8X
Trailer (Hub End)
75 (typ)
Empty
TAPE DIMENSIONS inches (millimeters)
7
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REEL DIMENSIONS inches (millimeters)
Tape Size
A
7.0
B
0.059
C
0.512
D
0.795
N
2.165
W1
W2
0.567
(14.40)
W3
0.331 0.059/ 0.000
W1 0.078/ 0.039
8 mm
(177.8)
(1.50)
(13.00)
(20.20)
(55.00)
(8.40 1.50/ 0.00)
(W1 2.00/ 1.00)
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8
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
9
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
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10
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION
As used herein:
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
2. A critical component is any component of a life support
device or system whose failure to perform can be reason-
ably expected to cause the failure of the life support device
or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of terms
Datasheet Identification Product Status
Definition
Advance Information
Formative or In Design This datasheet contains the design specifications for product develop-
ment. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data, and supplementary data will
be published at a later date. Fairchild Semiconductor reserves the right
to make changes at any time without notice in order to improve design.
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice in order
to improve design.
This datasheet contains specifications on a product that has been dis-
continued by Fairchild Semiconductor. The datasheet is printed for ref-
erence information only.
11
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相关型号:
FSA266L8X
TinyLogic Low Voltage UHS Dual SPST Normally Open Analog Switch or 2-Bit Bus Switch
FAIRCHILD
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