KA3012D-02TF [FAIRCHILD]
4-Channel Motor Driver; 4通道马达驱动器
| 型号： | KA3012D-02TF |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 4-Channel Motor Driver |
| 文件： | 总13页 (文件大小：241K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
KA3012D
4-Channel Motor Driver
Features
Description
• BTL (H-Bridge type linear) 4channel motor driver
• Wide dynamic range:
The KA3012D is a monolithic IC, and suitable for 4-CH
motor driver which drives sled motor, loading motor, focus
& tracking actuator of CD-media system and built in OP-
amp which can receive digital signal from servo of CD-
media system.
- SV =12V, PV
CC
=5V, R =8Ω → V =4.2V
OM
CC1
L
- SV =12V, PV
CC
=12V, R =24Ω → V =10.4V
OM
CC2
L
• Built in level-shift circuit
• Built in OP-amp for digital input
• Built in thermal shutdown (TSD) circuit
• Three independent sources
• Low crossover distortion
• Built-in reverse rotation prevented
• Built-in short breaker
28-SSOPH-375
Typical Applications
Ordering Information
• Compact disk ROM (CD-ROM)
• Compact disk RW (CD-RW)
• Digital video disk ROM (DVD-ROM)
• Digital video disk RAM (DVD-RAM)
• Digital video disk player (DVDP)
• Other compact disk media
Device
Package
Operating Temp.
KA3012D-02 28-SSOPH-375 -35 °C ~ 85 °C
KA3012D-02TF 28-SSOPH-375 -35 °C ~ 85 °C
Rev. 1.0.1
February. 2000.
©2000 Fairchild Semiconductor International
1
KA3012D
Pin Assignments
FIN
(GND)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
KA3012D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FIN
(GND)
2
KA3012D
Pin Definitions
Pin Number
Pin Name
I/O
O
O
O
I
Pin Function Description
Drive CH 1 output (−)
1
2
CH1-O
CH1-O
Drive CH 1 output (+)
Op-amp CH 1 output
Op-amp CH 1 input (−)
OP-amp CH 1 input (+)
Bias input
3
AMP1-O
AMP1-I(−)
AMP1-I(+)
BIAS
4
5
I
6
I
7
SVCC
-
Supply voltage (Signal)
Ground
8
GND
-
9
MUTE
I
Mute
10
11
12
13
14
AMP2-I(+)
AMP2-I(−)
AMP2-O
AMP2-O
CH2-O
I
OP-amp CH 2 input (+)
Op-amp CH 2 input (−)
Op-amp CH 2 output
OP-amp CH 2 output (+)
I
O
O
O
Op-amp CH 2 output
(Op-amp CH 2 output)
15
16
17
18
19
20
21
22
23
24
25
26
27
28
GND
CH3-O
-
O
O
O
I
Ground
Drive CH 3 output (−)
Drive CH 3 output (+)
OP-amp CH 3 output
Drive CH 3 input (−)
Drive CH 3 input (+)
Supply voltage (CH 2 & CH 3)
Supply voltage (CH1 & CH 4)
OP-amp CH 4 input (+)
Op-amp CH 4 input (−)
Op-amp CH 4 output
Drive CH 4 output (+)
Drive CH 4 output (−)
Ground
CH3-O
AMP3-O
AMP3-I(−)
AMP3-I(+)
PVCC2
PVCC1
AMP4-I(+)
AMP4-I(−)
AMP4-O
CH4-O
I
-
-
I
I
O
O
O
-
CH4-O
GND
3
KA3012D
Internal Block Diagram
GND
28
27
26
+
25
24
23
22
21
20
19
18
17
16
15
GND
GND
PV
PV
CC2
CC1
+
+
−
+
−
−
−
−
+
−
+
10k
10k
TSD
10k
PV
/2
CC2
PV
/2
PV
/2
PV /2
CC2
CC1
CC1
20k
−
+
−
+
−
+
−
+
LEVEL-SHIFT
LEVEL-SHIFT
+
−
+
−
LEVEL-SHIFT
LEVEL-SHIFT
+
−
−
+
PV
CC2
/2
PV
/2
CC2
20k
PV
/2
CC1
10k
+
−
10k
10k
+
−
− +
−
−
+
−
−
+
+
SV
MUTE
+
CC
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
NOTE:
The drive channel outputs are determined pre OP-amp output.
4
KA3012D
Equivalent Circuits
Op-amp input
Op-amp output
80Ω
80Ω
AMP-O
3, 12, 17, 25 Pin
AMP-I (+)
5, 10, 20, 23
Pin
AMP-I (−)
4, 11, 19, 24
Pin
Drive output
Bias
CH-O
(2, 13, 17, 26 Pin)
10kΩ
10kΩ
Bias
(6 Pin)
200Ω
CH-O
(1, 14, 16, 27 Pin)
1kΩ
Mute
50k
Mute
(9 Pin)
50k
5
KA3012D
Absolute Maximum Rating (Ta = 25°C)
Parameter
Symbol
VCC
Value
15
Unit
Supply voltage
V
Power dissipation
PD
1.7note
W
°C
°C
Operating temperature range
Storage temperature range
TOPR
TSTG
−35 ~ +85
−55 ~ +150
NOTE:
1. When mounted on 50mm × 50mm × 1mm PCB (Phenolic resin material).
2. Power dissipation reduces 13.6mW / °C for using above Ta=25°C.
3. Do not exceed P and SOA (Safe operating area).
D
Power Dissipation Curve
Pd (mW)
3,000
2,000
1,000
SOA
0
0
25
50
75 85 100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Condition (Ta = 25°C)
Parameter
Supply voltage
Symbol
Min.
Typ.
Max.
Unit
SVCC, VCC1, VCC2
4.5
-
13.2
V
6
KA3012D
Electrical Characteristics
(Ta=25°C, V =5V, R =8Ω)
=V
CC1 CC2 L
Parameter
DRIVE CIRCUIT
Symbol
Conditions
Min.
Typ.
Max. Units
Quiescent current 1
Quiescent current 2
Output offset voltage 1
Output offset voltage 2
Max.output amplitude 1
Max.output amplitude 2
Voltage gain 1
ICC1
ICC2
No load, Mute off
-
-
15
-
20
500
70
90
-
mA
uA
mA
mV
V
No load, Mute on
CH 1, CH 4
VOO1
VOO2
VOM1
VOM2
GVC1
−70
−90
3
0
CH 2, CH 3
-
CH 1, CH 4
4.2
10.4
12.0
CH 2, CH 3 (RL=24Ω)
8
-
V
VIN=0.1VRMS, 1kHz, sinewave.
Input OP-amp
10
14
dB
→ Buffer CH 1, CH 4
Voltage gain 2
GVC2
VIN=0.1VRMS, 1kHz, sinewave.
Input OP-amp
16
18
20
dB
→ Buffer CH 2, CH 3
Mute on voltage
VMon
VMoff
-
-
2.0
-
-
-
-
V
V
Mute off voltage
0.5
INPUT OP-AMP CIRCUIT
Input offset voltage
VOFOP
IBOP
-
-
-
-
−10
-
0
-
10
300
-
mV
nA
V
Input bias current
High level output voltage
Low level output voltage
Output driving current sink
VOHOP
VOLOP
ISINK
10
-
10.9
1.1
-
1.8
-
V
Input op-amp output
1
mA
→ VCC & 1.2kΩ
Output driving current source ISOURCE
Slew rate SR
Input op-amp output
→ GND & 1.2kΩ
1
-
-
-
-
mA
100kHz square-wave 2Vp-p output
1
V / µs
7
KA3012D
Application Information
1. MUTE
Pin #9
High
Mute circuit
Turn-on
Output driver
bias
Low
Turn-off
9
Open
Turn-off
• When the voltage level of the mute pin is above 2V, the mute circuit is activated so that the output circuit will be
muted.
• When the mute pin #9 is open or the voltage of the mute pin #9 is below 0.5V, the mute circuit is deactivated and the output
circuit operates normally.
• When the mute circuit is activated, the voltage level of output pins becomes 1/2V (approximately).
CC
2. TSD (THERMAL SHUTDOWN)
V
REF BG
Output driver
bias
R11
R12
Q11
• If the chip temperature rises above 175°C, then the TSD (Thermal shutdown) circuit is activated and the output circuit is
muted.
• The V
REF BG
is the output voltage of the band-gap-referenced bias in circuit and acts as the input voltage of the TSD
circuit.
• The base-emitter voltage of the TR,Q11 is designed to turn-on at 460mA.
= V × R12 / (R11 + R12)=460mV
V
BE
REF BG
• When the chip temperature rises up to 175°C, the turn-on voltage of the Q11 drops down to 460mV. (Hysteresis: 25°C) and
Q11 turns on so the output circuit is muted.
8
KA3012D
3. DRIVER
+∆I
Buffer
+
AMP
BIAS
(6 Pin)
+
Level
shift
−
−∆V
+∆V
−
Q1
Q3
Q2
Q4
Pre-amp
M
+
AMP-I (+)
(5, 10, 20, 23 Pin)
AMP-I (−)
CH-O
CH-O
−
10k
10k
(1, 14,
(2, 13,
(4, 11, 19, 24 Pin)
16, 27 Pin)
17, 26 Pin)
−∆I
Buffer
AMP-O
(3, 12, 18, 25 Pin)
+
−
• The gain of pre-op. Amplifier can be changed by manipulating amp input resistor or feedback resistor.
• The voltage, V , is the reference voltage given by the bias voltage of the pin #6.
REF
• The level shift produces the current due to the difference between the pre amp output signal and the arbitrary reference
(bias) signal. (The current produced as +∆I and −∆I is fed into the driver buffer. (CH1/CH4)
The current produced as +2∆I and −2∆I is fed into the driver buffer. (CH2/CH3)
• Driver buffer drives the power TR of the output stage according to the state of the input signal.
• The output stage is the BTL driver and the motor is rotating in forward direction by operating TR Q1 and TR Q4.On the
other hand, if TR Q2 and TR Q3 is operating, the motor is rotating in reverse direction.
• When the output voltage of Pre-Amp (Pin 3, 12, 18, 25) is below the V , then the direction of the motor is in forward.
REF
• When the output voltage of Pre-Amp (Pin 3, 12, 18, 25) is above the V , then the direction of the motor in reverse.
REF
• The gain (A ) of the drive circuit is as follows.
V
4VIN
------------
AV = 20 log
AV = 20 log
= 12(dB) (CH1/CH4)
VIN
4VIN
------------
VIN
= 18(dB) (CH1/CH4)
4. CONNECT A BY-PASS CAPACITOR, 0.1µF BETWEEN THE SUPPLY VOLTAGE SOURCE.
V
CC1
7
104
5. RADIATION FIN IS CONNECTING TO THE INTERNAL GND OF THE PACKAGE.
CONNECT THE FIN TO THE EXTERNAL GND.
9
KA3012D
Typical Performance Characteristics
V
CC
vs I
(No load)
CC
14
12
10
8
6
4
2
0
0
2
4
6
8
10
12
14
16
VCC (V)
AMP-I (+) vs OUTPUT VOLTAGE
Figures can be obtained by changing of AMP-I (+) from 0V to 5V, shows the voltage difference between CH-O and CH-O.
(AMP-I (+) and AMP-O are shorted.)
1. CH 1 and CH 4 (12dB)
2. CH 2 and CH 3 (18dB)
5
12
10
8
4
3
6
2
4
1
2
0
0
-2
-4
-6
-8
-10
-12
-1
-2
-3
-4
-5
0
1
2
3
4
5
0
1
2
3
4
5
AMP-I (+)(V)
AMP-I (+)(V)
V
CC
vs Gain
1. CH 1 and CH 4 (12dB)
2. CH 2 and CH 3 (18dB)
21
15
20
19
18
17
16
15
14
13
12
11
10
9
4
0
11
12
14
4
0
11
12
14
5
6
7
8
9
13
5
6
7
8
9
13
VCC (V)
VCC (V)
10
KA3012D
Test Circuits
R
R
’
L3
L3
10µF
10µF
R
PV
PV
CC2
L4
CC1
V
V
SW3
SW4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
KA3012D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SW1
SW2
A
R
L2
R
’
L2
V
V
10µF
Bias
2.5V
R
L1
V
SV
CC
12V
MUTE
OPIN (+)
OPIN (−)
OPOUT
V
CC
V
V
SW5
1
SW7
1
1.2kΩ
3
1
SW6
2
2
1MΩ
V
1MΩ
10µF
3
3
2
V
V
IN3
V
IN5
V
V
IN4
IN2
V
IN1
11
KA3012D
Typical Application Circuits
SERVO PREAMP
MICOM
LOADING
(SPINDLE)
FOCUS
TRACKING
BIAS
SLED
MUTE
10kΩ
10kΩ
M
10kΩ
GND
10kΩ
28
27
26
25
24
23
22
21
20
19
18
17
16
15
KA3012D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
10kΩ
10kΩ
M
10kΩ
10kΩ
BIAS
12
KA3012D
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/1/00 0.0m 001
Stock#DSxxxxxxxx
2000 Fairchild Semiconductor International
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