MM74HC14MTC [FAIRCHILD]
Hex Inverting Schmitt Trigger; 六角反相施密特触发器
| 型号： | MM74HC14MTC |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Hex Inverting Schmitt Trigger |
| 文件： | 总8页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 1983
Revised May 2005
MM74HC14
Hex Inverting Schmitt Trigger
General Description
Features
The MM74HC14 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and high
noise immunity of standard CMOS, as well as the capability
to drive 10 LS-TTL loads.
■ Typical propagation delay: 13 ns
■ Wide power supply range: 2–6V
■ Low quiescent current: 20 A maximum (74HC Series)
■ Low input current: 1 A maximum
The 74HC logic family is functionally and pinout compatible
with the standard 74LS logic family. All inputs are protected
from damage due to static discharge by internal diode
clamps to VCC and ground.
■ Fanout of 10 LS-TTL loads
■ Typical hysteresis voltage: 0.9V at VCC 4.5V
Ordering Code:
Package
Order Number
Package Description
Number
MM74HC14M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC14MX_NL
MM74HC14SJ
MM74HC14MTC
MM74HC14MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
MM74HC14N
N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
MM74HC14N_NL
N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Logic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
© 2005 Fairchild Semiconductor Corporation
DS005105
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Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
Clamp Diode Current (IIK, IOK
)
0.5 to 7.0V
1.5 to VCC 1.5V
0.5 to VCC 0.5V
20 mA
Min Max Units
)
Supply Voltage (VCC
DC Input or Output Voltage
(VIN, VOUT
Operating Temperature Range (TA)
)
2
0
6
V
V
)
VCC
)
)
DC Output Current, per pin (IOUT
)
25 mA
55
125
C
DC VCC or GND Current, per pin
(ICC
)
50 mA
Storage Temperature Range (TSTG
Power Dissipation (PD)
(Note 3)
)
65 C to 150 C
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
600 mW
500 mW
Note 3: Power Dissipation temperature derating — plastic “N” package:
12 mW/ C from 65 C to 85 C.
S.O. Package only
Lead Temperature (TL)
(Soldering 10 seconds)
260 C
DC Electrical Characteristics (Note 4)
T
25 C
T
40 to 85 C
T
A
55 to 125 C
A
A
V
Symbol
Parameter
Conditions
Minimum
Units
CC
Typ
1.2
2.7
3.2
1.2
2.7
3.2
0.7
1.8
2.2
0.7
1.8
2.2
0.5
0.9
1.0
0.5
0.9
1.0
2.0
4.5
6.0
Guaranteed Limits
V
Positive Going
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
1.0
1.0
2.0
3.0
1.5
3.15
4.2
0.3
0.9
1.2
1.0
2.2
3.0
0.2
0.4
0.5
1.0
1.4
1.5
1.9
4.4
5.9
1.0
2.0
3.0
1.5
3.15
4.2
0.3
0.9
1.2
1.0
2.2
3.0
0.2
0.4
0.5
1.0
1.4
1.5
1.9
4.4
5.9
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
T
Threshold Voltage
2.0
3.0
1.5
3.15
4.2
0.3
0.9
1.2
1.0
2.2
3.0
0.2
0.4
0.5
1.0
1.4
1.5
1.9
4.4
5.9
Maximum
Minimum
Maximum
Minimum
Maximum
V
V
V
V
Negative Going
T
Threshold Voltage
Hysteresis Voltage
H
Minimum HIGH Level
Output Voltage
V
V
V
V
V
V
OH
IN
IL
|I
|
20 A
OUT
V
IN
IL
|I
|I
|
|
4.0 mA
5.2 mA
4.5V
6.0V
2.0V
4.5V
6.0V
4.2
5.7
0
3.98
5.48
0.1
3.84
5.34
0.1
3.7
5.2
0.1
0.1
0.1
V
V
V
V
V
OUT
OUT
Maximum LOW Level
Output Voltage
V
OL
IN
IH
|I
|
20
A
0
0.1
0.1
OUT
0
0.1
0.1
V
IN
IH
|I
|I
|
|
4.0 mA
5.2 mA
4.5V
6.0V
6.0V
6.0V
0.2
0.2
0.26
0.26
0.1
0.33
0.33
1.0
0.4
0.4
1.0
40
V
V
A
A
OUT
OUT
I
I
Maximum Input Current
Maximum Quiescent
Supply Current
V
V
or GND
CC
IN
CC
IN
V
or GND
2.0
20
IN
CC
I
0 A
OUT
Note 4: For a power supply of 5V 10% the worst case output voltages (V , and V ) occur for HC at 4.5V. Thus the 4.5V values should be used when
OH
OL
designing with this supply. Worst case V and V occur at V
5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage cur-
IH
IH
IL
CC
rent (I , I , and I ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
IN CC
OZ
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2
AC Electrical Characteristics
V
5V, TA 25 C, CL 15 pF, tr tf 6 ns
CC
Symbol
, t
Parameter
Conditions
Typ
Guaranteed Limit
Units
t
Maximum Propagation Delay
12
22
ns
PHL PLH
AC Electrical Characteristics
V
2.0V to 6.0V, CL 50 pF, tr tf 6 ns (unless otherwise specified)
CC
Symbol
, t
T
25 C
T
40 to 85 C
T
A
55 to 125 C
A
A
V
Parameter
Conditions
Units
CC
Typ
60
13
11
30
8
Guaranteed Limits
t
t
Maximum Propagation
Delay
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
125
156
31
26
95
19
16
188
38
ns
ns
ns
ns
ns
ns
pF
PHL PLH
25
21
75
15
13
32
, t
Maximum Output Rise
and Fall Time
110
22
TLH THL
7
19
C
C
Power Dissipation
(per gate)
27
PD
Capacitance (Note 5)
Maximum Input Capacitance
5
10
10
10
pF
IN
Note 5: C determines the no load dynamic power consumption, P
C
V
2 f
I V , and the no load dynamic current consumption,
CC CC
PD
D
PD CC
I
C
V
f
I
.
CC
S
PD CC
Typical Performance Characteristics
Input Threshold, VT , VT
,
Propagation Delay vs
Power Supply
vs Power Supply Voltage
3
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Typical Applications
Low Power Oscillator
Note: The equations assume t1 t2
tpd0 tpd1
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4
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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