MM74HCT541SJX [FAIRCHILD]
Bus Driver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 5.30 MM, EIAJ TYPE2, SOP-20;
| 型号： | MM74HCT541SJX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Bus Driver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 5.30 MM, EIAJ TYPE2, SOP-20 |
| 文件： | 总7页 (文件大小：95K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1984
Revised February 1999
MM74HCT540 • MM74HCT541
Inverting Octal 3-STATE Buffer • Octal 3-STATE Buffer
The MM74HCT540 is an inverting buffer and the
MM74HCT541 is a non-inverting buffer. The 3-STATE con-
General Description
The MM74HCT540 and MM74HCT541 3-STATE buffers
trol gate operates as a two-input NOR such that if either G1
utilize advanced silicon-gate CMOS technology and are
or G2 are HIGH, all eight outputs are in the high-imped-
general purpose high speed inverting and non-inverting
ance state.
buffers. They possess high drive current outputs which
In order to enhance PC board layout, the MM74HCT540
enable high speed operation even when driving large bus
and MM74HCT541 offers a pinout having inputs and out-
capacitances. These circuits achieve speeds comparable
puts on opposite sides of the package. All inputs are pro-
to low power Schottky devices, while retaining the low
tected from damage due to static discharge by diodes to
power consumption of CMOS. Both devices are TTL input
VCC and ground.
compatible and have a fanout of 15 LS-TTL equivalent
inputs.
Features
■ TTL input compatible
MM74HCT devices are intended to interface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
■ Typical propagation delay: 12 ns
■ 3-STATE outputs for connection to system buses
■ Low quiescent current: 80 µA
■ Output current: 6 mA (min.)
Ordering Code:
Order Number
MM74HCT540WM
MM74HCT540SJ
MM74HCT540MTC
MM74HCT540N
MM74HCT541WM
MM74HCT541SJ
MM74HCT541MTC
MM74HCT541N
Package Number
M20B
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
M20D
MTC20
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
M20B
M20D
MTC20
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
MM74HCT540
Top View
MM74HCT541
© 1999 Fairchild Semiconductor Corporation
DS006040.prf
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
Clamp Diode Current (IIK, IOK
DC Output Current, per pin (IOUT
DC VCC or GND Current, per pin (ICC
)
−0.5 to +7.0V
−1.5 to VCC +1.5V
−0.5 to VCC +0.5V
±20 mA
Min
Max Units
)
Supply Voltage (VCC
DC Input or Output Voltage
(VIN, VOUT
)
4.5
5.5
V
)
)
)
0
VCC
V
)
±35 mA
Operating Temperature Range (TA) −40
Input Rise or Fall Times
(tr, tf)
+85
°C
)
±70 mA
Storage Temperature Range (TSTG
Power Dissipation (PD)
(Note 3)
)
−65°C to +150°C
500
ns
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
600 mW
500 mW
Note 2: Unless otherwise specified all voltages are referenced to ground.
S.O. Package only
Note 3: Power Dissipation temperature derating — plastic “N” package: −
12 mW/°C from 65°C to 85°C.
Lead Temperature (TL)
(Soldering 10 seconds)
260°C
DC Electrical Characteristics
V
= 5V ± 10% (unless otherwise specified)
CC
T
= 25°C
T = −40 to 85°C T = −55 to 125°C
A A
A
Symbol
Parameter
Conditions
Units
Typ
Guaranteed Limits
V
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
V
IH
V
V
Maximum LOW Level
Input Voltage
0.8
0.8
V
IL
Minimum HIGH Level
Output Voltage
V
= V or V
IH IL
OH
IN
|I
|I
|I
| = 20 µA
V
V
− 0.1
V
− 0.1
V − 0.1
CC
V
V
V
OUT
OUT
OUT
CC
CC
CC
| = 6.0 mA, V = 4.5V
4.2
5.2
3.98
4.98
3.84
3.7
4.7
CC
| = 7.2 mA, V = 5.5V
4.84
CC
V
Maximum LOW Level
Voltage
V
= V or V
IH IL
OL
IN
|I
|I
|I
| = 20 µA
0
0.1
0.1
0.1
0.4
V
V
OUT
OUT
OUT
| = 6.0 mA, V = 4.5V
0.2
0.2
0.26
0.26
±0.1
0.33
0.33
±1.0
CC
| = 7.2 mA, V = 5.5V
0.4
V
CC
I
I
Maximum Input
Current
V
= V or GND
±1.0
µA
IN
IN
CC
Maximum 3-STATE
Output Leakage
V
= V or GND
±0.5
±5.0
±10
µA
OZ
CC
OUT
CC
G = V
IH
Current
I
Maximum Quiescent
Supply Current
V
= V or GND
8.0
1.0
80
160
1.5
µA
IN
CC
I
= 0 µA
OUT
V
= 2.4V or 0.5V (Note 4)
0.6
1.3
mA
IN
Note 4: Measured per input. All other inputs at V or GND.
CC
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2
AC Electrical Characteristics
MM74HCT540: VCC = 5.0V, t = t = 6 ns, TA = 25°C, (unless otherwise specified)
r
f
Guaranteed
Limits
18
Symbol
, t
Parameter
Conditions
Typ
Units
t
t
t
Maximum Output
Propagation Delay
Maximum Output
Enable Time
C
= 45 pF
12
ns
PHL PLH
L
, t
C
R
C
R
= 45 pF
= 1 kΩ
= 5 pF
= 1 kΩ
14
13
28
25
ns
ns
PZL PZH
L
L
L
L
, t
Maximum Output
Disable Time
PLZ PHZ
AC Electrical Characteristics
MM74HCT540: VCC = 5.0V ± 10%, t = t = 6 ns (unless otherwise specified)
r
f
T
= 25°C
T
= −40 to 85°C T = −55 to 125°C
A
A
A
Symbol
, t
Parameter
Conditions
Units
Typ
12
22
15
20
15
Guaranteed Limits
t
Maximum Output
C
C
R
= 50 pF
20
25
38
38
50
38
30
45
45
60
45
ns
ns
ns
ns
ns
PHL PLH
L
L
L
Propagation Delay
Maximum Output
Enable Time
= 150 pF
= 1 kΩ
30
30
40
30
t
, t
C
C
= 50 pF
PZH PZL
L
= 150 pF
L
t
, t
Maximum Output
Disable Time
R
C
C
= 1 kΩ
PHZ PLZ
L
L
L
= 50 pF
= 50 pF
t
, t
Maximum Output
Rise and Fall Time
Maximum Input
Capacitance
6
5
12
10
20
15
10
20
18
10
20
ns
pF
pF
THL TLH
C
IN
C
Maximum Output
Capacitance
15
OUT
C
Power Dissipation
(per output)
12
50
pF
pF
G = V
PD
CC
Capacitance (Note 5)
G = GND
Note 5:
= C
C
determines the no load dynamic power consumption, P = C
V
2 f + I
V
,and the no load dynamic current consumption,
PD
D
PD CC
CC CC
I
V
f + I
.
CC
S
PD CC
3
www.fairchildsemi.com
AC Electrical Characteristics
MM74HCT541: VCC = 5.0V, t = t = 6 ns, T = 25°C, (unless otherwise specified)
r
f
A
Guaranteed
Limits
20
Symbol
, t
Parameter
Conditions
Typ
Units
t
t
t
Maximum Output
Propagation Delay
Maximum Output
Enable Time
C
= 45 pF
13
ns
PHL PLH
L
, t
C
R
C
R
= 45 pF
= 1 kΩ
= 5 pF
= 1 kΩ
17
15
28
25
ns
ns
PZL PZH
L
L
L
L
, t
Maximum Output
Disable Time
PLZ PHZ
AC Electrical Characteristics
MM74HCT541: VCC = 5.0V ± 10%, t = t = 6 ns (unless otherwise specified)
r
f
T
= 25°C
T
= −40 to 85°C T = −55 to 125°C
A
A
A
Symbol
, t
Parameter
Maximum Output
Conditions
= 50 pF
Units
Typ
14
17
17
22
17
Guaranteed Limits
t
C
C
R
23
29
42
38
50
38
34
49
45
60
45
ns
ns
ns
ns
ns
PHL PLH
L
L
L
Propagation Delay
Maximum Output
Enable Time
= 150 pF
= 1 kΩ
33
30
40
30
t
t
t
, t
C
C
= 50 pF
PZH PZL
L
= 150 pF
L
, t
Maximum Output
Disable Time
R
C
= 1 kΩ
PHZ PLZ
L
= 50 pF
L
, t
Maximum Output
Rise and Fall Time
Maximum Input
Capacitance
C = 5 0 pF
6
5
12
10
20
15
10
20
18
10
20
ns
pF
pF
THL TLH
L
C
C
C
IN
Maximum Output
Capacitance
15
OUT
PD
Power Dissipation
(per output)
12
45
pF
pF
G = V
CC
Capacitance (Note 6)
G = GND
Note 6:
= C
C
determines the no load dynamic power consumption, P = C
V
2 f + I
V
,and the no load dynamic current consumption,
PD
D
PD CC
CC CC
I
V
f + I
.
S
PD CC
CC
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N20A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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