NC7WZ07L6X [FAIRCHILD]

TinyLogic UHS Dual Buffer (Open Drain Outputs); TinyLogic UHS双缓冲(漏极开路输出)
NC7WZ07L6X
型号: NC7WZ07L6X
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

TinyLogic UHS Dual Buffer (Open Drain Outputs)
TinyLogic UHS双缓冲(漏极开路输出)

文件: 总7页 (文件大小:95K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
March 1999  
Revised May 2003  
NC7WZ07  
TinyLogic UHS Dual Buffer (Open Drain Outputs)  
General Description  
Features  
The NC7WZ07 is a dual buffer with open drain outputs  
from Fairchild’s Ultra High Speed Series of TinyLogic in  
the space saving SC70 6-lead package. The device is fab-  
ricated with advanced CMOS technology to achieve ultra  
high speed with high output drive while maintaining low  
static power dissipation over a very broad VCC operating  
Space saving SC70 6-lead package  
Ultra small MicroPak leadless package  
Ultra High Speed: tPZL 2.3 ns Typ into 50 pF at 5V VCC  
High IOL Output Drive: +24 mA at 3V VCC  
Broad VCC Operating Range: 1.65V to 5.5V  
range. The device is specified to operate over the 1.65V to  
5.5V VCC range. The inputs and outputs are high imped-  
Matches the performance of LCX when operated at  
3.3V VCC  
ance when VCC is 0V. Inputs tolerate voltages up to 7V  
independent of VCC operating voltage.  
Power down high impedance inputs/outputs  
Overvoltage tolerant inputs facilitate 5V to 3V translation  
Patented noise/EMI reduction circuitry implemented  
Ordering Code:  
Order  
Number  
Package  
Number  
MAA06A  
MAC06A  
Product Code  
Top Mark  
Z07  
Package Description  
Supplied As  
NC7WZ07P6X  
NC7WZ07L6X  
6-Lead SC70, EIAJ SC88, 1.25mm Wide  
6-Lead MicroPak, 1.0mm Wide  
3k Units on Tape and Reel  
5k Units on Tape and Reel  
D3  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
Pin Assignments for SC70  
(Top View)  
Pin Descriptions  
Pin One Orientation Diagram  
Pin Names  
A1, A2  
Description  
Data Inputs  
Output  
Y1, Y2  
AAA represents Product Code Top Mark - see ordering code  
Function Table  
Note: Orientation of Top Mark determines Pin One location. Read the top  
product code mark left to right, Pin One is the lower left pin (see diagram).  
Y = A  
Input  
Output  
Pad Assignments for MicroPak  
A
L
Y
L
Z
H
H = HIGH Logic Level  
L = LOW Logic Level  
(Top Thru View)  
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.  
MicroPak is a trademark of Fairchild Semiconductor Corporation.  
© 2003 Fairchild Semiconductor Corporation  
DS500218  
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions (Note 2)  
Supply Voltage (VCC  
DC Input Voltage (VIN  
DC Output Voltage (VOUT  
)
0.5V to +7V  
0.5V to +7V  
0.5V to +7V  
)
Supply Voltage Operating (VCC  
Supply Voltage Data Retention (VCC  
Input Voltage (VIN  
Output Voltage (VOUT  
)
1.65V to 5.5V  
1.5V to 5.5V  
0V to 5.5V  
)
)
DC Input Diode Current (IIK  
)
)
@ VIN < −0.5V  
50 mA  
)
0V to 5.5V  
DC Output Diode Current (IOK  
)
Operating Temperature (TA)  
Input Rise and Fall Time (tr, tf)  
40°C to +85°C  
@ VOUT < −0.5V  
50 mA  
+50 mA  
DC Output Current (IOUT  
DC VCC/GND Current (ICC/IGND  
Storage Temperature (TSTG  
)
V
V
V
CC = 1.8V, 2.5V ± 0.2V  
CC = 3.3V ± 0.3V  
0 ns/V to 20 ns/V  
0 ns/V to 10 ns/V  
0 ns/V to 5 ns/V  
350° C/W  
)
±100 mA  
)
65°C to +150°C  
150°C  
CC = 5.0V ± 0.5V  
Junction Temperature under Bias (TJ)  
Junction Lead Temperature (TL)  
(Soldering, 10 seconds)  
Thermal Resistance (θJA)  
260°C  
Note 1: Absolute maximum ratings are DC values beyond which the device  
may be damaged or have its useful life impaired. The datasheet specifica-  
tions should be met, without exception, to ensure that the system design is  
reliable over its power supply, temperature, and output/input loading vari-  
ables. Fairchild does not recommend operation outside datasheet specifi-  
cations.  
Power Dissipation (PD) @ +85°C  
180 mW  
Note 2: Unused inputs must be held HIGH or LOW. They may not float.  
DC Electrical Characteristics  
VCC  
T
A = +25°C  
TA = −40°C to +85°C  
Symbol  
VIH  
Parameter  
Units  
V
Conditions  
(V)  
Min  
Typ  
Max  
Min  
Max  
HIGH Level Input Voltage  
1.65 to 1.95 0.75 VCC  
0.75 VCC  
0.7 VCC  
2.3 to 5.5  
1.65 to 1.95  
2.3 to 5.5  
0.7 VCC  
VIL  
LOW Level Input Voltage  
0.25 VCC  
0.3 VCC  
0.25 VCC  
0.3 VCC  
V
ILKG  
HIGH Level Output  
Leakage Current  
V
IN = VIH  
OUT = VCC or GND  
1.65 to 5.5  
±5  
±10  
µA  
V
VOL  
LOW Level Output Voltage  
1.65  
1.8  
0.0  
0.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.24  
0.3  
0.4  
0.55  
0.55  
±0.1  
1
0.0  
0.1  
2.3  
0.0  
0.1  
V
V
VIN = VIL  
I
OL = 100 µA  
3.0  
0.0  
0.1  
4.5  
0.0  
0.1  
1.65  
2.3  
0.08  
0.10  
0.16  
0.24  
0.25  
0.24  
0.3  
I
I
I
I
I
OL = 4 mA  
OL = 8 mA  
OL = 16 mA  
OL = 24 mA  
OL = 32 mA  
3.0  
0.4  
3.0  
0.55  
0.55  
±1.0  
10  
4.5  
IIN  
Input Leakage Current  
0 to 5.5  
0.0  
µA 0 VIN 5.5V  
IOFF  
ICC  
Power Off Leakage Current  
Quiescent Supply Current  
µA VIN or VOUT = 5.5V  
1.65 to 5.5  
1.0  
10  
µA  
VIN = 5.5V, GND  
www.fairchildsemi.com  
2
AC Electrical Characteristics  
VCC  
T
A = +25°C  
TA = −40°C to +85°C  
Figure  
Symbol  
Parameter  
Units  
Conditions  
(V)  
1.65  
Min  
1.8  
1.8  
1.2  
0.8  
0.5  
1.8  
1.8  
1.2  
0.8  
0.5  
Typ  
6.6  
5.5  
3.7  
2.9  
2.3  
5.5  
4.3  
2.8  
2.1  
1.4  
2.5  
4.0  
3
Max  
11.5  
9.5  
5.8  
4.4  
3.5  
11.5  
9.5  
5.8  
4.4  
3.5  
Min  
1.8  
1.8  
1.2  
0.8  
0.5  
1.8  
1.8  
1.2  
0.8  
0.5  
Max  
12.6  
10.5  
6.4  
Number  
tPZL  
Propagation Delay  
1.8  
C
L = 50 pF  
Figures  
1, 3  
2.5 ± 0.2  
3.3 ± 0.3  
5.0 ± 0.5  
1.65  
ns  
RU = 500Ω  
RD = 500Ω  
VI = 2 x VCC  
4.8  
3.9  
tPLZ  
Propagation Delay  
12.6  
10.5  
6.4  
1.8  
CL = 50 pF  
Figures  
1, 3  
2.5 ± 0.2  
3.3 ± 0.3  
5.0 ± 0.5  
0
ns  
RU = 500Ω  
RD = 500Ω  
VI = 2 x VCC  
4.8  
3.9  
CIN  
Input Capacitance  
Output Capacitance  
Power Dissipation  
Capacitance  
pF  
pF  
COUT  
CPD  
0
3.3  
pF  
(Note 3)  
Figure 2  
5.0  
4
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output  
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:  
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).  
AC Loading and Waveforms  
CL includes load and stray capacitance  
Input PRR = 1.0 MHz; tW = 500 ns  
FIGURE 1. AC Test Circuit  
Input = AC Waveform; tr = tf = 1.8 ns;  
PRR = 10 MHz; Duty Cycle = 50%  
FIGURE 2. ICCD Test Circuit  
FIGURE 3. AC Waveforms  
3
www.fairchildsemi.com  
Tape and Reel Specification  
TAPE FORMAT for SC70  
Package  
Tape  
Section  
Number  
Cavities  
125 (typ)  
3000  
Cavity  
Status  
Empty  
Filled  
Cover Tape  
Status  
Designator  
Leader (Start End)  
Carrier  
Sealed  
P6X  
Sealed  
Trailer (Hub End)  
75 (typ)  
Empty  
Sealed  
TAPE DIMENSIONS inches (millimeters)  
Tape Size  
DIM A  
DIM B  
DIM F  
DIM Ko  
DIM P1  
DIM W  
Package  
0.093  
(2.35)  
0.096  
(2.45)  
0.138 ± 0.004 0.053 ± 0.004  
(3.5 ± 0.10) (1.35 ± 0.10)  
0.157  
(4)  
0.315 ± 0.004  
(8 ± 0.1)  
SC70-6  
8 mm  
www.fairchildsemi.com  
4
Tape and Reel Specification (Continued)  
TAPE FORMAT for MicroPak  
Package  
Tape  
Section  
Number  
Cavities  
125 (typ)  
5000  
Cavity  
Status  
Empty  
Filled  
Cover Tape  
Status  
Designator  
Leader (Start End)  
Carrier  
Sealed  
L6X  
Sealed  
Trailer (Hub End)  
75 (typ)  
Empty  
Sealed  
REEL DIMENSIONS inches (millimeters)  
Tape  
Size  
A
B
C
D
N
W1  
W2  
W3  
7.0  
0.059  
0.512  
0.795  
2.165 0.331 + 0.059/0.000  
0.567  
W1 + 0.078/0.039  
(W1 + 2.00/1.00)  
8 mm  
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/0.00)  
(14.40)  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
6-Lead SC70, EIAJ SC88, 1.25mm Wide  
Package Number MAA06A  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
6-Lead MicroPak, 1.0mm Wide  
Package Number MAC06A  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
7
www.fairchildsemi.com  

相关型号:

NC7WZ07L6X-L22175

TinyLogic UHS 双缓冲器(开路漏极输出)
ONSEMI

NC7WZ07L6X_11

TinyLogic® UHS Dual Buffer (Open Drain Outputs)
FAIRCHILD

NC7WZ07P6

LOGIC GATE|DUAL BUFFER|CMOS|TSSOP|6PIN|PLASTIC
ETC

NC7WZ07P6X

TinyLogic UHS Dual Buffer (Open Drain Outputs)
FAIRCHILD

NC7WZ07P6X

TinyLogic UHS Dual Buffer (Open-Drain Outputs)
ROHM

NC7WZ07P6X

TinyLogic UHS 双缓冲器(开路漏极输出)
ONSEMI

NC7WZ07P6X-L22347

TinyLogic UHS 双缓冲器(开路漏极输出)
ONSEMI

NC7WZ07P6X_11

TinyLogic® UHS Dual Buffer (Open Drain Outputs)
FAIRCHILD

NC7WZ07P6X_NL

TinyLogic UHS Dual Buffer (Open Drain Outputs)
FAIRCHILD

NC7WZ07P6_NL

Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6, 1.25 MM, LEAD FREE, EIAJ, SC-88, SC-70, 6 PIN
FAIRCHILD

NC7WZ07_05

TinyLogic UHS Dual Buffer (Open Drain Outputs)
FAIRCHILD

NC7WZ07_11

TinyLogic® UHS Dual Buffer (Open Drain Outputs)
FAIRCHILD