NC7WZ17P6_NL [FAIRCHILD]
Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6, 1.25 MM, LEAD FREE, EIAJ, SC-88, SC-70, 6 PIN;
| 型号： | NC7WZ17P6_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6, 1.25 MM, LEAD FREE, EIAJ, SC-88, SC-70, 6 PIN 触发器 |
| 文件： | 总7页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
March 1999
Revised May 2003
NC7WZ17
TinyLogic UHS Dual Buffer with Schmitt Trigger Inputs
General Description
Features
The NC7WZ17 is a dual buffer with Schmitt trigger inputs
from Fairchild’s Ultra High Speed Series of TinyLogic in
the SC70 6-lead package. The device is fabricated with
advanced CMOS technology to achieve ultra high speed
with high output drive while maintaining low static power
dissipation over a very broad VCC operating range. The
■ Space saving SC70 6-lead package
■ Ultra small MicroPak leadless package
■ Ultra High Speed: tPD 3.6 ns Typ into 50 pF at 5V VCC
■ High Output Drive: ±24 mA at 3V VCC
■ Broad VCC Operating Range; 1.65V to 5.5V
device is specified to operate over the 1.65V to 5.5V VCC
■ Matches the performance of LCX when operated at
3.3V VCC
range. The inputs and outputs are high impedance when
VCC is 0V. Inputs tolerate voltages up to 7V independent of
■ Power down high impedance inputs/outputs
VCC operating voltage. Schmitt trigger inputs typically
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Patented noise/EMI reduction circuitry implemented
achieve 1V hysteresis between the positive going and neg-
ative going input threshold voltage at 5V VCC
.
Ordering Code:
Order
Number
Package
Number
MAA06A
MAC06A
Product Code
Top Mark
Z17
Package Description
Supplied As
NC7WZ17P6X
NC7WZ17L6X
6-Lead SC70, EIAJ SC88, 1.25mm Wide
6-Lead MicroPak, 1.0mm Wide
3k Units on Tape and Reel
5k Units on Tape and Reel
A5
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Assignments for SC70
(Top View)
Pin Descriptions
Pin One Orientation Diagram
Pin Names
A1, A2
Description
Data Inputs
Output
Y1, Y2
AAA represents Product Code Top Mark - see ordering code
Function Table
Note: Orientation of Top Mark determines Pin One location. Read the Top
Product Code Mark left to right, Pin One is the lower left pin (see diagram).
Y = A
Pad Assignments for MicroPak
Input
Output
A
L
Y
L
H
H
H = HIGH Logic Level
L = LOW Logic Level
(Top Thru View)
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation
DS500217
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
)
−0.5V to +7V
−0.5V to +7V
−0.5V to +7V
)
Supply Voltage Operating (VCC
Supply Voltage Data Retention (VCC
Input Voltage (VIN
Output Voltage (VOUT
Operating Temperature (TA)
Thermal Resistance (θJA
)
1.65V to 5.5V
1.5V to 5.5V
0V to 5.5V
)
)
DC Input Diode Current (IIK
)
)
@ VIN < −0.5V
−50 mA
)
0V to VCC
DC Output Diode Current (IOK
)
−40°C to +85°C
350°C/W
@ VOUT < −0.5V
−50 mA
±50 mA
)
DC Output Current (IOUT
DC VCC/GND Current (ICC/IGND
Storage Temperature (TSTG
)
)
±100 mA
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside datasheet specifi-
cations.
)
−65°C to +150°C
150°C
Junction Temperature under Bias (TJ)
Junction Lead Temperature (TL)
(Soldering, 10 seconds)
260°C
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
Power Dissipation (PD) @ +85°C
180 mW
DC Electrical Characteristics
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VP
Parameter
Units
Conditions
(V)
1.65
1.8
2.3
3.0
4.5
5.5
1.65
1.8
2.3
3.0
4.5
5.5
1.65
1.8
2.3
3.0
4.5
5.5
1.65
1.8
2.3
3.0
4.5
1.65
2.3
3.0
3.0
4.5
Min
0.6
0.7
1.0
1.3
1.9
2.2
0.2
0.25
0.40
0.6
1.0
1.2
0.1
0.15
0.25
0.4
0.6
0.7
1.55
1.7
2.2
2.9
4.4
1.29
1.9
2.4
2.3
3.8
Typ
1.0
Max
1.4
1.5
1.8
2.2
3.1
3.6
0.8
0.9
1.15
1.5
2.0
2.3
0.9
1.0
1.1
1.2
1.5
1.7
Min
0.6
0.7
1.0
1.3
1.9
2.2
0.2
0.25
0.40
0.6
1.0
1.2
0.1
0.15
0.25
0.4
0.6
0.7
1.55
1.7
2.2
2.9
4.4
1.29
1.9
2.4
2.3
3.8
Max
1.11
1.5
1.8
2.2
3.1
3.6
0.8
0.9
1.15
1.5
2.0
2.3
0.9
1.0
1.1
1.2
1.5
1.7
Positive Threshold
Voltage
1.07
1.38
1.74
2.43
2.88
0.5
V
VN
Negative Threshold
Voltage
0.56
0.75
0.98
1.42
1.68
0.48
0.51
0.62
0.76
1.01
1.20
1.65
1.8
V
V
VH
Hysteresis Voltage
VOH
HIGH Level Output
Voltage
2.3
I
OH = −100 µA
3.0
4.5
V
VIN = VIH
1.52
2.14
2.75
2.62
4.13
IOH
IOH
=
=
−4 mA
−8 mA
I
I
I
OH = −16 mA
OH = −24 mA
OH = −32 mA
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2
DC Electrical Characteristics (Continued)
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VOL
Parameter
Units
Conditions
(V)
1.65
1.8
Min
Typ
0.0
Max
0.1
0.1
0.1
0.1
0.1
0.24
0.3
0.4
0.55
0.55
±0.1
1
Min
Max
0.1
LOW Level Output
Voltage
0.0
0.1
2.3
0.0
0.1
I
OL = 100 µA
3.0
0.0
0.1
4.5
0.0
0.1
V
V
IN = VIL
1.65
2.3
0.08
0.10
0.16
0.24
0.25
0.24
0.3
IOL
IOL
=
=
4 mA
8 mA
3.0
0.4
I
I
I
OL = 16 mA
3.0
0.55
0.55
±1.0
10
OL = 24 mA
OL = 32 mA
4.5
IIN
Input Leakage Current
0 to 5.5
0.0
µA
V
IN = 5.5V, GND
IOFF
ICC
Power Off Leakage Current
µA VIN or VOUT = 5.5V
Quiescent Supply Current 1.65 to 5.5
1.0
10
µA
V
IN = 5.5V, GND
AC Electrical Characteristics
VCC
T
A = +25°C
TA = −40°C to +85°C
Figure
Symbol
Parameter
Units
Conditions
(V)
1.65
Min
Typ
8.3
6.9
4.8
3.7
3.0
4.3
3.6
2.5
10
Max
Min
2.0
2.0
1.5
1.0
0.8
1.5
1.0
Max
15.8
13.1
9.0
Number
tPLH
tPHL
Propagation Delay
2.0
2.0
1.5
1.0
0.8
1.5
1.0
14.3
11.9
8.2
1.8
C
L = 15 pF,
L = 1 MΩ
Figures
1, 3
2.5 ± 0.2
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
0
ns
R
5.6
6.2
4.7
5.2
tPLH
tPHL
CIN
Propagation Delay
6.6
7.3
C
L = 50 pF,
L = 500Ω
Figures
1, 3
ns
pF
pF
5.6
6.2
R
Input Capacitance
Power Dissipation
Capacitance
CPD
3.3
(Note 3)
Figure 2
5.0
12
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR = 1.0 MHz; tW = 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform; tr = tf = 1.8 ns;
PRR = variable; Duty Cycle = 50%
FIGURE 3. AC Waveforms
FIGURE 2. ICCD Test Circuit
3
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Tape and Reel Specification
TAPE FORMAT for SC70
Package
Tape
Section
Number
Cavities
125 (typ)
3000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
P6X
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
Tape Size
DIM A
DIM B
DIM F
DIM Ko
DIM P1
DIM W
Package
0.093
(2.35)
0.096
(2.45)
0.138 ± 0.004 0.053 ± 0.004
(3.5 ± 0.10) (1.35 ± 0.10)
0.157
(4)
0.315 ± 0.004
(8 ± 0.1)
SC70-6
8 mm
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4
Tape and Reel Specification (Continued)
TAPE FORMAT for MicroPak
Package
Tape
Section
Number
Cavities
125 (typ)
5000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
L6X
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
REEL DIMENSIONS inches (millimeters)
Tape
Size
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165 0.331 + 0.059/−0.000
0.567
W1 + 0.078/−0.039
(W1 + 2.00/−1.00)
8 mm
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00)
(14.40)
5
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Physical Dimensions inches (millimeters) unless otherwise noted
6-Lead SC70, EIAJ SC88, 1.25mm Wide
Package Number MAA06A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
6-Lead MicroPak, 1.0mm Wide
Package Number MAC06A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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