NDB6030L [FAIRCHILD]
N-Channel Logic Level Enhancement Mode Field Effect Transistor; N沟道逻辑电平增强模式场效应晶体管型号: | NDB6030L |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | N-Channel Logic Level Enhancement Mode Field Effect Transistor |
文件: | 总12页 (文件大小:358K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
June 1996
NDP6030L / NDB6030L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
These N-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. These devices are particularly suited
for low voltage applications such as DC/DC converters
and high efficiency switching circuits where fast
switching, low in-line power loss, and resistance to
transients are needed.
52 A, 30 V. RDS(ON) = 0.0135 W @ VGS=10 V
RDS(ON) = 0.020 W @ VGS=4.5 V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
High density cell design for extremely low RDS(ON)
.
175°C maximum junction temperature rating.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted
NDP6030L
NDB6030L
Units
Drain-Source Voltage
Gate-Source Voltage - Continuous
Drain Current - Continuous
- Pulsed
30
± 16
52
V
V
A
VDSS
VGSS
ID
156
75
W
W/°C
°C
PD
Total Power Dissipation @ TC = 25°C
Derate above 25°C
0.5
Operating and Storage Temperature Range
-65 to 175
275
TJ,TSTG
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
2
°C/W
°C/W
R
JC
q
Thermal Resistance, Junction-to-Ambient
62.5
R
JA
q
© 1998 Fairchild Semiconductor Corporation
NDP6030L Rev.E
Electrical Characteristics(TC = 25°C unless otherwise noted)
Symbol Parameter Conditions
DRAIN-SOURCE AVALANCHE RATINGS (Note 1)
Min
Typ
Max
Units
WDSS
IAR
Single Pulse Drain-Source Avalanche Energy VDD = 15 V, ID = 52 A
Maximum Drain-Source Avalanche Current
100
52
mJ
A
OFF CHARACTERISTICS
BVDSS
IDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
VDS = 24 V, VGS = 0 V
30
V
Zero Gate Voltage Drain Current
10
1
µA
mA
nA
nA
TJ = 125oC
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
100
-100
IGSSF
IGSSR
VGS = 16 V, VDS = 0 V
VGS = -16 V, VDS = 0 V
ON CHARACTERISTICS (Note 1)
Gate Threshold Voltage
1
1.6
1
3
V
VGS(th)
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 26 A
TJ = 125oC
TJ = 125oC
0.7
2.2
Static Drain-Source On-Resistance
0.011 0.0135
RDS(ON)
W
0.017
0.018
0.024
0.02
VGS = 4.5 V, ID = 21 A
VGS = 10 V, VDS = 10 V
VGS = 4.5 V, VDS = 10 V
VDS = 10 V, ID = 26 A
On-State Drain Current
60
15
A
S
ID(on)
Forward Transconductance
32
gFS
DYNAMIC CHARACTERISTICS
Input Capacitance
Ciss
1350
800
pF
pF
pF
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
Output Capacitance
Coss
Crss
Reverse Transfer Capacitance
300
NDP6030L Rev.E
Electrical Characteristics (TC = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
SWITCHING CHARACTERISTICS (Note 1)
tD(on)
Turn - On Delay Time
Turn - On Rise Time
VDD = 15 V, ID = 52 A,
VGS = 10 V, RGEN = 24 W
8
16
nS
nS
130
250
tr
tD(off)
Turn - Off Delay Time
Turn - Off Fall Time
45
90
nS
nS
108
200
tf
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDS= 10 V
ID = 52 A , VGS =10 V
44
6
60
nC
nC
nC
14
DRAIN-SOURCE DIODE CHARACTERISTICS
Maximum Continuos Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
52
120
1.3
1.2
A
A
V
IS
ISM
VSD
0.93
0.85
VGS = 0 V, IS = 26 A (Note 1)
TJ = 125°C
Note:
1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
NDP6030L Rev.E
Typical Electrical Characteristics
60
3
2.5
2
6.0
5.0
V
= 10V
GS
V
=3.0V
GS
50
40
30
20
10
0
4.5
4.0
3.5
4.0
3.5
4.5
5.0
40
1.5
1
6.0
3.0
2
10
2.5
0.5
0
0.5
1
1.5
2.5
3
0
10
20
I
30
, DRAIN CURRENT (A)
50
60
V
, DRAIN-SOURCE VOLTAGE (V)
D
DS
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 1. On-Region Characteristics.
1.8
1.6
1.4
1.2
1
2
V
= 10V
GS
I
= 26A
D
1.75
1.5
1.25
1
V
= 10V
GS
T = 125°C
J
25°C
-55°C
0.8
0.75
0.5
0.6
-50
-25
0
25
50
75
100
125
150
175
0
10
20
30
40
50
60
I
, DRAIN CURRENT (A)
T , JUNCTION TEMPERATURE (°C)
J
D
Figure 4. On-Resistance Variation
Figure 3. On-Resistance Variation
with Drain Current and Temperature.
with Temperature.
1.4
1.2
1
50
40
30
20
10
0
T = -55°C
VDS = 10V
J
VDS = V
GS
25°C
ID = 250µA
125°C
0.8
0.6
0.4
-50
-25
0
25
50
75
100
125
150
175
0
1
2
3
4
5
T , JUNCTION TEMPERATURE (°C)
V
, GATE TO SOURCE VOLTAGE (V)
J
GS
Figure 6. Gate Threshold Variation
Figure 5. Transfer Characteristics.
with Temperature.
NDP6030L Rev.E
Typical Electrical Characteristics (continued)
1.15
50
20
VGS = 0V
I
= 250µA
D
5
1
1.1
1.05
1
T
= 125°C
J
0.1
0.01
25°C
-55°C
0.95
0.001
0.0001
0.9
-50
-25
0
25
50
75
100
125
150
175
0
0.2
0.4
0.6
0.8
1
1.2
1.4
T
, JUNCTION TEMPERATURE (°C)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
J
Figure 8. Body Diode Forward Voltage Variation
with Source Current and
Figure 7. Breakdown Voltage
Variation with Temperature.
Temperature.
5000
10
VDS = 10V
ID = 52A
3000
2000
15V
8
6
4
2
0
20V
C
iss
1000
500
C
oss
f = 1 MHz
VGS = 0V
C
rss
300
200
0.1
0.2
0.5
1
2
5
10
30
0
10
20
Q , GATE CHARGE (nC)
g
30
40
50
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 10. Gate Charge Characteristics.
Figure 9. Capacitance Characteristics.
VDD
ton
toff
td(off)
t d(on)
tr
tf
RL
VIN
90%
90%
D
VOUT
VGS
V
OUT
RGEN
10%
10%
90%
DUT
G
INVERTED
S
V
50%
50%
IN
10%
PULSE WIDTH
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDP6030L Rev.E
Typical Electrical Characteristics (continued)
50
200
100
50
VDS =10V
T
= -55°C
25°C
J
40
30
20
10
0
20
10
5
125°C
VGS = 10V
SINGLE PULSE
RqJC = 2.0o C/W
2
1
T
C
= 25°C
0.5
0
10
20
, DRAIN CURRENT (A)
30
40
0.1
0.5
1
2
5
10
30
50
I
V
, DRAIN-SOURCE VOLTAGE (V))
D
DS
Figure 13. Transconductance Variation with Drain
Figure 14. Maximum Safe Operating Area.
Current and Temperature.
1
D = 0.5
0.5
0.3
0.2
0.2
R
(t) = r(t) * R
qJC
R
qJC
= 2.0 °C/W
qJC
0.1
0.1
P(pk)
0.05
0.02
0.01
0.05
t
1
t
2
0.03
0.02
T - T = P * R
(t)
JC
Single Pulse
q
J
C
Duty Cycle, D = t /t
1
2
0.01
0.01
0.1
1
10
100
1000
t
,TIME (ms)
1
Figure 15. Transient Thermal Response Curve.
NDP6030L Rev.E
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TO-220 parts are shipped normally in tube. The tube is
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a small box laid with anti-
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12 Tubes per Bag
530mm x 130mm x 83mm
Intermediate box
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FSCINT Label sample
FAIRCHILD SEMICONDUCTOR CORPORATION
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530x130x83 114x102x51
1,080
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Weight per unit (gm)
1.4378
1.4378
Note/Comments
TO-220 bulk Packing
Configuration: Figure 3.0
Anti-static
530mm x 130mm x 83mm
Intermediate box
Bubbl e Sheets
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Configuration: Figure 4.0
0.123
+0.001
-0.003
0.165
0.080
Note: All dim ensions are in inches
0.275
0.450
±.030
9852
9852
9852
9852
9852
9852
9852 9852 9852 9852 9852
F F F F F
NDP4060L NDP4060L NDP4060L NDP4060L NDP4060L NDP4060L
9852
F
F
F
F
F
F
F
NDP4060L NDP4060L NDP4060L NDP4060L NDP4060L NDP4060L
1.300
±.015
0.160
0.032
±.003
20.000
+0.031
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0.800
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August 1999, Rev. B
TO-220 Tape and Reel Data and Package Dimensions, continued
TO-220 (FS PKG Code 37)
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Scale 1:1 on letter size paper
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Part Weight per unit (gram): 1.4378
September 1998, Rev. A
TO-263AB/D2PAK Tape and Reel Data and Package
Dimensions
TO-263AB/D2PAK Packaging
Configuration: Figure 1.0
Packaging Description:
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DO NO T SHI P OR STO RE N EAR STRO NG ELECTROSTATIC
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is made from
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M
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TNR DATE
PT NUMB E
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R
PEEL STRENGTH MIN ______________gms
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Moisture Sensitive
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Customized
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Qty per Reel/Tube/Bag
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45
-
13" Dia
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel
359x359x57 530x130x83
800
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1.4378
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Standard Intermediate box
1.4378
1.6050
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Components
Trailer Tape
Leader Tape
400mm minimum or
25 empty pockets
1520mm minimum or
95 empty pockets
September 1999, Rev. B
TO-263AB/D2PAK Tape and Reel Data and Package Dimensions, continued
TO-263AB/D2PAK Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
E2
F
W
K0
Wc
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
Pkg type
TO263AB/
D2PAK
(24mm)
10.60
+/-0.10
15.80
+/-0.10
24.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
22.25
min
11.50
+/-0.10
16.0
+/-0.1
4.0
+/-0.1
4.90
+/-0.10
0.450
+/-0.150
21.0
+/-0.3
0.06
+/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.9mm
maximum
10 deg maximum
Typical
component
cavity
center line
0.9mm
maximum
B0
10 deg maximum component rotation
Typical
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Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
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Component Rotation
TO-263AB/D2PAK Reel Configuration:
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Max
B Min
Dim C
Dim A
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Dim D
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13" Diameter Option
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Dim W1
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13.00
330
0.059
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512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.961 +0.078/-0.000
24.4 +2/0
1.197
30.4
0.941 – 0.1.079
23.9 – 27.4
24mm
13" Dia
August 1999, Rev. B
TO-263AB/D2PAK Tape and Reel Data and Package Dimensions, continued
TO-263AB/D2PAK (FS PKG Code 45)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
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Part Weight per unit (gram): 1.4378
August 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
SyncFET™
TinyLogic™
UHC™
CROSSVOLT™
E2CMOSTM
VCX™
FACT™
FACT Quiet Series™
QS™
FAST®
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
FASTr™
GTO™
HiSeC™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
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