NDC652P [FAIRCHILD]

P-Channel Logic Level Enhancement Mode Field Effect Transistor; P沟道逻辑电平增强模式场效应晶体管
NDC652P
型号: NDC652P
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

P-Channel Logic Level Enhancement Mode Field Effect Transistor
P沟道逻辑电平增强模式场效应晶体管

晶体 小信号场效应晶体管 开关 光电二极管
文件: 总10页 (文件大小:248K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
March 1996  
NDC652P  
P-Channel Logic Level Enhancement Mode Field Effect Transistor  
General Description  
Features  
-2.4A, -30V. RDS(ON) = 0.18W @ VGS = -4.5V  
RDS(ON) = 0.11W @ VGS = -10V.  
These P-Channel logic level enhancement mode power  
field effect transistors are produced using Fairchild's  
proprietary, high cell density, DMOS technology. This  
very high density process is especially tailored to  
minimize on-state resistance. These devices are  
particularly suited for low voltage applications such as  
notebook computer power management and other  
battery powered circuits where fast high-side switching,  
and low in-line power loss are needed in a very small  
outline surface mount package.  
Proprietary SuperSOTTM-6 package design using copper  
lead frame for superior thermal and electrical capabilities.  
High density cell design for extremely low RDS(ON)  
.
Exceptional on-resistance and maximum DC current  
capability.  
____________________________________________________________________________________________  
4
3
2
1
5
6
Absolute Maximum Ratings  
Symbol Parameter  
TA = 25°C unless otherwise noted  
NDC652P  
-30  
Units  
Drain-Source Voltage  
V
V
A
VDSS  
VGSS  
ID  
Gate-Source Voltage - Continuous  
-20  
Drain Current - Continuous  
- Pulsed  
-2.4  
-10  
PD  
Maximum Power Dissipation  
(Note 1a)  
(Note 1b)  
1.6  
W
1
(Note 1c)  
0.8  
TJ,TSTG Operating and Storage Temperature Range  
-55 to 150  
°C  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Ambient (Note 1a)  
R
78  
30  
°C/W  
°C/W  
JA  
q
Thermal Resistance, Junction-to-Case  
(Note 1)  
R
JC  
q
© 1997 Fairchild Semiconductor Corporation  
NDC652P Rev. D1  
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
OFF CHARACTERISTICS  
BVDSS  
IDSS  
Drain-Source Breakdown Voltage  
VGS = 0 V, ID = -250 µA  
VDS = -24 V, VGS = 0 V  
-30  
V
Zero Gate Voltage Drain Current  
1
µA  
µA  
nA  
nA  
TJ = 55oC  
10  
Gate - Body Leakage, Forward  
Gate - Body Leakage, Reverse  
100  
-100  
IGSSF  
IGSSR  
VGS = 20 V, VDS = 0 V  
VGS = -20 V, VDS= 0 V  
ON CHARACTERISTICS (Note 2)  
Gate Threshold Voltage  
-1  
-1.5  
-1.2  
0.16  
0.22  
0.09  
-3  
V
VGS(th)  
VDS = VGS, ID = -250 µA  
VGS = -4.5 V, ID = -2.4 A  
TJ = 125oC  
TJ = 125oC  
-0.7  
-2.2  
0.18  
0.36  
0.11  
RDS(ON)  
Static Drain-Source On-Resistance  
W
VGS = -10 V, ID = -3.1 A  
VGS = -4.5 V, VDS = -5 V  
VDS = -10 V, ID = -2.4 A  
On-State Drain Current  
-5  
A
S
ID(on)  
gFS  
Forward Transconductance  
3
DYNAMIC CHARACTERISTICS  
Input Capacitance  
290  
180  
60  
pF  
pF  
pF  
Ciss  
Coss  
Crss  
VDS = -15 V, VGS = 0 V,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
SWITCHING CHARACTERISTICS (Note 2)  
Turn - On Delay Time  
Turn - On Rise Time  
Turn - Off Delay Time  
Turn - Off Fall Time  
Total Gate Charge  
13  
26  
20  
35  
30  
30  
20  
ns  
ns  
tD(on)  
tr  
tD(off)  
tf  
VDD = -15 V, ID = -1 A,  
VGEN = -4.5 V, RGEN = 6 W  
22  
ns  
19  
ns  
10.5  
1.5  
3.3  
nC  
nC  
nC  
Qg  
Qgs  
Qgd  
VDS = -15 V,  
ID = -2.4 A, VGS = -10 V  
Gate-Source Charge  
Gate-Drain Charge  
NDC652P Rev. D1  
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
DRAIN-SOURCE DIODE CHARACTERISTICS  
IS  
Continuous Source Diode Current  
Drain-Source Diode Forward Voltage  
-1.3  
-1.2  
A
V
-0.8  
VSD  
Notes:  
VGS = 0 V, IS = -1.3 A (Note 2)  
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by  
design while RqCA is determined by the user's board design.  
T - T  
T - T  
PD  
=
=
(t)  
R
qJ  
= I2 (t) ´ RDS  
J
A
J
A
( )  
t
(
)
T
J
ON  
D
R
+R (t)  
C qCA  
qJ  
A
Typical RqJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:  
a. 78oC/W when mounted on a 1 in2 pad of 2oz cpper.  
b. 125oC/W when mounted on a 0.01 in2 pad of 2oz cpper.  
c. 156oC/W when mounted on a 0.003 in2 pad of 2oz cpper.  
1a  
1c  
1b  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.  
NDC652P Rev. D1  
Typical Electrical Characteristics  
-10  
2.5  
2
VGS = -10V  
-7.0  
6.0  
-5.5  
VGS = -3.0V  
-5.0  
-3.5  
-8  
-6  
-4  
-2  
0
-4.5  
-4.0  
-4.0  
1.5  
1
-4.5  
-3.5  
-5.0  
-5.5  
-6.0  
-3.0  
-2.5  
-7.0  
-10  
0.5  
0
-0.5  
-1  
-1.5  
-2  
-2.5  
-3  
0
-2  
-4  
-6  
-8  
-10  
VDS  
, DRAIN-SOURCE VOLTAGE (V)  
I
, DRAIN CURRENT (A)  
D
Figure 1. On-Region Characteristics  
Figure 2. On-Resistance Variation  
with Drain Current and Gate Voltage  
1.6  
1.4  
1.2  
1
2.5  
2
V GS = -4.5 V  
ID = -2.4A  
VGS = -4.5V  
T
= 125°C  
J
1.5  
1
25°C  
-55°C  
0.8  
0.6  
0.5  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0
-2  
-4  
-6  
-8  
-10  
T
, JUNCTION TEMPERATURE (°C)  
J
I
, DRAIN CURRENT (A)  
D
Figure 4. On-Resistance Variation  
with Drain Current and Temperature  
Figure 3. On-Resistance Variation  
with Temperature  
-10  
1.2  
VDS = - 10V  
T
= -55°C  
J
V DS = V  
GS  
125°C  
25°C  
1.1  
1
-8  
-6  
-4  
-2  
0
I D = -250µA  
0.9  
0.8  
0.7  
0.6  
-1  
-2  
-3  
-4  
-5  
-6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
V
, GATE TO SOURCE VOLTAGE (V)  
T
, JUNCTION TEMPERATURE (°C)  
GS  
J
Figure 6. Gate Threshold Variation  
with Temperature  
Figure 5. Transfer Characteristics  
NDC652P Rev. D1  
Typical Electrical Characteristics (continued)  
1.1  
10  
5
ID = -250µA  
1.08  
VGS = 0V  
T
= 125°C  
J
25°C  
1.06  
1.04  
1.02  
1
1
0.1  
-55°C  
0.98  
0.96  
0.94  
0.01  
0.001  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0.2  
0.4  
-V  
0.6  
0.8  
1
1.2  
T
, JUNCTION TEMPERATURE (°C)  
, BODY DIODE FORWARD VOLTAGE (V)  
J
SD  
Figure 8. Body Diode Forward Voltage Variation with  
Source Current and Temperature  
Figure 7. Breakdown Voltage Variation  
with Temperature  
1000  
500  
10  
VDS  
= -5V  
ID = -2.4A  
-15V  
-10V  
8
6
4
2
0
C
iss  
C
oss  
200  
100  
50  
f = 1 MHz  
VGS = 0V  
C
rss  
0.1  
0.2  
-V  
0.5  
1
2
5
10  
30  
0
2
4
6
8
10  
12  
, DRAIN TO SOURCE VOLTAGE (V)  
Q
, GATE CHARGE (nC)  
g
DS  
Figure 9. Capacitance Characteristics  
Figure 10. Gate Charge Characteristics  
ton  
toff  
-VDD  
td(off)  
td(on)  
tf  
tr  
RL  
90%  
VIN  
90%  
D
VOUT  
V
OUT  
VGS  
10%  
10%  
90%  
RGEN  
DUT  
G
V
50%  
50%  
IN  
S
10%  
INVERTED  
PULSE WIDTH  
Figure 12. Switching Waveforms  
Figure 11. Switching Test Circuit  
NDC652P Rev. D1  
Typical Electrical and ThermalCharacteristics (continued)  
2
1.5  
1
8
6
4
2
0
VDS = -10V  
1a  
T
= -55°C  
J
25°C  
125°C  
1b  
1c  
0.5  
0
4.5"x5" FR-4 Board  
TA  
25o  
Still Air  
=
C
0
0.2  
0.4  
0.6  
0.8  
1
0
-2  
-4  
-6  
-8  
-10  
2
2oz COPPER MOUNTING PAD AREA (in  
)
I
, DRAIN CURRENT (A)  
D
Figure 14. SOT-6 Maximum Steady-State Power  
Dissipation versus Copper Mounting Pad Area.  
Figure 13. Transconductance Variation with Drain  
Current and Temperature  
3
30  
10  
2.5  
2
1a  
3
1
1b  
1c  
0.3  
0.1  
V
GS = -4.5V  
1.5  
1
SINGLE PULSE  
JA = See Note 1c  
4.5"x5" FR-4 Board  
TA  
25 o  
Still Air  
R
q
=
C
0.03  
0.01  
TA = 25°C  
VGS  
=
-4.5V  
0
0.2  
0.4  
0.6  
0.8  
2
1
0.1  
0.2  
0.5  
1
2
5
10  
30  
50  
2oz COPPER MOUNTING PAD AREA (in  
)
-V  
DS  
, DRAIN-SOURCE VOLTAGE (V)  
Figure 16. Maximum Safe Operating Area  
Figure 15. Maximum Steady-State Drain Current  
versus Copper Mounting Pad Area.  
1
D = 0.5  
0.5  
R
(t) = r(t) * R  
JA  
q
JA  
q
R
0.2  
0.1  
0.2  
0.1  
= See Note 1c  
JA  
q
P(pk)  
0.05  
0.05  
t1  
0.02  
0.01  
t2  
0.02  
0.01  
T
- T = P * R  
(t)  
J
A
JA  
q
Single Pulse  
Duty Cycle, D = t / t  
2
1
0.005  
0.00001  
0.0001  
0.001  
0.01  
0.1  
t 1, TIME (sec)  
1
10  
100  
300  
Figure 17. Transient Thermal Response Curve.  
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change  
depending on the circuit board design.  
NDC652P Rev. D1  
SuperSOTTM-6 Tape and Reel Data and Package Dimensions  
SSOT-6 Packaging  
Configuration:  
Figure 1.0  
Packaging Description:  
Customize Label  
SSOT-6 parts are shipped in tape. The carrier tape is  
made from  
a dissipative (carbon filled) polycarbonate  
resin. The cover tape is a multilayer film (Heat Activated  
Adhesive in nature) primarily composed of polyester film,  
adhesive layer, sealant, and anti-static sprayed agent.  
These reeled parts in standard option are shipped with  
3,000 units per 7" or 177cm diameter reel. The reels are  
dark blue in color and is made of polystyrene plastic (anti-  
static coated). Other option comes in 10,000 units per 13"  
or 330cm diameter reel. This and some other options are  
described in the Packaging Information table.  
Antistatic Cover Tape  
These full reels are individually barcode labeled and  
placed inside a pizza box (illustrated in figure 1.0) made of  
recyclable corrugated brown paper with  
printing. One pizza box contains three reels maximum.  
And these pizza boxes are placed inside barcode  
a Fairchild logo  
a
labeled shipping box which comes in different sizes  
depending on the number of parts shipped.  
Embossed  
Carrier Tape  
F63TNR  
Label  
631  
631  
631  
631  
631  
SSOT-6 Packaging Information  
Pin 1  
Standard  
Packaging Option  
D87Z  
(no flow c ode)  
Packaging type  
TNR  
3,000  
7" Dia  
TNR  
10,000  
13"  
SSOT-6 Unit Orientation  
Qty per Reel/Tube/Bag  
Reel Size  
Box Dimension (mm)  
Max qty per Box  
184x187x47 343x343x64  
9,000  
0.0158  
0.1440  
30,000  
0.0158  
0.4700  
343mm x 342mm x 64mm  
Intermediate box for D87Z Option  
F63TNR Label  
Weight per unit (gm)  
Weight per Reel (kg)  
Note/Comments  
F63TNR  
Label  
F63TNR Label sample  
F63TNR  
Label  
LOT: CBVK741B019  
FSID: FDC633N  
QTY: 3000  
SPEC:  
184mm x 187mm x 47mm  
Pizza Box for Standard Option  
D/C1: D9842  
D/C2:  
QTY1:  
QTY2:  
SPEC REV:  
CPN:  
SSOT-6 Tape Leader and Trailer  
N/F: F  
(F63TNR)3  
Configuration:  
Figure 2.0  
Carrier Tape  
Component s  
Cover Tape  
Trailer Tape  
Leader Tape  
300mm minimum or  
75 empty poc kets  
500mm minimum or  
125 empty poc kets  
August 1999, Rev. C  
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued  
SSOT-6 Embossed Carrier Tape  
Configuration:  
Figure 3.0  
P0  
D0  
T
E1  
E2  
F
W
K0  
Wc  
B0  
Tc  
A0  
D1  
P1  
User Direction of Feed  
Dimensions are in millimeter  
A0  
B0  
W
D0  
D1  
E1  
E2  
F
P1  
P0  
K0  
T
Wc  
Tc  
Pkg type  
SSOT-6  
(8mm)  
3.23  
+/-0.10  
3.18  
+/-0.10  
8.0  
+/-0.3  
1.55  
+/-0.05  
1.125  
+/-0.125  
1.75  
+/-0.10  
6.25  
min  
3.50  
+/-0.05  
4.0  
+/-0.1  
4.0  
+/-0.1  
1.37  
+/-0.10  
0.255  
+/-0.150  
5.2  
+/-0.3  
0.06  
+/-0.02  
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481  
rotational and lateral movement requirements (see sketches A, B, and C).  
0.5mm  
maximum  
20 deg maximum  
Typical  
component  
cavity  
center line  
0.5mm  
maximum  
B0  
20 deg maximum component rotation  
Typical  
component  
center line  
Sketch A (Side or Front Sectional View)  
Component Rotation  
Sketch C (Top View)  
Component lateral movement  
A0  
Sketch B (Top View)  
Component Rotation  
SSOT-6 Reel Configuration:  
Figure 4.0  
W1 Measured at Hub  
Dim A  
Max  
Dim A  
max  
See detail AA  
Dim N  
Diameter Option  
7"  
B Min  
Dim C  
See detail AA  
Dim D  
min  
W3  
13" Diameter Option  
W2 max Measured at Hub  
DETAIL AA  
Dimensions are in inches and millimeters  
Reel  
Option  
Tape Size  
Dim A  
Dim B  
Dim C  
Dim D  
Dim N  
Dim W1  
Dim W2  
Dim W3 (LSL-USL)  
7.00  
177.8  
0.059  
1.5  
512 +0.020/-0.008  
13 +0.5/-0.2  
0.795  
20.2  
2.165  
55  
0.331 +0.059/-0.000  
8.4 +1.5/0  
0.567  
14.4  
0.311 – 0.429  
7.9 – 10.9  
8mm  
8mm  
7" Dia  
13.00  
330  
0.059  
1.5  
512 +0.020/-0.008  
13 +0.5/-0.2  
0.795  
20.2  
4.00  
100  
0.331 +0.059/-0.000  
8.4 +1.5/0  
0.567  
14.4  
0.311 – 0.429  
7.9 – 10.9  
13" Dia  
July 1999, Rev. C  
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued  
SuperSOT -6 (FS PKG Code 31, 33)  
1:1  
Scale 1:1 on letter size paper  
Dimensions shown below are in:  
inches [millimeters]  
Part Weight per unit (gram): 0.0158  
September 1998, Rev. A  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
CoolFET™  
ISOPLANAR™  
MICROWIRE™  
POP™  
PowerTrench  
QFET™  
SyncFET™  
TinyLogic™  
UHC™  
CROSSVOLT™  
E2CMOSTM  
VCX™  
FACT™  
FACT Quiet Series™  
QS™  
FAST®  
Quiet Series™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
FASTr™  
GTO™  
HiSeC™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. D  

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