NDC7001C [ONSEMI]
双 N 和 P 沟道增强型场效应晶体管,60V;型号: | NDC7001C |
厂家: | ONSEMI |
描述: | 双 N 和 P 沟道增强型场效应晶体管,60V PC 开关 光电二极管 晶体管 场效应晶体管 |
文件: | 总10页 (文件大小:359K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
D2
Field Effect Transistor -
Dual, N & P-Channel,
Enhancement Mode
S1
D1
G2
S2
G1
TSOT23 6−Lead
SUPERSOT−6
CASE 419BL
NDC7001C
General Description
These dual N & P−Channel Enhancement Mode Field Effect
Transistors are produced using onsemi’s proprietary, high cell density,
DMOS technology. This very high density process has been designed
to minimize on−state resistance, provide rugged and reliable
performance and fast switching. These device is particularly suited for
low voltage, low current, switching, and power supply application.
MARKING DIAGRAM
XXX M
G
1
XXX = Specific Device Code
Features
M
= Date Code
G
= Pb−Free Package
• Q1 0.51 A, 60 V
R
R
= 2 W @ V = 10 V
GS
DS(ON)
= 4 W @ V = 4.5 V
DS(ON)
GS
PINOUT
• Q2 –0.34 A, 60 V
R
R
= 5 W @ V = –10 V
GS
DS(ON)
Q2(P)
= 7.5 W @ V = –4.5 V
DS(ON)
GS
4
5
6
3
2
1
• High Saturation Current
• High Density Cell Design for Low R
DS(ON)
• Proprietary SUPERSOTt−6 Package Design Using Copper Lead
Frame for Superior Thermal and Electrical Capabilities
• This is a Pb−Free Device
Q1(N)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Drain−Source Voltage
Q1
60
20
Q2
−60
20
Unit
V
V
DSS
V
GSS
ORDERING INFORMATION
Gate−Source Voltage
V
See detailed ordering and shipping information on page 8 of
this data sheet.
I
D
Drain Current
− Continuous
(Note 1a)
0.51 −0.34
A
− Pulsed
1.5 −1
A
W
W
W
°C
P
D
Power Dissipation for (Note 1a)
0.96
0.9
Single Operation
(Note 1b)
(Note 1c)
0.7
T , T
Operating and Storage Temperature
Range
−55 to +150
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
Unit
RqJA
Thermal Resistance,
Junction to Ambient (Note 1a)
130
°C/W
RqJC
Thermal Resistance,
Junction to Case (Note 1)
60
°C/W
© Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
December, 2021 − Rev. 2
NDC7001C/D
NDC7001C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain–Source Breakdown Voltage
V
GS
V
GS
= 0 V, I = 250 mA
Q1
Q2
60
–60
−
−
−
−
V
DSS
D
= 0 V, I = –250 mA
D
Breakdown Voltage Temperature
Coefficient
I
D
= 250 mA,Ref. to 25°C
= –250 mA,Ref. to 25°C
Q1
Q2
−
−
67
–57
−
−
mV/°C
DBVDSS
DTJ
D
I
I
Zero Gate Voltage Drain Current
V
DS
V
DS
= 48 V, V = 0 V
Q1
Q2
−
−
−
−
1
–1
mA
DSS
GS
= –48 V, V = 0 V
GS
I
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V
GS
V
GS
= 20 V, V = 0 V
All
All
−
−
−
−
100
nA
nA
GSSF
DS
I
= –20 V, V = 0 V
–100
GSSR
DS
ON CHARACTERISTICS (Note 2)
V
Gate Threshold Voltage
Q1
Q2
Q1
Q2
Q1
1
–1
−
2.1
–1.9
–3.8
3.2
2.5
–3.5
−
V
mV/°C
W
V
V
I
= V , I = 250 mA
GS(th)
DS
GS
D
= V , I = –250 mA
DS
GS
D
Gate Threshold Voltage
Temperature Coefficient
= 250 mA, Referenced to 25°C
= –250 mA, Ref. to 25°C
DVGS(th)
DTJ
D
I
D
−
−
R
Static Drain–Source
On–Resistance
V
GS
V
GS
V
GS
= 10 V, I = 0.51 A
−
−
−
1
2
1.7
2
4
3.5
DS(on)
D
= 4.5 V, I = 0.35 A
D
= 10 V, I = 0.51 A, T = 125°C
D
J
Q2
V
GS
V
GS
V
GS
= –10 V, I = –0.34 A
−
−
−
1.2
1.5
1.9
5
7.5
10
D
= – 4.5 V, I = –0.25 A
D
= –10 V, I = –0.34 A, T = 125°C
D
J
I
On−State Drain Current
Q1
Q2
Q1
V
V
V
= 10 V, V = 10 V
1.5
–1
−
−
−
−
−
−
A
mS
pF
pF
pF
W
D(on)
GS
GS
DS
DS
= –10 V, V = –10 V
DS
g
FS
Forward Transconductance
= 10 V, I = 0.51 A
380
D
DYNAMIC CHARACTERISTICS
C
C
Input Capacitance
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
For Q1:
−
−
−
−
−
−
−
−
20
66
−
−
−
−
−
−
−
−
iss
V
DS
= 25 V, V = 0 V
GS
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
11
For Q2:
oss
V
DS
= –25 V, V = 0 V
GS
13
f = 1.0 MHz
C
4.3
6
rss
R
V
GS
= 15 mV, f = 1.0 MHz
11.2
11.2
G
SWITCHING CHARACTERISTICS (Note 2)
t
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
For Q1:
−
−
−
−
−
−
−
−
−
−
−
−
−
2.8
3.2
8
5.6
6.4
16
20
26
16
8
ns
ns
d(on)
V
DS
V
GS
= 25 V, I = 1 A
DS
= 10 V, R
= 6 W
GEN
t
r
For Q2:
V
DS
V
GS
= –25 V, I = –1 A
= –10 V, R
DS
GEN
10
14
8
= 6 W
t
ns
d(off)
t
f
4
ns
1
2
Q
For Q1:
1.1
1.6
0.2
0.3
0.4
1.5
2.2
−
nC
nC
nC
g
V
DS
V
GS
= 25 V, I = 0.51 A
= 10 V, R
DS
GEN
= 6 W
Q
For Q2:
gs
gd
V
DS
V
GS
= –25 V, I = –0.35 A
= –10 V, R
DS
GEN
−
= 6 W
Q
−
www.onsemi.com
2
NDC7001C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (continued)
Symbol
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain–Source Diode Forward Current
Parameter
Test Conditions
Min
Typ
Max
Unit
A
I
S
Q1
Q2
−
−
−
−
−
−
−
−
−
−
0.51
–0.34
1.2
–1.4
−
V
SD
Drain–Source Diode Forward
Voltage
Q1
Q2
Q1
Q2
Q1
Q2
V
V
= 0 V, I = 0.51 A (Note 2)
0.8
–0.8
18
16
16
11
V
GS
S
= 0 V, I = –0.34 A (Note 2)
GS
S
t
rr
Diode Reverse Recovery Time
nS
nC
I = 0.51 A, d /d = 100 A/ms
F
iF
t
I = –0.34 A, d /d = 100 A/ms
−
F
iF
t
Q
Diode Reverse Recovery
Charge
−
I = 0.51 A, d /d = 100 A/ms
rr
F
iF
t
I = –0.34 A, d /d = 100 A/ms
−
F
iF
t
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design.
q
q
JC
CA
a. 130°C/W when mounted
b. 140°C/W when mounted
c. 180°C/W when mounted
on a minimum pad.
2
2
on a 0.125 in pad of 2 oz.
on a .005 in pad of 2 oz.
copper.
copper.
Scale 1:1 on letter size paper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0 %.
www.onsemi.com
3
NDC7001C
TYPICAL CHARACTERISTICS: N−CHANNEL
2.4
1.5
1.2
0.9
0.6
0.3
0
V
GS
= 10 V
V
GS
= 4.5 V
2.2
2
8.0 V
6.0 V
1.8
1.6
1.4
1.2
1
5.0 V
5.0 V
4.5 V
4.0 V
6.0 V
7.0 V
0.9
8.0 V
10 V
0.8
0
2
4
6
8
0
0.3
0.6
1.2
1.5
V
DS
, Drain−Source Voltage (V)
I , Drain Current (A)
D
Figure 1. On−Region Characteristics
Figure 2. On−Resistance Variation with
Drain Current and Gate Voltage
2
1.8
1.6
1.4
1.2
1
6
I
V
= 0.51 A
I
= 0.26 A
D
D
= 10 V
GS
5
4
3
2
1
0
T = 125°C
A
0.8
0.6
0.4
T = 25°C
A
−50 −25
0
25
50
75 100 125 150
2
4
6
8
10
T , Junction Temperature (°C)
J
V
GS
, Gate to Source Voltage (V)
Figure 3. On−Resistance Variation with
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
Temperature
1.5
10
1
T = −55°C
A
V
DS
= 5 V
V
GS
= 0 V
125°C
25°C
1.2
0.9
0.6
0.3
0
T = 125°C
A
0.1
25°C
−55°C
0.01
0.001
0.0001
1
2
3
4
5
6
7
8
9
0.2
0.4
V , Body Diode Forward Voltage (V)
SD
0.6
0.8
1
1.2
V
GS
, Gate to Source Voltage (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
www.onsemi.com
4
NDC7001C
TYPICAL CHARACTERISTICS: N−CHANNEL (continued)
10
8
60
I
D
= 0.51 A
V
= 25 V
f = 1 MHz
= 0 V
DS
V
GS
30 V
50
40
30
20
10
0
48 V
6
C
4
ISS
C
OSS
2
C
RSS
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
10
20
, Drain to Source Voltage (V)
DS
30
40
50
60
Q , Gate Charge (nC)
V
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
10
1
10
SINGLE PULSE
= 180°C/W
T = 25°C
A
R
q
JA
8
6
4
2
10 ms
R
LIMIT
DS(ON)
100 ms
1 ms
10 ms
100 ms
1 s
DC
0.1
0.01
V
GS
= 10 V
SINGLE PULSE
= 180°C/W
R
q
JA
T = 25°C
A
0
0.1
1
10
100
0.001
0.01
0.1
1
10
100
V
DS
, Drain−Source Voltage (V)
t , Time (s)
1
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power
Dissipation
1
D = 0.5
R
R
(t) = r(t) * R
q
JA
= 180°C/W
q
q
JA
JA
0.2
0.1
0.1
0.05
0.02
P(pk)
t1
0.01
0.01
t2
SINGLE PULSE
T − T = P * R (t)
q
JA
J
A
Duty Cycle, D = t / t
1
2
0.001
0.0001
0.0001
0.001
0.1
t , Time (s)
1
10
100
1000
0.01
1
Figure 11. Transient Thermal Response Curve
(Note: Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.)
www.onsemi.com
5
NDC7001C
TYPICAL CHARACTERISTICS: P−CHANNEL
1
0.8
0.6
0.4
0.2
0
2.2
V
= −10 V
GS
V
GS
= −3.0 V
−6.0 V
−4.0 V
2
1.8
1.6
1.4
1.2
1
−3.5 V
−6.0 V
−3.5 V
−3.0 V
−4.0 V
−4.5 V
−6.0 V
−10 V
0.8
0
1
2
3
4
5
0
0.2
0.4
0.6
0.8
1
−V , Drain−Source Voltage (V)
DS
−I , Drain Current (A)
D
Figure 12. On−Region Characteristics
Figure 13. On−Resistance Variation with
Drain Current and Gate Voltage
5
1.8
1.6
1.4
1.2
1
I
V
= −0.34 A
I
D
= −0.17 A
D
= 10 V
GS
4
3
2
1
0
T = 125°C
A
0.8
0.6
0.4
T = 25°C
A
−50 −25
0
25
50
75 100 125 150
2
4
6
8
10
T , Junction Temperature (°C)
J
−V , Gate to Source Voltage (V)
GS
Figure 14. On−Resistance Variation with
Figure 15. On−Resistance Variation with
Gate−to−Source Voltage
Temperature
1
10
T = −55°C
A
V
DS
= −5 V
V
GS
= 0 V
25°C
0.8
0.6
0.4
0.2
0
1
0.1
125°C
T = 125°C
A
25°C
−55°C
0.01
0.001
1
2
3
4
5
0.2
0.4
0.6
0.8
1
1.2
−V , Gate to Source Voltage (V)
GS
−V , Body Diode Forward Voltage (V)
SD
Figure 16. Transfer Characteristics
Figure 17. Body Diode Forward Voltage
Variation with Current and Temperature
www.onsemi.com
6
NDC7001C
TYPICAL CHARACTERISTICS: P−CHANNEL (continued)
10
8
100
I
D
= −0.34 A
V
DS
= −25 V
f = 1 MHz
= 0 V
V
GS
−30 V
80
60
40
20
0
C
ISS
−48 V
6
4
C
RSS
2
C
OSS
0
0
0.4
0.8
1.2
1.6
2
0
10
20
30
40
50
60
Q , Gate Charge (nC)
g
−V , Drain to Source Voltage (V)
DS
Figure 18. Gate Charge Characteristics
Figure 19. Capacitance Characteristics
10
1
10
SINGLE PULSE
= 180°C/W
T = 25°C
A
R
q
JA
8
6
4
2
R
V
LIMIT
DS(ON)
10 ms
1 ms
10 ms
100 ms
1 s
DC
0.1
0.01
= −10 V
GS
SINGLE PULSE
= 180°C/W
R
q
JA
T = 25°C
A
0
1
10
−V , Drain−Source Voltage (V)
100
0.001
0.01
0.1
1
10
100
t , Time (s)
1
DS
Figure 20. Maximum Safe Operating Area
Figure 21. Single Pulse Maximum Power
Dissipation
1
D = 0.5
R
R
(t) = r(t) * R
q
JA
= 180°C/W
q
q
JA
JA
0.2
0.1
0.1
0.05
0.02
P(pk)
t1
0.01
0.01
t2
SINGLE PULSE
T − T = P * R (t)
q
JA
J
A
Duty Cycle, D = t / t
1
2
0.001
0.00001
0.0001
0.001
0.1
t , Time (s)
1
10
100
1000
0.01
1
Figure 22. Transient Thermal Response Curve
(Note: Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.)
www.onsemi.com
7
NDC7001C
ORDERING INFORMATION
†
Device
Device Marking
.01
Package Type
Reel Size
Tape Width
Shipping
NDC7001C
TSOT−23−6
(Pb−free)
7”
8 mm
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
www.onsemi.com
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOT23 6−Lead
CASE 419BL
ISSUE A
1
DATE 31 AUG 2020
SCALE 2:1
GENERIC
MARKING DIAGRAM*
XXX MG
G
1
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON83292G
TSOT23 6−Lead
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
ADDITIONAL INFORMATION
TECHNICAL PUBLICATIONS:
Technical Library: www.onsemi.com/design/resources/technical−documentation
onsemi Website: www.onsemi.com
ONLINE SUPPORT: www.onsemi.com/support
For additional information, please contact your local Sales Representative at
www.onsemi.com/support/sales
相关型号:
NDC7001CL99Z
Small Signal Field-Effect Transistor, 0.51A I(D), 50V, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-6
FAIRCHILD
NDC7001CS62Z
Small Signal Field-Effect Transistor, 0.51A I(D), 50V, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-6
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明