RC5057M [FAIRCHILD]
High Performance Programmable Synchronous DC-DC Controller for Low Voltage Microprocessors; 高性能可编程同步DC -DC控制器，用于低电压微处理器
| 型号： | RC5057M |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | High Performance Programmable Synchronous DC-DC Controller for Low Voltage Microprocessors |
| 文件： | 总20页 (文件大小：177K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
RC5057
High Performance Programmable Synchronous
DC-DC Controller for Low Voltage Microprocessors
Features
Description
• Programmable output from 1.3V to 3.5V using an
integrated 5-bit DAC
• Remote sense
The RC5057 is a synchronous mode DC-DC controller IC
which provides a highly accurate, programmable output voltage
for all Pentium II & III CPU applications and other high-perfor-
mance processors. The RC5057 features remote voltage
sensing, adjustable current limit, and active droop for optimal
converter transient response. The RC5057 uses a 5-bit D/A
converter to program the output voltage from 1.3V to 3.5V.
The RC5057 uses a high level of integration to deliver load cur-
rents in excess of 16A from a 5V source with minimal exter-
nal circuitry. Synchronous-mode operation offers optimum
efficiency over the entire specified output voltage range. An
on-board precision low TC reference achieves tight tolerance
voltage regulation without expensive external components,
while active droop permits exact tailoring of voltage for the
most demanding load transients. The RC5057 also offers
integrated functions including Power Good, Output Enable/
Soft Start and current limiting, and is available in a 16 pin
SOIC package.
• Active Droop
• 85% efficiency typical at full load
• Integrated Power Good and Enable/Soft Start functions
• Drives N-channel MOSFETs
• Overcurrent protection using MOSFET sensing
• 16 pin SOIC package
• Meets Intel Pentium II & III specifications using
minimum number of external components
Applications
• Power supply for Pentium® II & III
• VRM for Pentium II & III processor
• Telecom line cards
• Routers, switches & hubs
• Programmable step-down power supply
Block Diagram
+5V
+12V
VCCA
5
+5V
RS
3
-
+
10
OSC
4
-
+
VCCP
HIDRV
8
9
Digital
VO
Control
-
+
-
+
LODRV
7
6
GNDP
1.24V
5-Bit
Power
Good
2
PWRGD
Reference
DAC
1615141312
11
1
VID2 VID4
VID3
VID0
GNDA
ENABLE/SS
VID1
Pentium is a registered trademark of Intel Corporation
Rev. 1.2.0
RC5057
PRODUCT SPECIFICATION
Pin Assignments
ENABLE/SS
PWRGD
IFB
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VID0
VID1
VID2
VID3
VID4
GNDA
SW
VFB
RC5057
VCCA
GNDP
LODRV
VCCP
HIDRV
Pin Definitions
Pin Number
Pin Name
Pin Function Description
1
ENABLE/SS
Output Enable/Softstart. A logic LOW on this pin will disable the output. An
internal current source allows for open collector control. This pin also doubles as
soft start.
2
3
PWRGD
IFB
Power Good Flag. An open collector output that will be logic LOW if the output
voltage is not within 12ꢀ of the nominal output voltage setpoint.
Current Feedback. Pin 3 is used in conjunction with pin 10, as the input for the
current feedback control loop. Layout of these traces is critical to system
performance. See Application Information for details.
4
5
6
7
VFB
VCCA
GNDP
LODRV
Voltage Feedback. Pin 4 is used as the input for the voltage feedback control
loop. See Application Information for details regarding correct layout.
Analog VCC. Connect to system 5V supply and decouple with a 0.1µF ceramic
capacitor.
Power Ground. Return pin for high currents flowing in pin 8 (VCCP). Connect to
a low impedance ground.
Low Side FET Driver. Connect this pin to the gate of an N-channel MOSFET for
synchronous operation. The trace from this pin to the MOSFET gate should be
<0.5".
8
9
VCCP
HIDRV
SW
Power VCC. For both high side and low side FET drivers. Connect to system 12V
supply, and decouple with a 4.7µF tantalum and a 0.1µF ceramic capacitor.
High Side FET Driver. Connect this pin to the gate of an N-channel MOSFET.
The trace from this pin to the MOSFET gate should be <0.5".
10
High side driver source and low side driver drain switching node. Together
with IFB pin allows FET sensing for current.
11
GNDA
VID0-4
Analog Ground. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
12–16
Voltage Identification Code Inputs. These open collector/TTL compatible inputs
will program the output voltage over the ranges specified in Table 2. Pull-up
resistors are internal to the controller.
2
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
Absolute Maximum Ratings
Supply Voltage VCCA to GND
Supply Voltage VCCP to GND
Voltage Identification Code Inputs, VID0-VID4
Junction Temperature, TJ
13.5V
15V
VCCA
150°C
Storage Temperature
-65 to 150°C
300°C
Lead Soldering Temperature, 10 seconds
Power Dissipation, PD
750mW
105°C/W
Thermal Resistance Junction-to-case, ΘJC
Recommended Operating Conditions
Parameter
Conditions
Min.
4.5
Typ.
Max.
Units
Supply Voltage VCCA
Input Logic HIGH
5
5.25
V
V
2.0
Input Logic LOW
0.8
70
V
Ambient Operating Temperature
Output Driver Supply, VCCP
0
°C
V
11.4
12
13.2
REV. 1.2.0 2/10/00
3
RC5057
PRODUCT SPECIFICATION
Electrical Specifications (V
= 5V, V
= 12V, V
= 2.0V, and T = +25°C using circuit in Figure 1,
CCA
CCP
OUT
A
unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter Conditions
Output Voltage
Min.
Typ.
Max. Units
See Table 1
•
1.3
3.5
V
A
Output Current
18
Initial Voltage Setpoint
ILOAD = 0.8A, VOUT = 2.400V
OUT = 2.000V
2.394 2.424 2.454
2.000 2.020 2.040
1.550 1.565 1.580
V
V
V
V
VOUT = 1.550V
Output Temperature Drift
TA = 0 to 70°C, VOUT = 2.000V
•
•
+8
+6
mV
mV
VOUT = 1.550V
Line Regulation
Internal Droop3
Output Ripple
VCCA = 4.75V to 5.25V, VOUT = 2.000V
VOUT at ILOAD = 0.8A to Imax
20MHz BW, ILOAD = Imax
VOUT = 2.000V
•
2
mV
mV
-44
-40
11
-36
mVpk
V
Total Output Variation,
Steady State1
•
•
1.940
1.480
2.070
1.590
V
OUT = 1.550V3
Total Output Variation,
Transient2
ILOAD = 0.8A to Imax,VOUT = 2.000V
OUT = 1.550V3
•
•
1.900
1.480
2.100
1.590
V
V
Short Circuit Detect Current
Efficiency
•
45
60
µA
%
ILOAD = Imax, VOUT = 2.0V
85
50
Output Driver Rise & Fall Time See Figure 4 for tR and tF
nsec
nsec
kHz
%
Output Driver Deadtime
Oscillator Frequency
Duty Cycle
See Figure 7 for tDT
50
•
255
0
300
345
100
PWRGD Threshold
Logic HIGH
Logic LOW
•
•
93
88
107
112
%Vout
VCCA UVLO
•
•
3.74
7.65
4
4.26
9.35
V
VCCP UVLO
8.5
19
40
10
V
VCCA Supply Current
VCCP Supply Current4
Soft Start Current
mA
mA
µA
•
5
17
Notes:
1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is
measured at the converter’s VFB sense point.
2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5mΩ trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal
performance.
3. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with Intel’s
VRM 8.4 specification of +50, -80mV. If Intel specifications on maximum plane resistance from the converter’s output capac-
itors to the CPU are met, the specification of +40, -70mV at the capacitors will also be met.
4. Includes gate current.
4
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PRODUCT SPECIFICATION
RC5057
Table 1. Output Voltage Programming Codes
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Nominal VOUT
1.30V
1.35V
1.40V
1.45V
1.50V
1.55V
1.60V
1.65V
1.70V
1.75V
1.80V
1.85V
1.90V
1.95V
2.00V
2.05V
2.0V
2.1V
2.2V
2.3V
2.4V
2.5V
2.6V
2.7V
2.8V
2.9V
3.0V
3.1V
3.2V
3.3V
3.4V
3.5V
Note:
1. 0 = processor pin is tied to GND.
1 = processor pin is open.
REV. 1.2.0 2/10/00
5
RC5057
PRODUCT SPECIFICATION
Typical Operating Characteristics (VCCA = 5V, VCCP = 12V, and TA = +25°C using circuit in Figure
1, unless otherwise noted.)
Efficiency vs. Output Current
Droop, V
OUT = 2.0V
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
1.95
1.94
88
86
84
82
80
78
76
74
72
70
68
66
64
VOUT = 2.000V
VOUT = 1.550V
0
3
6
9
12
15
18
Output Current (A)
0
3
6
9
12
15
18
Output Current (A)
Output Voltage vs. Output Current
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
5
10
15
20
25
Output Current (A)
Output Programming, VID4 = 1
Output Programming, VID4 = 0
2.1
3.5
1.9
1.7
1.5
1.3
1.1
3.0
2.5
2.0
1.5
1.0
1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
DAC Setpoint
DAC Setpoint
6
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
Typical Operating Characteristics (continued)
Output Ripple, 2.0V @ 18A
Transient Response, 12.5A to 0.5A
1.590V
1.550V
1.480V
Time (100µs/div)
Time (1µs/division)
Transient Response, 0.5A to 12.5A
1.590V
1.550V
1.480V
Time (100µs/div)
Switching Waveforms, 18A Load
Output Startup, System Power-up
HIDRV
pin
LODRV
pin
Time (1µs/division)
Time (10ms/division)
REV. 1.2.0 2/10/00
7
RC5057
PRODUCT SPECIFICATION
Typical Operating Characteristics (continued)
VOUT Temperature Variation
Output Startup from Enable
2.042
2.040
2.038
2.036
2.034
2.030
2.028
2.026
0
25
70
100
Time (10ms/division)
Temperature (°C)
Application Circuit
+12V
L1 (Optional)
2.5µH
+5V
R1
33Ω
CIN
*
C2
1µF
C5
1µF
R6
R2
10Ω
4.7Ω
L2
1.3µH
Q1
Q2
C1
4.7µF
VO
R3
D1
MBRD835L
4.7Ω
COUT
*
9
8
7
6
5
4
3
2
1
10
11
12
13
14
15
16
C3
0.1µF
U1
RC5057
VID4
VID3
VID2
VID1
R5*
VID0
VCC
ENABLE/SS
*Refer to Appendix for values
of COUT, R5, and CIN
R4
10KΩ
.
C4
0.1µF
PWRGD
C6
0.1µF
Figure 1. Typical Application Circuit
(Worst Case Analyzed! See Appendix for Details)
8
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
Table 2. RC5057 Application Bill of Materials
(Components based on Worst Case Analysis—See Appendix for Details)
Reference Manufacturer Part # Quantity
Description
Requirements/Comments
C1
AVX
TAJB475M010R5
1
4.7µF, 10V Capacitor
C2, C5
C3-4,6
CIN
Panasonic
ECU-V1C105ZFX
2
1µF, 16V Capacitor
Panasonic
ECU-V1H104ZFX
3
100nF, 50V Capacitor
Sanyo
10MV1200GX
*
1200µF, 10V Electrolytic IRMS = 2A
1500µF, 6.3V Electrolytic ESR ≤44mΩ
8A Schottky Diode
COUT
D1
Sanyo
6MV1500GX
*
1
Motorola
MBRD835L
L1
Any
Any
Optional
2.5µH, 10A Inductor
DCR ~ 6mΩ
See Note 1.
L2
1
1
1.3µH, 20A Inductor
DCR ~ 2mΩ
Q1
Fairchild
FDP6030L or
FDB6030L
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 20mΩ @ VGS = 4.5V
See Note 2.
Q2
Fairchild
FDP7030BL or
FDB7030BL
1
N-Channel MOSFET
(TO-220 or TO-263)
R
DS(ON) = 10mΩ @ VGS = 4.5V
See Note 2.
R1
Any
Any
Any
Any
Any
1
2
1
1
1
1
33Ω
R2-3
R4
4.7Ω
10KΩ
R5
*
R6
10Ω
U1
Fairchild
DC/DC Controller
RC5057M
*See Appendix.
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ < 20°C/W should be used. For designs using
SA
the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer
to Applications Bulletin AB-8.
REV. 1.2.0 2/10/00
9
RC5057
PRODUCT SPECIFICATION
+12V
+5V
L1 (Optional)
R1
33Ω
2.5µH
CIN
*
D2
1N4148
C2
1µF
C5
1µF
R6
10Ω
R2
4.7Ω
Q1
C1
4.7µF
L2
1.3µH
R10
10mΩ
R7
2.2mΩ
VO
R3
D1
MBRD835L
4.7Ω
COUT
*
Q2
9
8
10
11
12
13
14
15
16
7
6
5
4
3
2
1
C3
0.1µF
U1
RC5057
R8
2.1Ω
VID4
VID3
VID2
VID1
R5
2.80KΩ
R9
1KΩ
VID0
VCC
ENABLE/SS
*Refer to Table 4 for values
of COUT, and CIN
R4
10KΩ
.
C4
0.1µF
PWRGD
C6
0.1µF
Figure 2. Application Circuit for Coppermine/Camino Processors
(Worst Case Analyzed! See Appendix for Details)
10
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
Table 3. RC5057 Application Bill of Materials for Coppermine/Camino Processors
(Components based on Worst Case Analysis—See Appendix for Details)
Reference
Manufacturer Part #
AVX
Quantity
Description
Requirements/Comments
C1
1
4.7µF, 10V Capacitor
TAJB475M010R5
C2, C5
C3-4,6
CIN
Panasonic
ECU-V1C105ZFX
2
3
1µF, 16V Capacitor
Panasonic
ECU-V1H104ZFX
100nF, 50V Capacitor
Sanyo
10MV1200GX
3
1200µF, 10V
Electrolytic
IRMS = 2A
COUT
D1
Sanyo
6MV1500GX
10
1
1500µF, 6.3V
Electrolytic
ESR ≤ 44mΩ
Motorola
MBRD835L
8A Schottky Diode
D2
Fairchild
1N4148
1
Signal Diode
L1
L2
Q1
Any
Any
Optional
2.5µH, 10A Inductor
1.3µH, 20A Inductor
DCR ~ 6mΩ See Note 1.
DCR ~ 2mΩ
1
1
Fairchild
FDP6030L or FDB6030L
N-Channel MOSFET RDS(ON) = 20mΩ @ VGS = 4.5V
(TO-220 or TO-263)
See Note 2.
Q2
Fairchild
FDP7030BL or
FDB7030BL
1
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 10mΩ @ VGS = 4.5V
See Note 2.
R1
Any
Any
Any
Any
Any
N/A
Any
Any
1
2
1
1
1
1
1
1
1
33Ω
R2-3
R4
4.7Ω
10KΩ
R5
2.80KΩ
R6
10Ω
R7
1.8mΩ
PCB Trace Resistor
R8
2.1Ω
R9
1KΩ
R10
Dale
10mΩ, 1W Resistor
WSL-2512-.01Ω
U1
Fairchild
RC5057M
1
DC/DC Controller
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ < 20°C/W should be used. For designs using
SA
the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer
to Applications Bulletin AB-8.
REV. 1.2.0 2/10/00
11
RC5057
PRODUCT SPECIFICATION
+12V
+5V
L1 (Optional)
R1
33Ω
2.5µH
CIN*
C2
1µF
C5
1µF
R6
R2
10Ω
4.7Ω
L2
1.3µH
R7
Q1
Q2
3mΩ
C1
4.7µF
VO
R3
D1
MBRD835L
4.7Ω
COUT
*
9
8
7
6
5
4
3
2
1
10
11
12
13
14
15
16
C3
0.1µF
U1
RC5057
VID4
VID3
VID2
VID1
R5
6.24KΩ
VID0
VCC
ENABLE/SS
*Refer to Table 4 for values
of COUT, and CIN
R4
10KΩ
.
C4
0.1µF
PWRGD
C6
0.1µF
Figure 3. Application Circuit for Coppermine/Camino Processors
(Typical Design)
12
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
Table 4. RC5057 Application Bill of Materials for Coppermine/Camino Processors
(Typical Design)
Reference Manufacturer Part # Quantity
Description
Requirements/Comments
C1
AVX
TAJB475M010R5
1
4.7µF, 10V Capacitor
C2, C5
C3-4,6
CIN
Panasonic
ECU-V1C105ZFX
2
1µF, 16V Capacitor
Panasonic
ECU-V1H104ZFX
3
100nF, 50V Capacitor
Sanyo
10MV1200GX
3
1200µF, 10V Electrolytic IRMS = 2A
COUT
D1
Sanyo
6MV1500GX
8
1
1500µF, 6.3V
Electrolytic
ESR ≤ 44mΩ
Motorola
MBRD835L
3A Schottky Diode
2.5µH, 10A Inductor
1.3µH, 20A Inductor
L1
Any
Any
Optional
DCR ~ 6mΩ
See Note 1.
L2
1
2
DCR ~ 2mΩ
Q1-2
Fairchild
FDP6030L or
FDB6030L
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 20mΩ @ VGS = 4.5V
See Note 2.
R1
R2-3
R4
R5
R6
R7
U1
Any
Any
Any
Any
Any
N/A
1
2
1
1
1
1
1
33Ω
4.7Ω
10KΩ
6.24KΩ
10Ω
3.0mΩ
DC/DC Controller
PCB Trace Resistor
Fairchild
RC5057M
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ < 20°C/W should be used. For designs using
SA
the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer
to Applications Bulletin AB-8.
Test Parameters
tR
tF
90%
2V
90%
HIDRV
2V
10%
tDT
2V
10%
tDT
2V
LODRV
Figure 4. Output Drive Timing Diagram
REV. 1.2.0 2/10/00
13
RC5057
PRODUCT SPECIFICATION
Internal Voltage Reference
Application Information
The reference included in the RC5057 is a precision band-gap
voltage reference. Its internal resistors are precisely trimmed
to provide a near zero temperature coefficient (TC). Based on
the reference is the output from an integrated 5-bit DAC. The
DAC monitors the 5 voltage identification pins, VID0-4. When
the VID4 pin is at logic HIGH, the DAC scales the reference
voltage from 2.0V to 3.5V in 100mV increments. When VID4
is pulled LOW, the DAC scales the reference from 1.30V to
2.05V in 50mV increments. All VID codes are available,
including those below 1.80V.
The RC5057 Controller
The RC5057 is a programmable synchronous DC-DC con-
troller IC. When designed around the appropriate external
components, the RC5057 can be configured to deliver more
than 16A of output current, as appropriate for the Katmai
and Coppermine and other processors. The RC5057 func-
tions as a fixed frequency PWM step down regulator.
Main Control Loop
Refer to the RC5057 Block Diagram on page 1. The RC5057
implements “summing mode control”, which is different
from both classical voltage-mode and current-mode control.
It provides superior performance to either by allowing a
large converter bandwidth over a wide range of output loads.
Power Good (PWRGD)
The RC5057 Power Good function is designed in accordance
with the Pentium II & III DC-DC converter specifications
and provides a continuous voltage monitor on the VFB pin.
The circuit compares the VFB signal to the VREF voltage
and outputs an active-low interrupt signal to the CPU should
the power supply voltage deviate more than 12ꢀ of its
nominal setpoint. The output is guaranteed open-collector
high when the power supply voltage is within 7ꢀ of its nomi-
nal setpoint. The Power Good flag provides no other control
function to the RC5057.
The control loop of the regulator contains two main sections:
the analog control block and the digital control block. The
analog section consists of signal conditioning amplifiers
feeding into a comparator which provides the input to the
digital control block. The signal conditioning section accepts
input from the IFB (current feedback) and VFB (voltage
feedback) pins and sets up two controlling signal paths. The
first, the voltage control path, amplifies the difference between
the VFB signal and the reference voltage from the DAC and
presents the output to one of the summing amplifier inputs.
The second, current control path, takes the difference between
the IFB and SW pins when the high-side MOSFET is on,
reproducing the voltage across the MOSFET and thus the
input current; it presents the resulting signal to another input
of the summing amplifier. These two signals are then summed
together. This output is then presented to a comparator look-
ing at the oscillator ramp, which provides the main PWM
control signal to the digital control block.
Output Enable/Soft Start (ENABLE/SS)
The RC5057 will accept an open collector/TTL signal for con-
trolling the output voltage. The low state disables the output
voltage. When disabled, the PWRGD output is in the low state.
Even if an enable is not required in the circuit, this pin should
have attached a capacitor (typically 100nF) to softstart the
switching. A larger value may occasionally be required if the
converter has a very large capacitor at its output.
Over-Voltage Protection
The RC5057 constantly monitors the output voltage for protec-
tion against over-voltage conditions. If the voltage at the VFB
pin exceeds the selected program voltage, an over-voltage
condition is assumed and the RC5057 disables the output
drive signal to the external high-side MOSFET. The DC-DC
converter returns to normal operation after the fault has been
removed. If it is desired to have an active over-voltage pro-
tection circuit, the RC5052, which includes all the features
of the RC5057, may be chosen instead of the RC5057.
The digital control block takes the analog comparator input
and the main clock signal from the oscillator to provide the
appropriate pulses to the HIDRV and LODRV output pins.
These two outputs control the external power MOSFETs.
There is an additional comparator in the analog control section
whose function is to set the point at which the RC5057 current
limit comparator disables the output drive signals to the external
power MOSFETs.
Oscillator
High Current Output Drivers
The RC5057 oscillator section uses a fixed frequency of
operation of 300KHz. If it is desired to adjust this frequency
for reasons of efficiency or component size, the RC5052,
which includes all of the features of the RC5057, may be
chosen instead of the RC5057.
The RC5057 contains two identical high current output drivers
that utilize high speed bipolar transistors in a push-pull config-
uration. The drivers’ power and ground are separated from
the chip’s power and ground for switching noise immunity.
The power supply pin, VCCP, is supplied from an external
12V source through a series resistor. The resulting voltage is
sufficient to provide the gate to source drive to the external
Design Considerations and Component
Selection
MOSFETs required in order to achieve a low RDS,ON
.
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
14
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
D
m = Maximum duty cycle for the DC/DC converter
MOSFET Selection
(usually 95ꢀ).
This application requires N-channel Logic Level Enhance-
ment Mode Field Effect Transistors. Desired characteristics
are as follows:
Some margin should be maintained away from both Lmin
and Lmax. Adding margin by increasing L almost always
adds expense since all the variables are predetermined by
system performance except for Co, which must be increased
to increase L. Adding margin by decreasing L can be done
by purchasing capacitors with lower ESR. The RC5057 pro-
vides significant cost savings for the newer CPU systems
that typically run at high supply current.
• Low Static Drain-Source On-Resistance,
RDS,ON < 20mΩ (lower is better)
• Low gate drive voltage, VGS = 4.5V rated
• Power package with low Thermal Resistance
• Drain-Source voltage rating > 15V.
RC5057 Short Circuit Current Characteristics
The on-resistance (RDS,ON) is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore significantly
affects the efficiency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applica-
tions Bulletin AB-8.
The RC5057 protects against output short circuit by turning
off both the high-side and low-side MOSFETs and resetting
softstart. The short circuit limit is set with the R5 resistor, as
given by the formula
ISC x RDS, on
R5
=
IDetect
Inductor Selection
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize rip-
ple or maximize transient performance. The first order equa-
tion (close approximation) for minimum inductance is:
with IDetect ≈ 50µA, ISC the desired current limit, and RDS,on
the high-side MOSFET’s on resistance. Remember to make
R5 large enough to include the effects of initial tolerance and
temperature variation on the MOSFET’s RDS,on. However,
the value of R5 should be less than 8.3KΩ. If a greater value
is necessary, a lower RDS,on MOSFET should be used
instead. Alternately, use of a sense resistor in series with the
source of the MOSFET, as shown in Figure 6, eliminates this
source of inaccuracy in the current limit. Note the addition of
the diode, which is necessary for proper operation of this cir-
cuit.
(V – Vout
)
Vout
Vin
ESR
in
Lmin
=
x
x
Vripple
f
where:
Vin = Input Power Supply
Vout = Output Voltage
As an example, Figure 5 shows the typical characteristic of
the DC-DC converter circuit with an FDB6030L high-side
MOSFET (RDS = 20mΩ maximum at 25°C * 1.25 at 75°C =
25mΩ) and a 8.2KΩ R5.
f = DC/DC converter switching frequency
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
ESR = Equivalent series resistance of all output capacitors in
parallel
Vripple = Maximum peak to peak output ripple voltage budget.
The first order equation for maximum allowed inductance is:
(V – Vout) Dm Vtb
in
2C0
=
Lmax
2
Ipp
0
5
10
15
20
25
Output Current (A)
where:
Figure 5. RC5057 Short Circuit Characteristic
Co = The total output capacitance
The converter exhibits a normal load regulation characteristic
until the voltage across the MOSFET exceeds the internal
short circuit threshold of 50µA * 8.2KΩ = 410mV, which
occurs at 410mV/25mΩ = 16.4A. (Note that this current limit
level can be as high as 410mV/15mΩ = 27A, if the MOSFET
Ipp = Maximum to minimum load transient current
Vtb = The output voltage tolerance budget allocated to load
transient
REV. 1.2.0 2/10/00
15
RC5057
PRODUCT SPECIFICATION
has typical RDS,on rather than maximum, and is at 25°C. This
is the reason for using the external sense resistor.) At this point,
the internal comparator trips and signals the controller to
discharge the softstart capacitor. This causes a drastic reduc-
tion in the output voltage as the load regulation collapses
into the short circuit control mode. With a 40mΩ output
short, the voltage is reduced to 16.4A * 40mΩ = 650mV. The
output voltage does not return to its nominal value until the
output current is reduced to a value within the safe operating
range for the DC-DC converter.
The output capacitance should also include a number of small
value ceramic capacitors placed as close as possible to the
processor; 0.1µF and 0.01µF are recommended values.
Input Filter
The DC-DC converter design may include an input inductor
between the system +5V supply and the converter input as
shown in Figure 7. This inductor serves to isolate the +5V
supply from the noise in the switching portion of the DC-DC
converter, and to limit the inrush current into the input capac-
itors during power up. A value of 2.5µH is recommended.
1N4148
It is necessary to have some low ESR aluminum electrolytic
capacitors at the input to the converter. These capacitors
deliver current when the high side MOSFET switches on.
Figure 7 shows 3 x 1000µF, but the exact number required
will vary with the speed and type of the processor. For the
top speed Katmai and Coppermine, the capacitors should be
rated to take 9A and 6A RMS of ripple current respectively.
Capacitor ripple current rating is a function of temperature,
and so the manufacturer should be contacted to find out the
ripple current rating at the expected operational temperature.
For details on the design of an input filter, refer to Applica-
tions Bulletin AB-15.
R5
IFB
RSENSE
SW
VOUT
Figure 6. Precision Current Sensing
2.5µH
Schottky Diode Selection
Vin
5V
The application circuit of Figure 1 shows a Schottky diode,
D1, which is used as a free-wheeling diode to assure that the
body-diode in Q2 does not conduct when the upper MOS-
FET is turning off and the lower MOSFET is turning on. It is
undesirable for this diode to conduct because its high for-
ward voltage drop and long reverse recovery time degrades
efficiency, and so the Schottky provides a shunt path for the
current. Since this time duration is very short, the selection
criterion for the diode is that the forward voltage of the
Schottky at the output current should be less than the for-
ward voltage of the MOSFET’s body diode.
1000µF, 10V
0.1µF
Electrolytic
Figure 7. Input Filter
Active Droop
The RC5057 includes active droop: as the output current
increases, the output voltage drops. This is done in order to
allow maximum headroom for transient response of the con-
verter. The current is sensed by measuring the voltage across
the high-side MOSFET during its on time. Note that this makes
the droop dependent on the temperature of the MOSFET.
However, when the formula given for selecting RS (current
limit) is used, there is a maximum droop possible (-40mV),
and when this value is reached, additional drop across the
MOSFET will not cause any increase in droop—until current
limit is reached.
Output Filter Capacitors
The output bulk capacitors of a converter help determine its
output ripple voltage and its transient response. It has already
been seen in the section on selecting an inductor that the ESR
helps set the minimum inductance, and the capacitance value
helps set the maximum inductance. For most converters,
however, the number of capacitors required is determined by
the transient response and the output ripple voltage, and these
are determined by the ESR and not the capacitance value. That
is, in order to achieve the necessary ESR to meet the transient
and ripple requirements, the capacitance value required is
already very large.
Additional droop can be added to the active droop using a
discrete resistor (typically a PCB trace) outside the control
loop, as shown in Figure 2. This is typically only required for
the most demanding applications, such as for the next gener-
ation Intel processor (tolerance = +40/-70mV), as shown in
Figure 2.
The most commonly used choice for output bulk capacitors
is aluminum electrolytics, because of their low cost and low
ESR. The only type of aluminum capacitor used should be
those that have an ESR rated at 100kHz. Consult Application
Bulletin AB-14 for detailed information on output capacitor
selection.
16
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
PCB Layout Guidelines
Appendix
• Placement of the MOSFETs relative to the RC5057 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the RC5057 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise radiates
throughout the board, and, because it is switching at such
a high voltage and frequency, it is very difficult to suppress.
Worst-Case Formulae for the Calculation of
, R5, and C (Circuit of Figure 1 Only)
C
out
in
The following formulae design the RC5057 for worst-case
operation, including initial tolerance and temperature depen-
dence of all of the IC parameters (initial setpoint, reference
tolerance and tempco, active droop tolerance, current sensor
gain), the initial tolerance and temperature dependence of
the MOSFET, and the ESR of the capacitors. The following
information must be provided:
• In general, all of the noisy switching lines should be kept
away from the quiet analog section of the RC5057. That
is, traces that connect to pins 7, 9, 10, and 8 (LODRV,
HIDRV, SW and VCCP) should be kept far away from the
traces that connect to pins 3 through 5, and pin 11.
VT+, the value of the positive transient voltage limit;
|VT-|, the absolute value of the negative transient voltage limit;
IO, the maximum output current;
• Place the 0.1µF decoupling capacitors as close to the
RC5057 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
Vnom, the nominal output voltage;
• Each VCC and GND pin should have its own via to the
appropriate plane. This helps provide isolation between pins.
Vin, the input voltage (typically 5V);
• Place the MOSFETs, inductor, and Schottky as close
together as possible for the same reasons as in the first
bullet above. Place the input bulk capacitors as close to
the drains of the high side MOSFETs as possible. In
addition, placement of a 0.1µF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
ESR, the ESR of the output caps, per cap (44mΩ for the
Sanyo parts shown in this datasheet);
RD, the on-resistance of the MOSFET (10mΩ for the
FDB7030);
∆RD, the tolerance of the current sensor (usually about 67ꢀ
for MOSFET sensing, including temperature).
• Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converter’s performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
Irms, the rms current rating of the input caps (2A for the
Sanyo parts shown in this datasheet).
2
Vnom
Vin
Vnom
Vin
IO*
–
Cin
=
Irms
• A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
IO* RD * (1 + ∆RD) * 1.10
R5 =
50 * 10-6
Additional Information
For additional information contact Fairchild Semiconductor at
http://www.fairchildsemi.com/cf/tsg.htm or contact an autho-
rized representative in your area.
The value of R5 must be ≤ 8.3KΩ. If a greater values is
calculated, RD must be reduced.
Number of capacitors needed for Cout = the greater of:
ESR * IO
X =
VT-
or
ESR * IO
Y =
14400 * IO * RD
VT+ –0.004 * Vnom
+
18 * R5 * 1.1
REV. 1.2.0 2/10/00
17
RC5057
PRODUCT SPECIFICATION
Example: Suppose that the transient limits are 134mV,
current I is 14.2A, and the nominal voltage is 2.000V, using
MOSFET current sensing and the usual caps. We have VT+
|VT-| = 0.134, IO = 14.2, Vnom = 2.000, and ∆RD = 0.67.
We calculate:
14.2 * 0.010 * (1 + 0.67) * 1.10
5.2KΩ
=
R5 =
50 * 10-6
=
0.044 * 14.2
0.134
= 4.66
X =
2
2.000
5
2.000
5
0.044 * 14.2
–
14.2 *
= 4.28
Y
=
14400 * 14.2 * 0.020
18 * 10400 * 1.1
=
3.47 ⇒ 4 caps
Cin
=
0.134 – 0.004 * 2.000 +
2
Since X > Y, we choose X, and round up to find we need 5
capacitors for COUT
.
18
REV. 1.2.0 2/10/00
PRODUCT SPECIFICATION
RC5057
Mechanical Dimensions
16 Lead SOIC
Notes:
Inches
Millimeters
Symbol
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Min.
Max.
Min.
Max.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .010 inch (0.25mm).
A
.053
.004
.013
.008
.386
.150
.069
.010
.020
.010
.394
.158
1.35
0.10
0.33
0.19
9.80
3.81
1.75
0.25
0.51
0.25
10.00
4.00
A1
B
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
C
D
E
5
2
2
e
.050 BSC
1.27 BSC
H
h
.228
.010
.016
.244
.020
.050
5.80
0.25
0.40
6.20
0.50
1.27
L
3
6
N
α
16
16
0°
8°
0°
8°
ccc
—
.004
—
0.10
16
9
8
E
H
1
h x 45°
D
C
A1
A
α
SEATING
PLANE
– C –
L
e
B
LEAD COPLANARITY
ccc C
REV. 1.2.0 2/10/00
19
RC5057
PRODUCT SPECIFICATION
Ordering Information
Product Number
Package
RC5057M
16 pin SOIC
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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2/10/00 0.0m 011
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2000 Fairchild Semiconductor Corporation
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