SFU9024 [FAIRCHILD]

Advanced Power MOSFET; 先进的功率MOSFET


型号：	SFU9024
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Advanced Power MOSFET 先进的功率MOSFET
文件：	总7页 (文件大小：230K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SFR/U9024

Advanced Power MOSFET

FEATURES

BV_DSS= -60 V

R_DS(on)= 0.28 Ω

I_D= -7.8 A

n Avalanche Rugged Technology

n Rugged Gate Oxide Technology

n Lower Input Capacitance

n Improved Gate Charge

n Extended Safe Operating Area

n Lower Leakage Current : 10 µA (Max.) @ V_DS= -60V

n Lower R_DS(ON): 0.206 Ω (Typ.)

D-PAK

I-PAK

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol

Characteristic

Value

-60

Units

V_DSS

Drain-to-Source Voltage

Continuous Drain Current (T_C=25^oC)

Continuous Drain Current (T_C=100^oC)

Drain Current-Pulsed

-7.8

-5.5

I_D

I_DM

V_GS

E_AS

I_AR

Gate-to-Source Voltage

±30

155

-7.8

3.2

Single Pulsed Avalanche Energy

Avalanche Current

E_AR

dv/dt

Repetitive Avalanche Energy

V/ns

Peak Diode Recovery dv/dt

-5.5

2.5

Total Power Dissipation (T_A=25 C)

Total Power Dissipation (T_C=25^oC)

Linear Derating Factor

P_D

W/^oC

0.26

Operating Junction and

T_J, T_STG

- 55 to +150

300

Storage Temperature Range

^oC

Maximum Lead Temp. for Soldering

Purposes, 1/8” from case for 5-seconds

T_L

Thermal Resistance

Symbol

Characteristic

Typ.

Max.

Units

R_θJC

Junction-to-Case

Junction-to-Ambient

3.91

^oC/W

R_θJA

110

* When mounted on the minimum pad size recommended (PCB Mount).

Rev. C

P-CHANNEL

POWER MOSFET

SFR/U9024

Electrical Characteristics (T_C=25^oC unless otherwise specified)

Symbol

BV_DSS

Characteristic

Min. Typ. Max. Units

Test Condition

_GS=0V,I_D=-250µA

Drain-Source Breakdown Voltage

Breakdown Voltage Temp. Coeff.

Gate Threshold Voltage

V/^oC

-60

-- -0.04 --

-2.0 -- -4.0

-- -100

∆BV/∆T_J

V_GS(th)

I_D=-250µA

See Fig 7

_DS=-5V,I_D=-250µA

_GS=-20V

_GS=20V

Gate-Source Leakage , Forward

Gate-Source Leakage , Reverse

I_GSS

100

-10

V_DS=-60V

_DS=-48V,T_C=125^oC

I_DSS

Drain-to-Source Leakage Current

µA

-- -100

Static Drain-Source

On-State Resistance

Forward Transconductance

Input Capacitance

R_DS(on)

V_GS=-10V,I_D=-3.9A

V_DS=-30V,I_D=-3.9A

Ω

0.28

g_fs

C_iss

C_oss

C_rss

t_d(on)

t_r

3.7

465 600

V_GS=0V,V_DS=-25V,f =1MHz

Output Capacitance

Reverse Transfer Capacitance

Turn-On Delay Time

Rise Time

215

140

See Fig 5

V_DD=-30V,I_D=-9.7A,

Ω

R_G=18

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

See Fig 13

Q_g

Total Gate Charge

Gate-Source Charge

Gate-Drain(“Miller”) Charge

V_DS=-48V,V_GS=-10V,

Q_gs

Q_gd

2.9

6.0

I_D=-9.7A

See Fig 6 & Fig 12 OO

Source-Drain Diode Ratings and Characteristics

Symbol

I_S

Characteristic

Continuous Source Current

Pulsed-Source Current

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Min. Typ. Max. Units

Test Condition

Integral reverse pn-diode

in the MOSFET

T_J=25^oC,I_S=-7.8A,V_GS=0V

T_J=25^oC,I_F=-9.7A

-7.8

-31

-3.8

I_SM

V_SD

t_rr

µC

Q_rr

-- 0.22 --

di_F/dt=100A/µs

Notes ;

1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature

L=3.0mH, I_AS=-7.8A, V_DD=-25V, R_G=27Ω*, Starting T_J=25^oC

I <-9.7A, di/dt < 250A/µs, V < BV_DSS, Starting T_J=25^oC

Pulse Test : Pulse Width = 250µs, Duty Cycle< 2%

Essentially Independent of Operating Temperature

P-CHANNEL

POWER MOSFET

SFR/U9024

Fig 1. Output Characteristics

Fig 2. Transfer Characteristics

V_GS

Top :

- 15V

- 10 V

- 8.0 V

- 7.0 V

- 6.0 V

- 5.5V

- 5.0 V

Bottom : - 4.5V

150 ^oC

@ Notes :

1. V_GS= 0 V

25^oC

@ Notes :

2. V_DS= -30 V

1. 250 s Pulse Test

- 55 ^oC

3. 250 s Pulse Test

2. T = 25 ^oC

-1

-V_GS, Gate-Source Voltage [V]

-V_DS, Drain-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current

Fig 4. Source-Drain Diode Forward Voltage

0.40

0.35

0.30

0.25

0.20

0.15

0.10

V = -10 V

150 ^oC

@ Notes :

1. V_GS= 0 V

25 ^oC

2. 250 s Pulse Test

V = -20 V

@Note:T = 25 ^oC

-1

0.5

1.0

1.5

2.0

2.5

3.0

3.5

-I , Drain Current [A]

-V_SD, Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage

Fig 6. Gate Charge vs. Gate-Source Voltage

800

600

400

200

C =C +C (C =shorted)

iss gs gd

C =C +C

_DS=-12V

_DS=-30V

_DS=-48V

oss ds gd

C =C

rss gd

C _iss

C_oss

@Notes:

1. V = 0 V

2. f= 1MHz

C_rss

@Notes:I =-9.7A

0₀

Q , Total Gate Charge [nC]

-V , Drain-Source Voltage [V]

P-CHANNEL

POWER MOSFET

SFR/U9024

Fig 7. Breakdown Voltage vs. Temperature

Fig 8. On-Resistance vs. Temperature

1.2

1.1

1.0

0.9

0.8

2.5

2.0

1.5

1.0

0.5

0.0

@ Notes :

1. V_GS= -10 V

@ Notes :

1. V_GS= 0 V

2. I = -4.9 A

2. I = -250

-75 -50 -25

100 125 150 175

-75 -50 -25

75 100 125 150 175 200

T , Junction Temperature [C]

Fig 9. Max. Safe Operating Area

Fig 10. Max. Drain Current vs. Case Temperature

Operation in This Area

is Limited by R _DS(on)

0.1 ms

1 ms

10 ms

@ Notes :

1. T = 25 ^oC

2. T = 150 ^oC

3. Single Pulse

-1

100

125

150

T , Case Temperature [C]

-V_DS, Drain-Source Voltage [V]

Fig 11. Thermal Response

D=0.5

@ Notes :

10⁰

0.2

1. Z

(t)=3.91 ^oC/W Max.

_θJC

2. Duty Factor, D=t₁/t₂

3. T_JM-T_C=P_DM*Z_θ_JC(t)

0.1

P_.DM

0.05

0.02

10^-10.01

t_1.

t_2.

single pulse

10^-5

10^-4

t₁

10^-3

10^-2

10^-1

10⁰

10¹

Square Wave Pulse Duration [sec]

P-CHANNEL

POWER MOSFET

SFR/U9024

Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”

V_GS

Same Type

as DUT

50KΩ

Q_g

12V

200nF

-10V

300nF

V_DS

Q_gs

Q_gd

V_GS

DUT

R₂

-3mA

R₁

Charge

Current Sampling (I_G) Current Sampling (I_D)

Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

R_L

t _on

t _off

V_out

V_in

t_f

t_d(on)

t_r

t_d(off)

V_DD

( 0.5 rated V_DS

)

V_in

10%

R_G

DUT

-10V

90%

V_out

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BV_DSS

L_L

I_D

----

--------------------

BV_DSS-- V_DD

E_AS

L_LI_AS

V_DS

t _p

Time

Vary t_pto obtain

required peak I_D

V_DD

V_DS(t)

R_G

V_DD

I_D(t)

DUT

-10V

I_AS

BV_DSS

t _p

P-CHANNEL

POWER MOSFET

SFR/U9024

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

V_DS

DUT

I _S

Driver

V_GS

Compliment of DUT

(N-Channel)

R_G

V_DD

V_GS

• dv/dt controlled by “R_G”

• I_Scontrolled by Duty Factor “D”

Gate Pulse Width

--------------------------

V_GS

D =

Gate Pulse Period

10V

( Driver )

Body Diode Reverse Current

I_RM

I _S

( DUT )

di/dt

I_FM, Body Diode Forward Current

V_f

V_DS

( DUT )

Body Diode

V_DD

Forward Voltage Drop

Body Diode Recovery dv/dt

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As used herein:

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failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

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PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I1

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