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SI9435DY

更新时间：2025-07-07 02:10:29
品牌：FAIRCHILD
描述：P-Channel Logic Level PowerTrench MOSFET

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SI9435DY 概述

P-Channel Logic Level PowerTrench MOSFET P沟道逻辑电平的PowerTrench MOSFET MOS管 小信号场效应晶体管

SI9435DY 规格参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOT
包装说明：SO-8针数：8
Reach Compliance Code：unknownECCN代码：EAR99
风险等级：5.66Is Samacsys：N
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：30 V
最大漏极电流 (Abs) (ID)：5.3 A最大漏极电流 (ID)：5.3 A
最大漏源导通电阻：0.05 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
湿度敏感等级：1元件数量：1
端子数量：8工作模式：ENHANCEMENT MODE
最高工作温度：150 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260极性/信道类型：P-CHANNEL
最大功率耗散 (Abs)：1 W认证状态：Not Qualified
子类别：Other Transistors表面贴装：YES
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

SI9435DY 数据手册

通过下载SI9435DY数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。

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January 2001  
Si9435DY  
P-Channel Logic Level PowerTrench MOSFET  
General Description  
Features  
This P-Channel Logic Level MOSFET is produced  
• –5.3 A, –30 V. RDS(ON) = 50 mΩ @ VGS = –10 V  
using  
Fairchild  
Semiconductor's  
advanced  
PowerTrench process that has been especially tailored  
to minimize on-state resistance and yet maintain  
superior switching performance.  
R
DS(ON) = 80 mΩ @ VGS = –4.5 V  
• Low gate charge  
These devices are well suited for low voltage and  
battery powered applications where low in-line power  
loss and fast switching are required.  
• Fast switching speed  
• High performance trench technology for extremely  
Applications  
low RDS(ON)  
• DC/DC converter  
• Load switch  
• High power and current handling capability  
• Motor Drive  
D
D
D
5
6
7
8
4
3
2
1
D
G
S
S
SO-8  
S
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
VDSS  
Parameter  
Drain-Source Voltage  
Ratings  
–30  
Units  
V
V
A
VGSS  
Gate-Source Voltage  
±20  
ID  
Drain Current – Continuous  
– Pulsed  
(Note 1a)  
-5.3  
-20  
Power Dissipation for Single Operation  
(Note 1a)  
(Note 1b)  
(Note 1c)  
2.5  
PD  
W
1.2  
1.0  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
°C/W  
°C/W  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1)  
50  
25  
RθJA  
Thermal Resistance, Junction-to-Case  
RθJC  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
9435  
Si9435DY  
13’’  
12mm  
2500 units  
Si9435DY Rev A(W)  
2001 Fairchild Semiconductor International  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
–30  
V
VGS = 0 V, ID = –250 µA  
∆BVDSS  
∆TJ  
Breakdown Voltage Temperature  
Coefficient  
–22  
ID = –250 µA, Referenced to 25°C  
VDS = –24 V, VGS = 0 V  
mV/°C  
IDSS  
Zero Gate Voltage Drain Current  
Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
–1  
µA  
nA  
nA  
IGSSF  
IGSSR  
VGS = 20 V,  
VDS = 0 V  
100  
VGS = –20 V, VDS = 0 V  
–100  
On Characteristics  
(Note 2)  
VGS(th)  
Gate Threshold Voltage  
–1  
–1.7  
4
–3  
V
VDS = VGS, ID = –250 µA  
∆VGS(th)  
∆TJ  
Gate Threshold Voltage  
Temperature Coefficient  
ID = –250 µA, Referenced to 25°C  
mV/°C  
mΩ  
RDS(on)  
Static Drain–Source  
On–Resistance  
VGS = –10 V,  
VGS = –10 V, ID = –5.3 A, TJ=125°C  
GS = –4.5 V, ID = –4.2A,  
ID = –5.3 A  
38  
54  
55  
50  
79  
80  
V
ID(on)  
gFS  
On–State Drain Current  
VGS = –10 V,  
VDS = –15 V,  
VDS = –5 V  
ID = –5.3 A  
–20  
A
S
Forward Transconductance  
12  
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Input Capacitance  
690  
306  
77  
pF  
pF  
pF  
VDS = –15 V,  
f = 1.0 MHz  
V GS = 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics (Note 2)  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
7
14  
18  
34  
20  
23  
ns  
ns  
VDD = –15 V,  
VGS = –10 V,  
ID = –1 A,  
RGEN = 6 Ω  
10  
19  
11  
14  
2.4  
4.8  
ns  
ns  
Qg  
Qgs  
Qgd  
nC  
nC  
nC  
V
DS = –15 V,  
ID = –5.3 A,  
VGS = –10 V  
Drain–Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain–Source Diode Forward Current  
–5.3  
A
V
Drain–Source Diode Forward  
VSD  
V
GS = 0 V, IS = –5.3 A (Note 2)  
–0.86 –1.2  
Voltage  
Notes:  
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.  
a) 50°C/W when  
mounted on a 1in2  
pad of 2 oz copper  
b) 105°C/W when  
mounted on a .04 in2  
pad of 2 oz copper  
c) 125°C/W when mounted on a  
minimum pad.  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%  
Si9435DY Rev A(W)  
Typical Characteristics  
30  
2.5  
2
VGS = -10.0V  
VGS = -3.5V  
-7.5V  
25  
20  
15  
10  
5
-5.0V  
-6.5V  
-6.0V  
-4.0V  
-4.0V  
-4.5V  
1.5  
1
-5.5V  
-3.0V  
-7.0V  
-10.0V  
10  
0
0.5  
0
1
2
3
4
5
150  
5
0
5
15  
-VDS, DRAIN TO SOURCE VOLTAGE (V)  
-ID, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.2  
ID = -5.3A  
ID = -5.3A  
VGS = -10V  
0.15  
0.1  
0.05  
0
TA = 125oC  
TA = 25oC  
2
4
6
8
10  
-50  
-25  
0
25  
50  
75  
100  
125  
TJ, JUNCTION TEMPERATURE (oC)  
-VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
20  
16  
12  
8
100  
VGS = 0V  
25oC  
TA = -55oC  
VDS = -10V  
10  
1
125oC  
TA = 125oC  
25oC  
-55oC  
0.1  
4
0.01  
0.001  
0
1
2
3
4
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
-VGS, GATE TO SOURCE VOLTAGE (V)  
-VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
Si9435DY Rev A(W)  
Typical Characteristics  
10  
1000  
800  
600  
400  
200  
0
ID = -5.3A  
VDS = -5V  
f = 1 MHz  
GS = 0 V  
-10V  
CISS  
8
6
4
2
0
V
-15V  
COSS  
CRSS  
0
5
10  
15  
0
5
10  
15  
20  
25  
30  
Qg, GATE CHARGE (nC)  
-VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
50  
40  
30  
20  
10  
0
µ
100  
1ms  
10ms  
100ms  
1s  
s
RDS(ON) LIMIT  
SINGLE PULSE  
RθJA = 125°C/W  
T
A = 25°C  
1
10s  
DC  
VGS = -10V  
SINGLE PULSE  
RθJA = 125oC/W  
0.1  
0.01  
T
A = 25oC  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
-VDS, DRAIN-SOURCE VOLTAGE (V)  
t1, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
RθJA(t) = r(t) + Rθ  
RθJA = 125oC/W  
JA  
0.2  
0.1  
0.1  
0.05  
P(pk)  
0.02  
0.01  
t1  
SINGLE PULSE  
0.01  
t2  
TJ - TA = P * RθJA(t)  
Duty Cycle, D = t1 / t2  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t1, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1c.  
Transient thermal response will change depending on the circuit board design.  
Si9435DY Rev A(W)  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
PowerTrench  
QFET™  
QS™  
SyncFET™  
TinyLogic™  
UHC™  
ACEx™  
FASTr™  
GlobalOptoisolator™  
GTO™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
DOME™  
QT Optoelectronics™  
VCX™  
HiSeC™  
Quiet Series™  
SILENT SWITCHER  
SMART START™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
ISOPLANAR™  
MICROWIRE™  
OPTOLOGIC™  
OPTOPLANAR™  
PACMAN™  
POP™  
E2CMOSTM  
EnSignaTM  
FACT™  
FACT Quiet Series™  
FAST  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. G  

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