USB1T1105AMHX [FAIRCHILD]
Universal Serial Bus Peripheral Transceiver with Voltage Regulator; 通用串行总线外设收发器，稳压器
| 型号： | USB1T1105AMHX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Universal Serial Bus Peripheral Transceiver with Voltage Regulator |
| 文件： | 总12页 (文件大小：304K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 2005
Revised August 2005
USB1T1105A
Universal Serial Bus Peripheral Transceiver
with Voltage Regulator
General Description
Features
The USB1T1105A is an Universal Serial Bus Specification Rev
2.0 compliant transceiver. The device provides an USB inter-
face for Full-Speed (12Mbit/s) USB applications. The
USB1T1105A provides excellent flexibility, allowing differential
and single ended inputs while an integrated voltage regulator
sets the I/O level to 1.65V to 3.6V. Utilizing an integrated 5.0V to
3.3V voltage regulator, the part can be powered directly from
Complies with Universal Serial Bus Specification 2.0
Integrated 5V to 3.3V voltage regulator for powering VBus
Utilizes digital inputs and outputs to transmit and receive
USB cable data
Supports full speed 12Mbits/s speed data rates
Ideal for portable electronic devices
the USB host (V
) to minimize the power consumed from the
BUS
local sources while used in devices with low supply voltages.
15kV contact HBM ESD protection on bus pins
3.3mm leadless package
The USB1T1105A provides 15kV ESD protection on the USB
bus pins (D /D ). This eliminates the need for any external ESD
devices while providing excellent protection to larger and more
expensive ASICs and USB controllers.
Industry standard HBCC footprint is lead-free
Applications
Cell phone
PDA
Digital camera
MP3
Ordering Code:
Package
Order Number
Package Description
Number
USB1T1105AMHX
MLP16HB
Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Pb-Free package per JEDEC J-STD-020B.
Logic Diagram
© 2005 Fairchild Semiconductor Corporation
DS500911
www.fairchildsemi.com
Connection Diagram
(Bottom View)
Terminal Descriptions
Terminal Terminal
I/O
Terminal Description
Number
Name
1
OE
I
Output Enable: Active LOW enables the transceiver to transmit data on the bus. When
not active the transceiver is in the receive mode (CMOS level is relative to V
)
CCIO
2
3
4
5
6
7
RCV
O
O
O
I
Receive Data Output: Non-inverted CMOS level output for USB differential Input (CMOS
output level is relative to V ). Driven LOW when SUSPN is HIGH;
CCIO
RCV output is stable and preserved during SE0 condition.
Single-ended D receiver output V (CMOS level relative to V ):
CCIO
V
p
P
Used for external detection of SEO, error conditions, speed of connected device;
Driven HIGH when no supply connected to V and V
.
REG
CC
V
Single-ended D receiver output V (CMOS level relative to V
):
CCIO
m
m
Used for external detection of SEO, error conditions, speed of connected device;
Driven HIGH when no supply connected to V and V
.
CC
REG
SUSPND
MODE
Suspend:
Enables a low power state (CMOS level is relative to V
active (HIGH) it will drive the RCV pin to logic “0” state.
). While the SUSPND pin is
CCIO
I
MODE input (CMOS level is relative to V
). A HIGH selects the differential input
CCIO
MODE (V , V ) whereas a LOW enables the single-ended MODE (V , V ) see
po
mo
o
FSEO
Table 2 and Table 3
V
Supply Voltage for digital I/O pins (1.65V to 3.6V):
CCIO
When not connected the D and D pins are in 3-STATE. This supply bus is totally
independent of V (5V) and V (3.3V).
CC
REG
8
NC
NC
AI/O
I
10, 9
11
D , D
Data , Data : Differential data bus conforming to the USB standard.
V
/ V
Driver Data Input (CMOS level is relative to V
see Table 2 and Table 3
); Schmitt trigger input;
po
o
CCIO
12
13
V
/ F
I
Driver Data Input (CMOS level is relative to V
see Table 2 and Table 3
); Schmitt trigger input;
mo
SEO
CCIO
V
(3.3V)
Internal Regulator Option:
REG
Regulated supply output voltage (3.0V to 3.6V) during 5V operation;
decoupling capacitor of at least 0.1 F is required.
14
V
(5.0V)
Internal Regulator Option:
CC
Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB line
Vbus.
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2
Terminal Terminal
I/O
Terminal Description
Number
Name
15
V
(3.3V)
Pull-up Supply Voltage (3.3V 10%):
PU
Connect an external 1.5k resistor on D (FS data rate);
Pin function is controlled by Config input pin:
Config = LOW
Config = HIGH
V
V
(3.3V) is floating (High Impedance) for zero pull-up current.
PU
(3.3V) = 3.3V; internally connected to V
(3.3V).
PU
REG
16
Config
GND
I
USB connect or disconnect software control input.
Configures 3.3V to external 1.5k resistor on D when HIGH.
Exposed
Diepad
GND
GND supply down bonded to exposed diepad to be connected to the PCB GND.
Functional Description
The USB1T1105A transceiver is designed to convert CMOS
data into USB differential bus signal levels and to convert USB
differential bus signal to CMOS data.
Table 1 describes the specific pin functionality selection. Table
2, Table 3, and Table 4 describe the specific Truth Tables for
Driver and Receiver operating functions.
To minimize EMI and noise the outputs are edge rate controlled
with the rise and fall times controlled and defined for full speed
data rates. The rise, fall times are balanced between the differ-
ential pins to minimize skew.
The USB1T1105A also has the capability of various power sup-
ply configurations to support mixed voltage supply applications
(see Table 5) and Power Supply Configurations and Options for
detailed descriptions.
Functional Tables
TABLE 1. Function Select
Vp/Vm
SUSPND
OE
Dꢀ, Dꢁ
RCV
Function
L
L
Driving &
Receiving
Active
Active
Normal Driving
(Differential Receiver Active)
L
H
H
H
L
Receiving
(Note 1)
Active
Active
Active
Active
Receiving
Driving
Inactive
(Note 2)
Driving during Suspend
(Differential Receiver Inactive)
H
3-STATE
(Note 1)
Inactive
(Note 2)
Low Power State
Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors.
Note 2: For SUSPND = HIGH mode the differential receiver is inactive and the output RCV output is forced LOW. The out-of-suspend signaling (K) is detected via the single-
ended receiver outputs of the V and V pins.
p
m
TABLE 2. Driver Function (OE = L) using Differential Input Interface Mode Pin = H
Vmo
Vpo
Data
L
L
L
H
L
SE0 (Note 3)
Differential Logic 1
Differential Logic 0
Illegal State
H
H
H
Note 3: SE0 = Single Ended Zero
TABLE 3. Driver Function (OE = L) using Single-ended Input Interface Mode Pin = L
Vo
FSE0
Data
L
L
L
H
L
Differential Logic 0
Differential Logic 1
SE0 (Note 4)
H
H
H
SE0 (Note 4)
3
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Note 4: SE0 = Single Ended Zero
TABLE 4. Receiver Function (OE = H)
Vp
Vm
Dꢀ, Dꢁ
RCV
Differential Logic 1
Differential Logic 0
SE0
H
L
H
L
L
H
L
X
L
L
Sharing Mode
H
H
X = Don’t Care
Power Supply Configurations and Options
The three modes of power supply operation are:
3-STATE and the USB1T1105A allows external signals up to
3.6V to share the D and D bus lines. Internally the circuitry
limits leakage from D and D pins (maximum 10 A) and
• Normal Mode: Regulated Output and Regulator Bypass
1. Regulated Output: V
is connected and V
(5.0) is
V
such that device is in low power (suspended) state.
CCIO
CC
CCIO
connected to 5V (4.0V to 5.5V) and the internal voltage
regulator then produces 3.3V for the USB connections.
Terminals Vbusmon and RCV are forced LOW as an indica-
tion of this mode with Vbusmon being ignored during this
state.
2. Internal Regulator Bypass Mode: V
is connected and
CCIO
both V (5.5) and V
(3.3) are connected to a 3.3V
• Disable Mode: V
is not connected. V is connected, or
CCIO CC
CC
REG
source (3.0V to 3.6V).
V
and V
are connected. 0V to 3.3V in this mode D and
CC
REG
D
are 3-STATE and V
is HIGH Impedance (switch is
PU
In both cases for normal mode the V
voltage source (1.65V to 3.6V) that is a function of the exter-
nal circuit configuration.
is an independent
CCIO
turned off). The USB1T1105A allows external signals up to
3.6V to share the D and D bus lines. Internally the circuitry
limits leakage from D and D terminals (maximum 10 A).
• Sharing Mode: V
is only supply connected. V
and
CC
CCIO
A summary of the Supply Configurations is described in Table 5.
V
are not connected. In this mode the D and D pins are
REG
TABLE 5. Power Supply Configuration Options
Power Supply Mode Configuration
Pins
Normal
Disable
Normal
(Regulator Bypass)
Sharing
(Regulated Output)
V
3.6V
Connected
Connected to 5V Source
Connected to V
(3.3V)
REG
CC
(5V)
to 5V Source
[max drop of 0.3V]
(2.7V to 3.6V)
V
(3.3V)
Pulled LOW
3.3V, 300
A
3.3V, 300
A
Connected
REG
Regulator OFF
Regulated Output
Not Connected
3-STATE (Off)
Regulated Output
to 3.3V Source
V
1.65V to 3.6V Source
3-STATE (Off)
1.65V to 3.6V Source
1.65V to 3.6V Source
CCIO
V
(3.3V)
3.3V Available if
Config = HIGH
3.3V Available if
Config = HIGH
PU
D , D
V , V
3-STATE
3-STATE
Invalid
Invalid
Hi-Z
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
Function of Mode Set Up
H
L
p
m
RCV
OE, SUSPND,
Config, V /V ,
Hi-Z
po
o
V
/F
, MODE
mo SEO
Note 5: Hi-Z or forced LOW.
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4
Absolute Maximum Ratings(Note 6)
Recommended Operating Conditions
Supply Voltage (V )(5V)
0.5V to 6.0V
0.5V to 4.6V
CC
DC Supply Voltage V (5V)
4.0V to 5.5V
CC
I/O Supply Voltage (V
)
CCIO
I/O DC Voltage V
DC Input Voltage Range (V )
1.65V to 3.6V
CCIO
Latch-up Current (I
)
LU
0V to V
0.5V
I
CCIO
V = 1.8V to 5.4V
150 mA
18 mA
I
DC Input Range for AI/O (V
Pins D and D
)
0V to 3.6V
0V to 3.6V
IA/O
DC Input Current (I )
IK
V
0
I
Operating Ambient Temperature
(T
DC Input Voltage (V )
I
)
40 C to 85 C
AMB
(Note 7)
0.5V to V
CCIO
0.5V
DC Output Diode Current (I
)
OK
V
V
or V
O
0
18 mA
O
CC
DC Output Voltage (V )
O
(Note 7)
0.5V to V
CCIO
0.5V
Output Source or Sink Current (I )
O
V
= 0 to V
CC
O
Current for D , D Pins
Current for RCV, V /V
12 mA
12 mA
m
p
DC V or GND Current
CC
(I , I
)
100 mA
CC GND
ESD Immunity Voltage (V
Contact HBM
);
ESD
Note 6: The Absolute Maximum Ratings are those values beyond which the safety of
the device cannot be guaranteed. The device should not be operated at these limits.
The parametric values defined in the Electrical Characteristic tables are not guaran-
teed at the absolute maximum rating. The “Recommended Operating Conditions”
table will define the conditions for actual device operation.
Pins D , D , and GND
All Other Pins
15kV
2.5kV
Storage Temperature (T
)
40 C to 125 C
STO
Note 7: IO Absolute Maximum Rating must be observed.
Power Dissipation (P
)
TOT
I
I
(5V)
48 mW
9 mW
CC
CCIO
DC Electrical Characteristics (Supply Pins)
V (5V) = 4.0V to 5.5V or V = 1.65V to 3.6V
Over recommended range of supply voltage(a3n.d3oVp)er=ati3ng.0frVeetoair3te.6mVpe,rVature (unless otherwise noted).
CC REG CCIO
Limits
40 C to 85 C
Typ
Symbol
Parameter
Conditions
Units
Min
3.0
Max
V
(3.3V)
Regulated Supply Output
Internal Regulator Option;
3.3
3.6
REG
V
I
300
Transmitting and Receiving at
12 Mbits/s; C = 50 pF (D , D )
A
(Note 8)(Note 9)
LOAD
I
I
I
Operating Supply Current (V 5.0)
CC
4.0
8.0
2.0
CC
mA
mA
(Note 10)
1.0
LOAD
I/O Operating Supply Current
Supply Current during
Transmitting and Receiving at
12 Mbits/s
CCIO
(Note 10)
IDLE: V
2.7V, V
D
0.3V;
0.3V
500
(Note 11)
20.0
CC (IDLE)
D
A
A
FS IDLE and SE0 (V 5.0)
CC
SE0: V
0.3V, V
D
D
I
I
I/O Static Supply Current
Suspend Supply Current
USB1T1105A
IDLE, SUSPND or SE0
SUSPND = HIGH
OE = HIGH
CCIO (STATIC)
CC(SUSPND)
25.0
(Note 11)
A
A
V
V
= V = OPEN
p
m
I
I/O Sharing Mode Supply Current
(5V) Not Connected
20.0
CCIO(SHARING)
CC
5
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DC Electrical Characteristics (Continued)
Limits
40 C to 85 C
Typ
Symbol
Parameter
Conditions
Units
A
Min
4.1
1.4
Max
I
Sharing Mode Load Current on
D /D Pins
V (5V) Not Connected
CC
D
(SHARING)
10.0
Config = LOW; V = 3.6V
D
V
V
Threshold Detection Voltage
1.65V
V
CCIO
3.6V
CCTH
CC
Supply Lost
3.6
0.5
V
Supply Present
V
V
V
Threshold Detection
V
= 1.8V
CCHYS
CC
CCIO
70.0
mV
V
Hysteresis Voltage
V
Threshold Detection Voltage
2.7V
Supply Lost
Supply Present
= 3.3V
V
3.6V
CCIOTH
CCIO
REG
V
V
Threshold Detection
V
REG
CCIOHYS
CCIO
450
mV
Hysteresis Voltage
Note 8: I
includes the pull-up resistor current via pin V
LOAD
PU
Note 9: The minimum voltage in Suspend mode is 2.7V.
Note 10: Not tested in production, value based on characterization.
Note 11: Excludes any current from load and V current to the 1.5k resistor.
PU
Note 12: Includes current between V and the 1.5k internal pull-up resistor.
pu
Note 13: When V
2.7V, minimum value for V
= 2.0V for supply present condition.
CCIO
REGTH
DC Electrical Characteristics (Digital Pins – excludes D , D Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). V
= 1.6V to 3.6V
CCIO
Limits
40 C to 85 C
Max
Symbol
Parameter
Test Conditions
Units
Min
Input Levels
V
V
V
LOW Level Input Voltage
0.3
0.7
V
V
V
IL
HIGH Level Input Voltage
0.6*V
CCIO
IH
Hysteresis Voltage P11 P12
Pins V /V , V = 3.3V
CCIO
0.3
HYS
po mo
Output Levels
V
LOW Level Output Voltage
HIGH Level Output Voltage
I
I
I
I
= 2 mA
= 100
0.4
V
V
OL
OL
OL
OH
OH
A
A
0.15
V
= 2 mA
= 100
V
- 0.4
OH
CCIO
V
- 0.15
CCIO
Leakage Current
I
Input Leakage Current
Input Capacitance
V
= 1.65V to 3.6V
1.0 (Note 14)
10.0
A
LI
CCIO
Capacitance
, C
C
Pin to GND
pF
IN
I/O
Note 14: If V
V
then leakage current will be higher than specified.
CCIO
REG
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6
DC Electrical Characteristics (Analog I/O Pins – D , D Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). V
= 4.0V to 5.5V or V
= 3.0V to 3.6V
CC
REG
Limits
Symbol
Parameter
Test Condition
40 C to 85 C
Typ
Units
Min
Max
Input Levels – Differential Receiver
V
V
Differential Input Sensitivity
| V
- V |
I(D )
0.2
0.8
V
V
DI
I(D
)
Differential Common Mode Voltage
2.5
0.8
0.7
CM
Input Levels – Single-ended Receiver
V
V
V
LOW Level Input Voltage
HIGH Level Input Voltage
Hysteresis Voltage
V
V
V
IL
2.0
0.4
IH
HYS
Output Levels
V
V
LOW Level Output Voltage
HIGH Level Output Voltage
R
R
= 1.5k to 3.6V
= 15k to GND
0.3
3.6
V
V
OL
L
2.8 (Note 15)
OH
L
Leakage Current
I
Input Leakage Current Off State
I/O Capacitance
OE = H
1.0
20.0
44.0
A
LZ
Capacitance
C
Pin to GND
pF
I/O
Resistance
Z
Driver Output Impedance
34.0
10.0
41.0
(Note 16)
DRV
Z
Driver Input Impedance
Switch Resistance
M
V
IN
R
10.0
3.6
SW
V
Termination Voltage
R
Upstream Port
3.0
(Note 17)
(Note 18)
TERM
PU
Note 15: V min. = V
- 0.2V.
REG
OH
Note 16: Includes external resistors of 33 on both D and D pins.
Note 17: This voltage is available at pin V and V
.
REG
PU
Note 18: Minimum voltage is 2.7V in the suspend mode.
7
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AC Electrical Characteristics (A I/O Pins Full Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). V
= 4.0V to 5.5V or V
= 3.0V to 3.6V, V
=
CCIO
CC
REG
1.65V to 3.6V, C = 50 pF; R = 1.5K on D to V
L
L
PU
Limits
Symbol
Parameter
Test Conditions
40 C to 85 C
Typ
Unit
Min
Max
Driver Characteristics
t
Output Rise Time
C
= 50 125 pF
4.0
20.0
FR
L
10% to 90%
Figures 1, 5
ns
t
f
Output Fall Time
4.0
20.0
FF
Rise/Fall Time Match
t / t Excludes First Transition
F R
RFM
90.0
111.1
%
V
from Idle State
V
Output Signal Crossover Voltage
Excludes First Transition from
Idle State see Waveform
CRS
1.3
2.0
(Note 19)
Driver Timing
t
t
t
t
t
t
Propagation Delay
PLH
PHL
PHZ
PLZ
PZH
PZL
Figures 2, 5
Figures 4, 6
Figures 4, 6
18.0
15.0
15.0
ns
ns
ns
(V /V , V /V to D /D )
p
po
m
mo
Driver Disable Delay
(OE to D /D )
Driver Enable Delay
(OE to D /D )
Receiver Timing
t
t
t
t
Propagation Delay (Diff)
PLH
PHL
PLH
PHL
Figures 3, 7
15.0
18.0
ns
ns
(D /D to Rev)
Single Ended Receiver Propagation Delay
Figures 3Figure 7
(D /D to V / V , V /V )
mo
p
po
m
Note 19: Not production tested, guaranteed by characterization.
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8
AC Waveforms
FIGURE 1. Rise and Fall Times
FIGURE 2. V /V , V /V to D /D
mo SEO
po
o
FIGURE 3. D /D to R , V and V
m
CV
p
FIGURE 4. OE to D /D
Test Circuits and Waveforms
V = 0 for t
, t
PZH PHZ
V = V
for t
PZL
REG
C
C
= 50 pF Full Speed Propagation Delays
L
L
=
125 pF Edge Rates only
FIGURE 6. Load for Enable and Disable Times
FIGURE 5. Load for D /D
FIGURE 7. Load for V /V , V V and RCV
m
mo
p/ po
9
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Tape and Reel Specification
Tape Format for MHBCC
Package
Tape
Number
Cavity
Cover Tape
Designator
Section
Leader (Start End)
Carrier
Cavities
125 (typ)
2500/3000
75 (typ)
Status
Empty
Filled
Status
Sealed
Sealed
Sealed
MHX
Trailer (Hub End)
Empty
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Tape Size
A
B
C
D
N
W1
0.488
(12.4)
W2
0.724
(18.4)
13.0
330
0.059
(1.50)
0.512
(13.00)
0.795
7.008
(178)
12 mm
(20.20)
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10
Physical Dimensions inches (millimeters) unless otherwise noted
Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Package Number MLP16HB
11
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION
As used herein:
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
2. A critical component is any component of a life support
device or system whose failure to perform can be reason-
ably expected to cause the failure of the life support device
or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of terms
Datasheet Identification Product Status
Definition
Advance Information
Formative or In Design This datasheet contains the design specifications for product develop-
ment. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data, and supplementary data will
be published at a later date. Fairchild Semiconductor reserves the right
to make changes at any time without notice in order to improve design.
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice in order
to improve design.
This datasheet contains specifications on a product that has been dis-
continued by Fairchild Semiconductor. The datasheet is printed for ref-
erence information only.
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12
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