FT27C010 [FORCE]

1-Megabit (128K x 8) UVEPROM;


型号：	FT27C010
厂家：	Force Technologies
描述：	1-Megabit (128K x 8) UVEPROM 可编程只读存储器电动程控只读存储器
文件：	总11页 (文件大小：809K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Features

• Fast Read Access Time - 45 ns

• Low-Power CMOS Operation

– 100 µA max. Standby

– 25 mA max. Active at 5 MHz (FT27C010L)

– 35 mA max. Active at 5 MHz (FT27C010)

• JEDEC Standard Packages

– 32-Lead CDIL/LCC/JLCC +Custom Ceramic packages

• 5V ± 10% Supply

• High Reliability CMOS Technology

1-Megabit

(128K x 8)

UVEPROM

– 2000V ESD Protection

– 200 mA Latchup Immunity

• Programming Algorithm - 100 µs/byte (typical)

• CMOS and TTL Compatible Inputs and Outputs

• Integrated Product Identification Code

• Commercial, Industrial and Automotive Temperature Ranges. MILITARY-Contact sales

FT27C010(L)

Description

The FT27C010(L) is a low-power, high-performance 1,048,576-bit UV erase/program-

mable read only memory (UVEPROM) organised as 128K by 8 bits. They require

only one 5V power supply in normal read mode operation. Any byte can be accessed

in less than 45 ns, eliminating the need for speed reducing WAIT states on high-per-

formance microprocessor systems.

Two power versions are offered. In read mode, the FT27C010 typically consumes 25

mA while the FT27C010L requires only 8 mA. Standby mode supply current for both

parts is typically less than 10 µA.

Pin Configurations

Pin Name

A0 - A16

O0 - O7

Function

Addresses

Outputs

Chip Enable

Output Enable

Program Strobe

No Connect

1M bit EPROM

PGM

CLCC/JLCC Top View

CDIL Top View

29 A14

28 A13

27 A8

26 A9

25 A11

24 OE

23 A10

22 CE

21 O7

VPP

A16

A15

A12

32 VCC

31 PGM

30 NC

29 A14

28 A13

27 A8

26 A9

25 A11

24 OE

23 A10

22 CE

21 O7

20 O6

19 O5

18 O4

17 O3

A2 10

A1 11

A0 12

O0 13

A2 10

A1 11

A0 12

O0 13

O1 14

O2 15

GND 16

2006

1/11

Rev 1

The FT27C010(L) in available in a industry stan-

dard JEDEC-approved programmable (UVerasable)

Ceramic DIl, LCC, packages. All devices fea-

ture two line control (CE, OE) to give designers the flexibil-

ity to prevent bus contention.

System Considerations

Switching between active and standby conditions via the

Chip Enable pin may produce transient voltage excursions.

Unless accommodated by the system design, these tran-

sients may exceed data sheet limits, resulting in device

non-conformance. At a minimum, a 0.1 µF high frequency,

low inherent inductance, ceramic capacitor should be uti-

lised for each device. This capacitor should be connected

between the V_CCand Ground terminals of the device, as

close to the device as possible. Additionally, to stabilise the

supply voltage level on printed circuit boards with large

EPROM arrays, a 4.7 µF bulk electrolytic capacitor should

be utilised, again connected between the V_CCand Ground

terminals. This capacitor should be positioned as close as

possible to the point where the power supply is connected

to the array.

With 128K byte storage capability, the FT27C010(L) allows

firmware to be stored reliably and to be accessed by the

system without the delays of mass storage media.

Force FT27C010(L) have additional features to ensure high

quality and efficient production use. The Program-

ming Algorithm reduces the time required to program the

part and guarantees reliable programming. Programming

time is typically only 100 µs/byte. The Integrated Product

Identification Code electronically identifies the device and

manufacturer. This feature is used by industry standard

programming equipment to select the proper programming

algorithms and voltages.

Block Diagram

FT27C010(L)

2006

2/11

Rev 1

FT27C010(L)

Absolute Maximum Ratings*

*NOTICE:

Stresses beyond those listed under “Absolute Maxi-

mum Ratings” may cause permanent damage to

the device. This is a stress rating only and func-

tional operation of the device at these or any other

conditions beyond those indicated in the opera-

tional sections of this specification is not implied.

Exposure to absolute maximum rating conditions

for extended periods may affect device reliability.

Temperature Under Bias................................ -55°C to +125°C

Storage Temperature..................................... -65°C to +150°C

Voltage on Any Pin with

Respect to Ground .........................................-2.0V to +7.0V⁽¹⁾

Voltage on A9 with

Respect to Ground ......................................-2.0V to +14.0V⁽¹⁾

V_PPSupply Voltage with

Respect to Ground .......................................-2.0V to +14.0V⁽¹⁾

Note:

1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is

V_CC+ 0.75V dc which may overshoot to +7.0 volts for pulses of less than 20 ns.

Operating Modes

Mode\Pin

V_IL

V_IH

PGM

X⁽¹⁾

V_PP

Outputs

Read

D_OUT

High

D_IN

Output Disable

Standby

V_IH

V_IL

V_IH

Rapid Program⁽²⁾

PGM Verify

PGM Inhibit

V_IH

V_IL

V_IH

V_PP

D_OUT

High Z

(3)

A9 = V_H

Product Identification⁽⁴⁾

V_IL

A0 = V_IHor V_IL

A1 - A16 = V_IL

Identification Code

Notes: 1. X can be V_ILor V_IH.

2. Refer to Programming Characteristics

3. V_H= 12.0 ± 0.5V.

4. Two identifier bytes may be selected. All Ai inputs are held low (V_IL), except A9 which is set to V_Hand A0 which is toggled low

(V_IL) to select the Manufacturer’s Identification byte and high (V_IH) to select the Device Code byte.

2006

3/11

Rev 1

DC and AC Operating Conditions for Read Operation

FT27C010/FT27C010L

-45

-55

-70

-90

-12

-15

Com.

Ind.

0°C - 70°C

-40°C - 85°C

0°C - 70°C

-40°C - 85°C

0°C - 70°C

-40°C - 85°C

0°C - 70°C

-40°C - 85°C

-40°C - 125°C

5V ± 10%

0°C - 70°C

-40°C - 85°C

-40°C - 125°C

5V ± 10%

0°C - 70°C

-40°C - 85°C

-40°C - 125°C

5V ± 10%

Operating

Temp. (Case)

Auto.

V_CCPower Supply

5V ± 10%

DC and Operating Characteristics for Read Operation

Symbol

Parameter

Condition

Min

Max

± 1

Units

µA

Com., Ind.

Auto.

I_LI

Input Load Current

V_IN= 0V to V_CC

± 5

Com., Ind.

Auto.

± 5

I_LO

Output Leakage Current

V_PP⁽¹⁾⁾Read/Standby Current

V_CC⁽¹⁾Standby Current

V_OUT= 0V to V_CC

±10

IPP1⁽²⁾

I_SB

V_PP= V_CC

I_SB1(CMOS), CE = V_CC± 0.3V

100

I_SB2(TTL), CE = 2.0 to V_CC+ 0.5V

FT27C010(L)

FT27C010

f = 5 MHz, I_OUT= 0 mA,

CE = V_IL

I_CC

V_CCActive Current

V_IL

Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage

-0.6

2.0

0.8

V_IH

V_OL

V_OH

V_CC+ 0.5

0.4

I_OL= 2.1 mA

I_OH= -400 µA

2.4

Notes: 1. V_CCmust be applied simultaneously or before V_PP, and removed simultaneously or after V_PP..

2. V_PPmay be connected directly to V_CC, except during programming. The supply current would then be the sum of I_CCand I_PP..

AC Characteristics for Read Operation

FT27C010/FT27C010L

-45

-55

-70

-90

-12

-15

Symbol

Parameter

Condition

CE = OE = V_IL

OE = V_IL

Min Max Min Max Min Max Min Max Min Max Min Max Units

(3)

t_ACC

Address to Output Delay

CE to Output Delay

OE to Output Delay

120

150

(2)

t_CE

(2)(3)

t_OE

CE = V_IL

OE or CE High to Output Float, whichever occurred

first

(4)(5)

t_DF

Output Hold from Address, CE or OE, whichever

occurred first

t_OH

Notes:

2,3,4,5. - see AC Waveforms for Read Operation.

FT27C010(L)

2006

4/11

Rev 1

FT27C010(L)

AC Waveforms for Read Operation⁽¹⁾

Notes: 1. Timing measurement reference level is 1.5V for -45 and -55 devices. Input AC drive levels are V_IL= 0.0V and V_IH= 3.0V.

Timing measurement reference levels for all other speed grades are V_OL= 0.8V and V_OH= 2.0V. Input AC drive levels are

V_IL= 0.45V and V_IH= 2.4V.

2. OE may be delayed up to t_CE- t_OEafter the falling edge of CE without impact on t_CE

3. OE may be delayed up to t_ACC- t_OEafter the address is valid without impact on t_ACC

4. This parameter is only sampled and is not 100% tested.

5. Output float is defined as the point when data is no longer driven.

Input Test Waveforms and

Measurement Levels

Output Test Load

For -45 and -55 devices only:

t_R, t_F< 5 ns (10% to 90%)

Note:

C_L= 100 pF including jig

For -70, -90, -12, -15, and -20 devices:

capacitance, except for

the -45 and -55 devices,

where C_L= 30 pF.

t_R, t_F< 20 ns (10% to 90%)

Pin Capacitance

f = 1 MHz, T = 25°C⁽¹⁾

Symbol

C_IN

Typ

Max

Units

Conditions

V_IN= 0V

C_OUT

V_OUT= 0V

Note:

1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

2006

5/11

Rev 1

Programming Waveforms⁽¹⁾

Notes: 1. The Input Timing Reference is 0.8V for V_ILand 2.0V for V_IH.

2. t_OEand t_DFPare characteristics of the device but must be accommodated by the programmer.

3. When programming the FT27C010(L) at 0.1 µF capacitor is required across V_PPand ground to suppress spurious voltage

transients.

DC Programming Characteristics

T_A= 25 ± 5°C, V_CC= 6.5 ± 0.25V, V_PP= 13.0 ± 0.25V

Limits

Symbol

I_LI

Parameter

Test Conditions

Min

Max

±10

Units

µA

Input Load Current

V_IN= V_IL, V_IH

V_IL

Input Low Level

-0.6

2.0

0.8

V_IH

Input High Level

V_CC+ 1

0.4

V_OL

V_OH

I_CC2

I_PP2

V_ID

Output Low Voltage

I_OL= 2.1 mA

Output High Voltage

V_CCSupply Current (Program and Verify)

V_PPSupply Current

I_OH= -400 µA

2.4

CE = PGM = V_IL

A9 Product Identification Voltage

11.5

12.5

FT27C010(L)

2006

6/11

Rev 1

FT27C010(L)

AC Programming Characteristics

T_A= 25 ± 5°C, V_CC= 6.5 ± 0.25 V, V_PP= 13.0 ± 0.25V

Limits

Symbol

t_AS

Parameter

Test Conditions⁽¹⁾

Min

Max

Units

µs

Address Setup Time

CE Setup Time

t_CES

t_OES

t_DS

µs

OE Setup Time

Input Rise and Fall Times

µs

(10% to 90%) 20ns

Data Setup Time

µs

t_AH

Address Hold Time

Data Hold Time

µs

Input Pulse Levels

t_DH

µs

0.45V to 2.4V

t_DFP

t_VPS

t_VCS

t_PW

OE High to Output Float Delay⁽²⁾

130

Input Timing Reference Level

0.8V to 2.0V

V_PPSetup Time

µs

V_CCSetup Time

µs

PGM Program Pulse Width⁽³⁾

105

150

µs

Output Timing Reference Level

0.8V to 2.0V

t_OE

Data Valid from OE

V_PPPulse Rise TIme

During Programming

t_PRT

Notes: 1. V_CCmust be applied simultaneously or before V_PPand removed simultaneously or after V_PP..

2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven—

see timing diagram.

3. Program Pulse width tolerance is 100 µsec ± 5%.

Force 27C010(L) uses Integrated Product Identification Code

Pins

Hex

Codes

Data

Manufacturer

Device ype

2006

7/11

Rev 1

Rapid Programming Algorithm

A 100 µs PGM pulse width is used to program. The

address is set to the first location. V_CCis raised to 6.5V and

V_PPis raised to 13.0V. Each address is first programmed

with one 100 µs PGM pulse without verification. Then a

verification / reprogramming loop is executed for each

address. In the event a byte fails to pass verification, up to

10 successive 100 µs pulses are applied with a verification

after each pulse. If the byte fails to verify after 10 pulses

have been applied, the part is considered failed. After the

byte verifies properly, the next address is selected until all

have been checked. V_PPis then lowered to 5.0V and V_CCto

5.0V. All bytes are read again and compared with the origi-

nal data to determine if the device passes or fails.

FT27C010(L)

2006

8/11

Rev 1

FT27C010(L)

FT27C010 Ordering Information

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

0.1

Commercial

FT27C010-45DC

FT27C010-45LC

CDIL

LCC

(0°C to 70°C)

0.1

Industrial

FT27C010-45DI

FT27C010-45LI

CDIL

LCC

(-40°C to 85°C)

Commercial

FT27C010-55DC

FT27C010-55LC

CDIL

LCC

(0°C to 70°C)

Industrial

FT27C010-55DI

FT27C010-55LI

CDIL

LCC

(-40°C to 85°C)

Commercial

FT27C010-70DC

FT27C010-70LC

CDIL

LCC

(0°C to 70°C)

Industrial

FT27C010-70DI

FT27C010-70LI

CDIL

LCC

(-40°C to 85°C)

(continued)

Package Type

32-pad, Windowed Leadless Chip Carrier (LCC)

LCC

CDIL

32-Lead, 0.600" Wide, Ceramic Windowed Dual Inline Package (CDIL)

2006

9/11

Rev 1

FT27C010 Ordering Information (Continued)

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

0.1

Commercial

FT27C010-90DC

FT27C010-90LC

CDIL

LCC

(0°C to 70°C)

0.1

Industrial

FT27C010-90DI

FT27C010-90LI

CDIL

LCC

(-40°C to 85°C)

0.1

FT27C010-90DA

Automotive

FT27C010-90LA/KA

CDIL/LCC/JLCC

(-40°C to 125°C)

120

0.1

Commercial

FT27C010-12DC

FT27C010-12LC

CDIL

LCC

(0°C to 70°C)

0.1

Industrial

FT27C010-12DI

FT27C010-12LI

(-40°C to 85°C)

LCC

0.1

FT27C010-12DA

FT27C010-12LA

CDIL

LCC

Automotive

(-40°C to 125°C)

150

0.1

Commercial

FT27C010-15DC

FT27C010-15LC

CDIL

LCC

(0°C to 70°C)

0.1

Industrial

FT27C010-15DI

FT27C010-15LI

CDIL

LCC

(-40°C to 85°C)

0.1

FT27C010-15JA

CDIL

Automotive

FT27C010-15LA/KA

LCC/JLCC

(-40°C to 125°C)

Package Type

LCC

32-pad, Windowed Leadless Chip Carrier (LCC)

32-Lead, 0.600" Wide, Ceramic Dual Inline Package (CDIL)

32-Lead, Windowed J Leaded Chip Carrier (JLCC)

CDIL

JLCC

FT27C010(L)

2006

10/11

Rev 1

FT27C010(L)

Ashley Crt, Henley,

Marlborough, Wilts, UK. SN8 3RH

Tel: +44(0)1264 731200

Fax:+44(0)1264 731444

E-mail

sales@forcetechnologies.co.uk

www.forcetechnologies.co.uk

Life Support Applications

Force Technologies products are not designed for use in life support appliances, devices or systems where malfunction of a Force Technologies

product can reasonably be expected to result in a personal injury. Force Technologies customers using or selling Force Technologies products

for use in such applications do so at their own risk and agree to fully indemnify Force Technologies for any damages resulting from such

improper use or sale.

2006

11/11

Rev 1

FT27C010 [FORCE]

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