FT28C16-25DC [FORCE]
Parallel EEPRO M 16K (2Kx8);
| 型号： | FT28C16-25DC |
| 厂家： | 
Force Technologies |
| 描述： | Parallel EEPRO M 16K (2Kx8) |
| 文件： | 总12页 (文件大小：1025K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FT28C16
Parallel EEPROM 16K (2Kx8)
Features
• Fast Read Access Time - 150 ns
• Fast Byte Write - 200 µs or 1 ms
• Self-Timed Byte Write Cycle
–Internal Address and Data Latches
–Internal Control Timer
–Automatic Clear Before Write
• Direct Microprocessor Control
–DATA POLLING
• Low Power
–30 mA Active Current
–100 µA CMOS Standby Current
• High Reliability
–Endurance: 10 4 or 105 Cycles
–Data Retention: 10 Years
• 5V ± 10% Supply
• CMOS & TTL Compatible Inputs and Outputs
• JEDEC Approved Byte Wide Pinout
• Commercial, Industrial and Military Temperature Ranges
Description
The FT28C16 is a low-power, high-performance Electrically Erasable and Program-
mable Read Only Memory with easy to use features. The FT28C16 is a 16K memory
organised as 2,048 words by 8 bits. The device is manufactured with reliable Atmel die.
(continued)
Pin Configurations
Pin Name
A0 - A10
CE
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
OE
WE
I/O0 - I/O7
NC
DC
Don’t Connect
LCC/"J"LCC
Top V iew
CDIL,/FP
Top V iew
A7
A6
1
2
3
4
5
6
7
8
9
24 VCC
A6
A5
A4
A3
A2
5
6
7
8
9
29 A8
28 A9
27 NC
26 NC
25 OE
24 A10
23 CE
22 I/O7
21 I/O6
23 A8
A5
22 A9
A4
21 WE
20 OE
19 A10
18 CE
17 I/O7
16 I/O6
15 I/O5
14 I/O4
13 I/O3
A3
A2
A1 10
A0 11
A1
A0
NC 12
I/O0 13
I/O0
I/O1 10
I/O2 11
GND 12
Note: PLCC package pins 1 and 17
are DON’T CONNECT.
Rev 2
1/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
The CMOS technology offers fast access times of 150 ns at
low power dissipation. When the chip is deselected the
standby current is less than 100 µA.
Force's 28C16 has additional features to ensure high qual-
ity and manufacturability. The device utilises error correc-
tion internally for extended endurance and for improved
data retention characteristics. An extra 32 bytes of
EEPROM are available for device identification or tracking.
The FT28C16 is accessed like a static RAM for the read or
write cycles without the need of external components. Dur-
ing a byte write, the address and data are latched inter-
nally, freeing the microprocessor address and data bus for
other operations. Following the initiation of a write cycle,
the device will go to a busy state and automatically clear
and write the latched data using an internal control timer.
The end of a write cycle can be determined by DATA
POLLING of I/O7. Once the end of a write cycle has been
detected, a new access for a read or a write can begin.
Block Diagram
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
All Input Voltages (including NC Pins)
with Respect to Ground...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground.............................-0.6V to VCC + 0.6V
Voltage on OE and A9
with Respect to Ground...................................-0.6V to +13.5V
Rev 2
2/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
Device Operation
READ: The FT28C16 is accessed like a Static RAM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in a high
impedance state whenever CE or OE is high. This dual line
control gives designers increased flexibility in preventing
bus contention.
cycle, an attempted read of the data being written results in
the complement of that data for I/O7 (the other outputs are
indeterminate). When the write cycle is finished, true data
appears on all outputs.
WRITE PROTECTION: Inadvertent writes to the device
are protected against in the following ways: (a) VCC
sense—if VCC is below 3.8V (typical) the write function is
inhibited; (b) VCC power on delay—once VCC has reached
3.8V the device will automatically time out 5 ms (typical)
before allowing a byte write; and (c) write inhibit—holding
any one of OE low, CE high or WE high inhibits byte write
cycles.
BYTE WRITE: Writing data into the FT28C16 is similar to
writing into a Static RAM. A low pulse on the WE or CE
input with OE high and CE or WE low (respectively) ini-
tiates a byte write. The address location is latched on the
last falling edge of WE (or CE); the new data is latched on
the first rising edge. Internally, the device performs a self-
clear before write. Once a byte write has been started, it
will automatically time itself to completion. Once a pro-
gramming operation has been initiated and for the duration
of tWC, a read operation will effectively be a polling opera-
tion.
CHIP CLEAR: The contents of the entire memory of the
FT28C16 may be set to the high state by the CHIP CLEAR
operation. By setting CE low and OE to 12 volts, the chip is
cleared when a 10 msec low pulse is applied to WE
.
DEVICE IDENTIFICATION: An extra 32 bytes of
EEPROM memory are available to the user for device iden-
tification. By raising A9 to 12 ± 0.5V and using address
locations 7E0H to 7FFH the additional bytes may be written
to or read from in the same manner as the regular memory
array.
FAST BYTE WRITE: The FT28C16E offers a byte write
time of 200 µs maximum. This feature allows the entire
device to be rewritten in 0.4 seconds.
DATA POLLING: The FT28C16 provides DATA POLLING
to signal the completion of a write cycle. During a write
Rev 2
3/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
DC and AC Operating Range
FT28C16
Com.
0°C - 70°C
Operating
Temperature (Case)
Ind.
-40°C - 85°C
-55°C - 125°C
5V ± 10%
Mil
Vcc Power Supply
Operating Modes
I/O
DOUT
DIN
Mode
CE
VIL
VIL
VIH
X
OE
WE
VIH
VIL
X
Read
VIL
VIH
X(1)
X
Write(2)
Standby/Write Inhibit
Write Inhibit
Write Inhibit
Output Disable
Chip Erase
High Z
VIH
X
X
VIL
VIH
X
X
High Z
igh Z
(3)
VIL
VH
VIL H
DC Characteristics
Symbol
Parameter
Condition
Min
Max
10
Units
ILI
Input Load Current
Output Leakage Current
VCC Standby Current CMOS
VIN = 0V to VCC + 1V
VI/O = 0V to VCC
µA
µA
ILO
10
ISB1
CE
= VCC - 0.3V to VCC + 1.0V
100
2
µA
mA
mA
mA
mA
V
Com.
Ind.
ISB2
VCC Standby Current TTL
VCC Active Current AC
CE = 2.0V to VCC + 1.0V
3
Com.
Ind.
30
45
0.8
f = 5 MHz; IOUT = 0 mA
ICC
= V
CE
IL
VIL
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
VIH
VOL
VOH
2.0
2.4
V
IOL = 2.1 mA
.4
V
IOH = -400 µA
V
Rev 2
4/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
AC Read Characteristics
FT28C16-15
FT28C16-20
FT28C16-25
Symbol Parameter
Min
Max
Min
Max
200
200
80
Min
Max
Units
ns
tACC
150
150
70
250
250
100
60
Address to Output Delay
CE to Output Delay
OE to Output Delay
tCE (1)
tOE (2)
tDF (3,4)
ns
10
0
10
0
10
0
ns
50
55
ns
CE or OE High to Output Float
Output Hold from OE, CE or
Address, whichever occurred first.
tOH
0
0
0
ns
(1)(2)(3)(4)
AC Read Waveforms
may be delayed up to tACC - tCE after the address transition without impact on tACC
.
Notes: 1. CE
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change
without impact on tACC
3. tDF is specified from OE or CE
.
whichever occurs first (C = 5 pF).
L
4. This parameter is characterised and is not 100% tested.
Input Test Waveforms and
Measurement Level
Output Test Load
tR, tF < 20 ns
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol
CIN
Typ
4
Max
6
Units
pF
Conditions
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
1. This parameter is characterised and is not 100% tested.
Rev 2
5/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
AC Write Characteristics
Symbol
tAS, tOES
tAH
Parameter
Min
10
50
100
50
10
0
Typ
Max
Units
ns
Address, OE Set-up Time
Address Hold Time
ns
tWP
Write Pulse Width (WE or CE)
Data Set-up Time
1000
ns
tDS
ns
t
t
DH, tOEH
CS, tCH
Data, OE Hold Time
ns
CE to WE and WE to CE Set-up and Hold Time
ns
FT28C16
FT28C16E
0.5
1.0
ms
µs
tWC
Write Cycle Time
100
200
AC Write Waveforms
Controlled
WE
CE Controlled
Rev 2
6/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
Polling Characteristics(1)
Data
Symbol
Parameter
Min
10
Typ
Max
Units
ns
tDH
Data Hold Time
tOEH
tOE
OE Hold Time
10
ns
OE to Output Delay(2)
Write Recovery Time
ns
tWR
0
ns
Notes: 1. These parameters are characterised and not 100% tested.
2. See AC Characteristics.
Data Polling Waveforms
Chip Erase Waveforms
tS = tH = 1 µsec (min.)
t
W = 10 msec (min.)
VH = 12.0V ± 0.5V
Rev 2
7/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
Rev 2
8/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
Ordering Information (1)
ICC (mA)
tACC (ns)
Active Standby
Ordering Code
FT28C16(E)-15DC
FT28C16(E)-15JC
FT28C16(E)-15PC
FT28C16(E)-15SC
FT28C16(E)-15DI
FT28C16(E)-15JI
FT28C16(E)-15PI
FT28C16(E)-15SI
Package Operation Range
24D6
32J
Commercial
150
30
0.1
0.1
24P6
24S
(0°C to +70°C)
24D6
32J
Industrial
24P6
24S
(-40°C to +85°C)
Military
(-55°C to +125°C)
150
45
FT28C16(E)-15DM
24D6
Military
FT28C16(E)-15DMB
24D6
(-55°C to +125°C)
Mil-Std-883 M5004
FT28C16(E)-20DC
FT28C16(E)-20JC
FT28C16(E)-20PC
FT28C16(E)-20SC
FT28C16(E)-20DI
FT28C16(E)-20JI
FT28C16(E)-20PI
FT28C16(E)-20SI
24D6
32J
24P6
24S
24D6
32J
24P6
24S
Commercial
(0°C to +70°C)
200
200
250
250
30
45
30
45
0.1
0.1
0.1
0.1
Industrial
(-40°C to +85°C)
Military
(-55°C to +125°C)
Military
(-55°C to +125°C)
Mil-Std-883 M5004
FT28C16(E)-20DM
24D6
FT28C16(E)-20DMB
24D6
FT28C16(E)-25DC
FT28C16(E)-25JC
FT28C16(E)-25PC
FT28C16(E)-25SC
FT28C16(E)-25DI
FT28C16(E)-25JI
FT28C16(E)-25PI
FT28C16(E)-25SI
24D6
32J
24P6
24S
24D6
32J
24P6
24S
Commercial
(0°C to 70°C)
Industrial
(-40°C to +85°C)
Military
(-55°C to +125°C)
Military
FT28C16(E)-25DM
24D6
FT28C16(E)-25DMB
24D6
(-55°C to +125°C)
Mil-Std-883 M5004
Package Type
32J
32 Lead, Plastic J-Leaded Chip Carrier (PLCC)
24P6
24S
24 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
24 Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)
24D6
24-lead, 0.600" Wide, Non-Windowed, Ceramic Dual Inline Package (Cerdip)
Options
Blank
E
Standard Device: Endurance = 10K Write Cycles; Write Time = 1 ms
High Endurance Option: Endurance = 100K Write Cycles;
Rev 2
9/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
Packaging Information
32J, 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
24P6, 24-Lead, 0.600” Wide, Plastic Dual Inline
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-018 AA
Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-011 AA
.025(.635) X 30° - 45°
1.27(32.3)
1.24(31.5)
.045(1.14) X 45° PIN NO. 1
.012(.305)
PIN
1
IDENTIFY
.008(.203)
.530(13.5)
.553(14.0)
.490(12.4)
.566(14.4)
.530(13.5)
.547(13.9)
.032(.813)
.026(.660)
.021(.533)
.013(.330)
.595(15.1)
.585(14.9)
.090(2.29)
MAX
1.100(27.94) REF
.030(.762)
.015(3.81)
.095(2.41)
.060(1.52)
.140(3.56)
.120(3.05)
.050(1.27) TYP
.220(5.59)
MAX
.005(.127)
MIN
.300(7.62) REF
.430(10.9)
.390(9.90)
AT CONTACT
POINTS
SEATING
PLANE
.065(1.65)
.015(.381)
.022(.559)
.014(.356)
.161(4.09)
.125(3.18)
.065(1.65)
.041(1.04)
.110(2.79)
.090(2.29)
.022(.559) X 45° MAX (3X)
.630(16.0)
.590(15.0)
.453(11.5)
.447(11.4)
0
15
REF
.012(.305)
.008(.203)
.495(12.6)
.485(12.3)
.690(17.5)
.610(15.5)
24D6, 24-lead, 0.600" Wide, Non-Windowed,
Ceramic Dual Inline Package (Cerdip)
24S, 24-Lead, 0.300” Wide, Plastic Gull Wing Small
Outline (SOIC)
Dimensions in Inches and (Millimeters)
.020(.508)
.013(.330)
1.29(32.8)
1.24(31.5)
PIN
1
.610(15.5)
.510(13.0)
.299(7.60) .420(10.7)
.291(7.39) .393(9.98)
PIN 1 ID
.098(2.49)
MAX
1.100(27.94) REF
.005(.127)
MIN
.050(1.27) BSC
.225(5.72)
MAX
.616(15.6)
.105(2.67)
.598(15.2)
.092(2.34)
SEATING
PLANE
.200(5.08)
.060(1.52)
.015(.381)
.023(.584)
.014(.356)
.125(3.18)
.065(1.65)
.045(1.14)
.012(.305)
.003(.076)
.110(2.79)
.090(2.29)
.620(15.7)
.590(15.0)
0
15
REF
.013(.330)
.009(.229)
.015(.381)
.008(.203)
.050(1.27)
0
8
.700(17.8) MAX
REF
.015(.381)
Rev 2
10/12
2011
FT28C16
Parallel EEPROM 16K (2Kx8)
Revision History
Rev 1
Original
12/04/05
Rev 2 07/09/11 Removed 200 µs Write Time option
Rev 2
11/12
2011
Ashley Crt, Henley,
Marlborough, Wilts, SN8 3RH UK
Tel: +44(0)1264 731200
Fax:+44(0)1264 731444
E-mail
sales@forcetechnologies.co.uk
www.forcetechnologies.co.uk
Unless otherwise stated in this SCD/Data sheet, Force Technologies Ltd reserve th e right to make changes, without notice, in the products, Includ
-ing circuits, cells and/or software, described or contained herein in order to improve design and/or performance. Force Technologies resumes no
responsibility or liability for the use of any of these products, conveys no licence or any title under patent, copyright, or mask work to these
products, and makes no representation or warranties that these products are free f rom patent, copyright or mask work infringement, unless
otherwise specified.
Life Support Applications
Force Technologies products are not designed for use in life support appliances, devices or systems where malfunction of a Force Technologies
product can reasonably be expected to result in a personal injury. Force Technologies customers using or selling Force Technologies products
for use in such applications do so at their own risk and agree to fully indemnify Force Technologies for any damages resulting from such
improper use or sale.
Copyright Force Technologies Ltd 2011
All trademarks acknowledged
Rev 2
12/12
2011
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