AFCT-5179DZ [FOXCONN]
Transceiver, 1260nm Min, 1360nm Max, 125Mbps(Tx), 125Mbps(Rx), SC Connector, Through Hole Mount, ROHS COMPLIANT, PLASTIC PACKAGE-9;型号: | AFCT-5179DZ |
厂家: | FOXCONN |
描述: | Transceiver, 1260nm Min, 1360nm Max, 125Mbps(Tx), 125Mbps(Rx), SC Connector, Through Hole Mount, ROHS COMPLIANT, PLASTIC PACKAGE-9 |
文件: | 总8页 (文件大小:338K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AFCT-5179xZ
SC Duplex Single Mode Transceiver
Data Sheet
Description
Features
The AFCT-5179xZ transceiver is a high performance, cost •ꢀ SC duplex single mode transceiver
effective module for serial optical data communications
applications specified for a signal rate of 125 MBd. It is
designed for Fast Ethernet applications and is also com-
•ꢀ Single +3.3 V or +5 V power supply
•ꢀ Multisourced 1 x 9 pin configuration
patible with EFM baseline 100BASE-LX10 standard over
dual single mode fiber.
•ꢀ Manufactured in an ISO9001 certified factory
•ꢀ Aqueous washable plastic package
This module is designed for single mode fiber and
operates at a nominal wavelength of 1300 nm. It incor-
porates Avago Technologies’ high performance, reliable,
long wavelength optical devices and proven circuit tech-
nology to give long life and consistent service.
•ꢀ Interchangeable with LED multisourced 1 x 9 trans-
ceivers
•ꢀ Unconditionally eye safe laser IEC 825/CDRH Class 1
compliant
•ꢀ Designed for EFM (Ethernet in the First Mile) baseline
100Base-LX10 performance over dual single mode
fiber
The transmitter section uses a Multiple Quantum Well
laser with full IEC 825 and CDRH Class I eye safety.
The receiver section uses a planar PIN photodetector for
low dark current and excellent responsivity.
•ꢀ RoHS compliant
•ꢀ Two temperature ranges:
A pseudo-ECL logic interface simplifies interface to
external circuitry.
0° C to +70° C, AFCT-5179BZ/DZ
-40° C to +85° C, AFCT-5179AZ/CZ
Applications
•ꢀ Fast Ethernet
•ꢀ Ethernet in the First Mile
Connection Diagram
RECEIVER SIGNAL GROUND o 1
RECEIVER DATA OUT o 2
N/C
N/C
RECEIVER DATA OUT BAR o 3
SIGNAL DETECT o 4
Top View
RECEIVER POWER SUPPLY o 5
TRANSMITTER POWER SUPPLY o 6
TRANSMITTER DATA IN BAR o 7
TRANSMITTER DATA IN o 8
TRANSMITTER SIGNAL GROUND o 9
Pin Descriptions:
Pin 6 Transmitter Power Supply V T:
Pin 1 Receiver Signal Ground V :
CC
EER
Provide +3.3 V or +5 V DC via the recommended transmit-
ter power supply filter circuit. Locate the power supply
Directly connect this pin to the receiver ground plane.
Pin 2 Receiver Data Out RD:
filter circuit as close as possible to the V pin.
CC
See recommended circuit schematic, Figure 4.
Pin 7 Transmitter Data In Bar TD:
Pin 3 Receiver Data Out Bar RD:
See recommended circuit schematic, Figure 4.
See recommended circuit schematic, Figure 4.
Pin 8 Transmitter Data In TD:
Pin 4 Signal Detect SD:
See recommended circuit schematic, Figure 4.
Normal optical input levels to the receiver result in a logic
“1”output.
Pin 9 Transmitter Signal Ground V T:
EE
Directly connect this pin to the transmitter ground plane.
Low optical input levels to the receiver result in a fault
condition indicated by a logic “0”output.
Mounting Studs
The mounting studs are provided for mechanical attach-
ment to the circuit board. They are embedded in the
nonconductive plastic housing and are not tied to the
transceiver internal circuit and should be soldered into
plated-through holes on the printed circuit board.
This Signal Detect output can be used to drive a PECL
input on an upstream circuit, such as Signal Detect input
or Loss of Signal-bar.
Pin 5 Receiver Power Supply V R:
CC
Provide +3.3 V or +5 V DC via the recommended transmit-
ter power supply filter circuit. Locate the power supply
filter circuit as close as possible to the V pin.
CC
2
Functional Description
Receiver Section
Design
Terminating the Outputs
The receiver section contains an InGaAs/InP photo
detector and a preamplifier within the receptacle, coupled
to a postamplifier/decision circuit on a separate circuit
board.
The PECL Data outputs of the receiver may be terminated
with the standard Thevenin-equivalent 50 ohm to V
2 V termination.
–
CC
Other standard PECL terminating techniques may be
used.
The postamplifier is ac coupled to the preamplifier as illus-
trated in Figure 1. The coupling capacitor is large enough
to pass the EFM test pattern at 125 MBd without signifi-
cant distortion or performance penalty.
The two outputs of the receiver should be terminated
with identical load circuits to avoid unnecessarily large
ac current in V . If the outputs are loaded identically the
CC
Figure 1 also shows a filter network which limits the band-
width of the preamp output signal. The filter is designed
to bandlimit the preamp output noise and thus improve
the receiver sensitivity.
ac current is largely nulled. The Signal Detect output of
the receiver is PECL logic and must be loaded if it is to be
used. The Signal Detect circuit is much slower than the
data path, so the ac noise generated by an asymmetrical
load is negligible. Power consumption may be reduced by
using a higher than normal load impedance for the Signal
Detect output. Transmission line effects are not generally
a problem as the switching rate is slow.
These components will also reduce the sensitivity of the
receiver as the signal bit rate is increased above 155 MBd.
Noise Immunity
The receiver includes internal circuit components to filter
power supply noise. Under some conditions of EMI and
power supply noise, external power supply filtering may
be necessary. If receiver sensitivity is found to be degraded
by power supply noise, the filter network illustrated in
Figure 2 may be used to improve performance. The values
of the filter components are general recommendations
and may be changed to suit a particular system environ-
ment. Shielded inductors are recommended.
The Signal Detect Circuit
The Signal Detect circuit works by sensing the peak
level of the received signal and comparing this level to a
reference.
DATA OUT
FILTER
TRANS-
IMPEDANCE
PRE-
PECL
OUTPUT
BUFFER
LIMITING
AMPLIFIER
AMPLIFIER
DATA OUT
RECEIVER
RECEPTACLE
GND
PECL
OUTPUT
BUFFER
SIGNAL
DETECT
CIRCUIT
SD
Figure 1. Receiver Block Diagram
3.3 µH
FILTERED VCC to DATA LINK
VCC
100 nF
+
100 nF
10 µF
Figure 2. Filter Network for Noise Filtering
3
Transmitter Section
Design
LASER
PHOTODIODE
(rear facet monitor)
The transmitter section, Figure 3, uses a Multiple Quantum
Well laser as its optical source. The package of this laser is
designed to allow repeatable coupling into single mode
fiber. In addition, this package has been designed to be
compliant with IEC 825 Class 1 and CDRH Class I eye safety
requirements. The optical output is controlled by a custom
IC which detects the laser output via the monitor photo-
diode. This IC provides both dc and ac current drive to
the laser to ensure correct modulation, eye diagram and
extinction ratio over temperature, supply voltage and life.
DATA
DATA
LASER
MODULATOR
PECL
INPUT
LASER BIAS
DRIVER
PCB mounting
LASER BIAS
CONTROL
The AFCT-5179xZ has two solderable mounting studs,
Figures 5 and 6. These studs are not electrically connected.
The transceiver is designed for common production
processes. It may be wave soldered and aqueous washed
providing the process plug is in place.
Figure 3. Simplified Transmitter Schematic
Each process plug can only be used once during process-
ing, although with subsequent use, it can be used as a
dust cover.
NO INTERNAL
CONNECTION
NO INTERNAL
CONNECTION
TOP VIEW
VEER RD
RD SD VCCR VCCT TD
TD VEET
1
2
3
4
5
6
7
8
9
C1 C7
C3
C8 C2
VCC
L1 L2
R2 R3
VCC
C4
TERMINATE
AT THE
R5 R7
C5
R1
V
FILTER
R4
cc
DEVICE
AT V PINS
TRANSCEIVER
cc
C6
INPUTS
TERMINATION
AT
TRANSCEIVER
INPUTS
R6
R8
R10 R9
VCC
TD
TD
RD RD
SD
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT
THE INPUT OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER
PRINTED CIRCUIT BOARD WITH 50Ω MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 Ω
R2 = R3 = R5 = R7 = R9 = 82 Ω
C1 = C2 = 10 µF (see Figure 2)
C3 = C4 = C7 = C8 = 100 nF
C5 = C6 = 0.1 µF
L1 = L2 = 3.3 µH COIL OR FERRITE INDUCTOR.
Figure 4. Recommended Circuit Schematic
4
Regulatory Compliance
Feature
Test Method
Performance
Electrostatic Discharge
(ESD) to the Electrical Pins
MIL-STD-883F
Method 3015.7
Class 1 (> 1 kV) – Human Body Model
Electrostatic Discharge (ESD)
to the Duplex SC Receptacle
Variation of IEC 801-2
Products of this type, typically, withstand at least 15 kV
without damage when the Duplex SC Connector
Receptacle is contacted by a Human Body Model probe.
Electromagnetic
Interference (EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
Typically provide a 17 dB margin to the noted standard
limits up to 6 GHz, when tested in a GTEM cell with the
transceiver mounted to a circuit card with a chassis
enclosure.
VCCI Class 1
Immunity
Eye Safety
Variation of IEC 801-3
Typically show no measurable effect from a 10 V/m field
swept from 27 MHz to 1 GHz applied to the transceiver
without a chassis enclosure.
FDA CDRH 21-CFR 1040
Class I
CDRH Accession Number: 9521220-121
IEC 825 Issue 1 1993:11
Class 1
TUV Bauart License: 933/21201880/10
CENELEC EN60825 Class 1
Component Recognition
Underwriters Laboratories and
Canadian Standards Association
Joint Component Recognition
for Information Technology
Equipment Including Electrical
Business Equipment.
UL File#: E173874
Performance Specifications
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each
parameter in isolation, all other parameters having values within the recommended operating conditions. It should not
be assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposure
to the absolute maximum ratings for extended periods can adversely affect device reliability.
Parameter
Symbol
Minimum
Maximum
+85
Units
°C
Notes
Storage Temperature
TS
–
-40
0
–
1
1
--
–
–
–
–
Operating Temperature – AFCT-5179BZ/DZ
Operating Temperature – AFCT-5179AZ/CZ
Relative Humidity (Non condensing)
Lead Soldering Temperature/Time
Output Current (other outputs)
Input Voltage
+70
°C
–
-40
5
+80
°C
RH
–
95
%
–
+260/10
30
°C/s
mA
V
IOUT
0
GND
0
VCC
–
Power Supply Voltage
–
+6
V
Operating Enviroment
Parameter
Symbol
VCC
Minimum
+3.1
0
Maximum
+5.25
+70
Units
V
Notes
Power Supply Voltage
–
1
1
Ambient Operating Temperature – AFCT-5179BZ/DZ
Ambient Operating Temperature – AFCT-5179AZ/CZ
TOP
°C
TOP
-40
+85
°C
5
Transmitter Section
(Ambient Operating Temperature V = 3.1 V to 5.25 V)
CC
Parameter
Symbol
λC
Minimum
Typical
Maximum
Units
nm
Notes
Output Center Wavelength
Output Spectral Width (RMS)
Average Optical Output Power
Extinction Ratio
1260
–
–
1380
7.7
-8
–
–
2
–
3
4
–
–
–
–
–
–
5
5
∆λ
–
nm
PO
-15
6
–
dBm
dB
ER
–
–
Power Supply Current
Output Eye
ICC
–
50
140
mA
Compliant with eye mask IEEE Std 802.3ah- 2004
RIN
RIN12 (OMA)
TDP
–
-110
3.0
–
–
dB/Hz
dB
dB
µA
µA
mV
V
Transmitter Dispersion Penalty
Optical Return Loss
–
4
ORL
–
12
Data Input Current – Low
Data Input Current – High
Differential Input Voltage
Data Input Voltage – Low
Data Input Voltage – High
IIL
-350
–
–
–
IIH
–
350
–
VIH – VIL
VOL – VCC
VOH – CC
300
-2.0
-1.165
–
–
-1.475
-0.74
–
V
Notes:
1. 2 m/s air flow required.
2. Output power is power coupled into a single mode fiber.
3. The power supply current varies with temperature. Maximum current is specified at V = Maximum @ maximum temperature (not including
CC
terminations) and end of life.
4. Mask coordinates (X1, X2, X3, Y1, Y2, Y3, Y4) = (0.18, 0.29, 0.35,0.35, 0.38, 0.40, 0.55).
5. These inputs are compatible with 10 K, 10 KH and 100 K ECL and PECL inputs.
Receiver Section
(Ambient Operating Temperature V = 3.1 V to 5.25 V)
CC
Parameter
Symbol
Minimum
Typical
Maximum
Units
Notes
Receiver Sensitivity
–
–
–
–
–
–
-25
-31
dBm
dBm
6a
6b
Maximum Input Power
–
-8
–
–
dBm
–
–
–
–
–
7
8
8
8
8
Signal Detect – Asserted
Signal Detect – Deasserted
Signal Detect – Hysteresis AFCT-5179BZ/DZ
AFCT-5179AZ/CZ
PA
PD +0.5
-45
0.5
–
-25
–
dBm avg.
PD
–
dBm avg.
PA – PD
PA – PD
ICC
–
4.0
dB
dB
mA
V
0.5
–
5.0
Power Supply Current
–
55
–
100
-1.50
-0.74
-1.50
-0.74
Data Output Voltage – Low
VOL – VCC
VOH – VCC
VOL – VCC
VOH – VCC
-2.0
-1.1
-2.0
-1.1
Data Output Voltage – High
Signal Detect Output Voltage – Low
Signal Detect Output Voltage – High
Notes:
–
V
–
V
–
V
6a. Minimum sensitivity for IEEE 802.3ah test pattern with baseline wander.
6b. Minimum sensitivity and saturation levels for a FDDI test pattern as defined in FDDI SMF-PMDI with 4B/5B NRZI encoded data that contains a duty
23
cycle baseline wander effect of 50 kHz and a 2 -1 PRBS with 72 ones and 72 zeros inserted (ITU-T recommendation G.958).
7. The current excludes the output load current.
8. These outputs are compatible with 10 K, 10 KH and 100 K ECL and PECL outputs.
6
Drawing Dimensions
XXXX-XXXX
KEY:
Avago
ZZZZZ LASER PROD
Tech. 21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
RX
YYWW = DATE CODE
XXXX-XXXX = AFCT-5179
ZZZZ = 1300 nm
N.B. For shielded
module the label
is mounted on
the end as
TX
39.6
(1.56
12.7
(0.50)
4.7
(0.1ꢀ5
)
MAX.
shown.
)
AREA
RESERVED
FOR
25.4
(1.00
12.7
)
(0.50
)
MAX.
PROCESS
PLUG
2.5
(0.10
2.0 0.1
(0.079 0.004)
SLOT WIDTH
)
SLOT DEPTH
+0.1
0.25
-0.05
+0.004
-0.002
)
(0.010
9.ꢀ
(0.3ꢀ6)
MAX.
0.51
(0.020)
3.3 0.3ꢀ
(0.130 0.015)
20.32
(0.ꢀ00)
15.ꢀ 0.15
(0.622 0.006)
+0.25
-0.05
0.46
+0.25
-0.05
+0.010
9X ∅
+0.010
-0.002
1.27
(0.01ꢀ
)
2X ∅
(0.050
)
-0.002
ꢀX
20.32
(0.ꢀ00)
23.ꢀ
(0.937)
2.54
(0.100)
20.32
(0.ꢀ00)
14.5
(0.57)
1.3
(0.051)
2X
Masked insulator material (no metalization)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: X.XX
X.X
0.025 mm
0.05 mm
UNLESS OTHERWISE SPECIFIED.
Figure 5. Package Outline Drawing for AFCT-5179xZ
7
2 x Ø 1.9 0.1
(0.075 0.00ꢀ)
20.32
(0.800)
9 x Ø 0.8 0.1
(0.032 0.00ꢀ)
20.32
(0.800)
2.5ꢀ
(0.100)
TOP VIEW
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 6. Recommended Board Layout Pattern
Ordering Information
Handling Precautions
1. The AFCT-5179xZ can be damaged by current surges
or overvoltage. Power supply transient precautions
should be taken.
Temperature range 0° C to +70° C
AFCT-5179BZ
Black Case
AFCT-5179DZ Blue Case
2. Normal handling precautions for electrostatic sensitive
devices should be taken.
Temperature range -40° C to +85° C
AFCT-5179AZ
AFCT-5179CZ
Black Case
Blue Case
Class 1 Laser Product: This product conforms to the
applicable requirements of 21 CFR 1040 at the date of
manufacture
Date of Manufacture:
Avago Technologies Inc., No 1 Yishun Ave 7, Singapore
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes 5989-3824EN
AV02-3587EN - September 30, 2013
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