AOD4128 [FREESCALE]

N-Channel Enhancement Mode Field; N沟道增强型场


型号：	AOD4128
厂家：	Freescale
描述：	N-Channel Enhancement Mode Field N沟道增强型场
文件：	总6页 (文件大小：312K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AOD4128

N-Channel Enhancement Mode Field

Effect Transistor

General Description

The AOD4128 uses advanced trench technology to provide

excellent R_DS(ON), low gate charge and low gate resistance.

This device is ideally suited for use as a low side switch in

in PWM, load switching and general purpose applications.

Features

CPU core power conversion. The device can also be used

V_DS(V) = 25V

I_D= 60 A

_DS(ON)< 4 mΩ (V_GS= 10V)

R_DS(ON)< 7 mΩ (V_GS= 4.5V)

(V_GS= 10V)

Absolute Maximum Ratings T_A=25°C unless otherwise noted

Parameter

Symbol

V_DS

Maximum

Units

Drain-Source Voltage

Gate-Source Voltage

V_GS

±20

T_C=25°C

Continuous Drain

Current^G

Pulsed Drain Current ^C

Avalanche Current ^C

T_C=100°C

I_D

I_DM

I_AR

E_AR

165

Repetitive avalanche energy L=0.3mH ^C

304

T_C=25°C

P_D

Power Dissipation ^B

T_C=100°C

T_A=25°C

2.0

P_DSM

°C

Power Dissipation ^A

1.3

T_A=70°C

Junction and Storage Temperature Range

T_J, T_STG

-55 to 175

Thermal Characteristics

Parameter

Symbol

Typ

Max

Units

°C/W

Maximum Junction-to-Ambient ^A

t ≤ 10s

Steady State

R_θJA

Maximum Junction-to-Ambient ^A

Maximum Junction-to-Case ^B

R_θJC

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Electrical Characteristics (T_J=25°C unless otherwise noted)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

STATIC PARAMETERS

I_D=250uA, V_GS=0V

BV_DSS

Drain-Source Breakdown Voltage

_DS=25V, V_GS=0V

I_DSS

Zero Gate Voltage Drain Current

T_J=55°C

V_DS=0V, V_GS=±20V

V_DS=V_GS, I_D=250µA

V_GS=10V, V_DS=5V

I_GSS

Gate-Body leakage current

Gate Threshold Voltage

On state drain current

100

2.5

V_GS(th)

I_D(ON)

1.3

1.6

165

_GS=10V, I_D=20A

3.4

5.0

5.8

mΩ

R_DS(ON)

Static Drain-Source On-Resistance

T_J=125°C

V_GS=4.5V, I_D=20A

V_DS=5V, I_D=20A

I_S=1A, V_GS=0V

mΩ

g_FS

V_SD

I_S

Forward Transconductance

Diode Forward Voltage

Maximum Body-Diode Continuous Current^G

0.7

DYNAMIC PARAMETERS

C_iss

C_oss

C_rss

R_g

Input Capacitance

3578

731

438

2.5

4300

950

615

Ω

V_GS=0V, V_DS=12.5V, f=1MHz

Output Capacitance

Reverse Transfer Capacitance

Gate resistance

V_GS=0V, V_DS=0V, f=1MHz

SWITCHING PARAMETERS

Q_g(10V) Total Gate Charge

Q_g(4.5V) Total Gate Charge

61.8

29.8

8.5

V_GS=10V, V_DS=12.5V, I_D=20A

Q_gs

Q_gd

t_D(on)

t_r

Gate Source Charge

Gate Drain Charge

Turn-On DelayTime

Turn-On Rise Time

Turn-Off DelayTime

Turn-Off Fall Time

12.9

11.6

17.7

_GS=10V, V_DS=12.5V,

R_L=0.63Ω, R_GEN=3Ω

t_D(off)

t_f

t_rr

I_F=20A, dI/dt=100A/µs

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Q_rr

A: The value of R _θJAis measured with the device mounted on 1in ²FR-4 board with 2oz. Copper, in a still air environment with T _A=25°C. The

Power dissipation P_DSMis based on R _θJAand the maximum allowed junction temperature of 150°C. The value in any given application depends

on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.

B. The power dissipation P_Dis based on T_J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper

dissipation limit for cases where additional heatsinking is used.

C: Repetitive rating, pulse width limited by junction temperature T_J(MAX)=175°C.

D. The R _θJAis the sum of the thermal impedence from junction to case R _θJCand case to ambient.

E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.

F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming

a maximum junction temperature of T_J(MAX)=175°C.

G. The maximum current rating is limited by bond-wires.

H. These tests are performed with the device mounted on 1 in ²FR-4 board with 2oz. Copper, in a still air environment with T_A=25°C. The SOA

curve provides a single pulse rating.

*This device is guaranteed green after data code 8X11 (Sep 1^ST2008).

Re1: Sep. 2008

2/6

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

165

150

135

120

105

V_DS=5V

4.5V

10V

125°C

3.5V

25°C

V_GS=3V

-40°C

_DS(Volts)

V_GS(Volts)

Figure 1: On-Region Characteristics

Figure 2: Transfer Characteristics

8.0

7.0

6.0

5.0

4.0

3.0

2.0

1.8

1.6

1.4

1.2

I_D=20A

V_GS=10V

V_GS=4.5V

V_GS=10V

0.8

-50

100

150

200

_D(A)

Temperature (°C)

Figure 3: On-Resistance vs. Drain Current and

Gate Voltage

Figure 4: On-Resistance vs. Junction

Temperature

1.0E+02

1.0E+01

1.0E+00

1.0E-01

1.0E-02

I_D=20A

125°C

T_C=100°C

25°C

T =25°C

25°C

1.0E-03

-55 to 175

-40°C

1.0E-04

-40°C

1.0E-05

0.0

0.2

0.4

0.6

0.8

1.0

1.2

V_SD(Volts)

V_GS(Volts)

Figure 5: On-Resistance vs. Gate-Source Voltage

Figure 6: Body-Diode Characteristics

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

5000

4500

4000

3500

3000

2500

2000

1500

1000

500

V_DS=12.5V

I_D=20A

C_iss

C_oss

C_rss

Q_g(nC)

Figure 7: Gate-Charge Characteristics

_DS(Volts)

Figure 8: Capacitance Characteristics

1000

100

500

T_J(Max)=175°C

T_C=25°C

R_DS(ON)

limited

10us

400

300

200

100

100us

1ms

10ms

T_J(Max)=175°C

T_C=25°C

0.1

1E-05 1E-04 0.001 0.01

0.1

100

0.01

0.1

100

Pulse Width (s)

_DS(Volts)

Figure 10: Single Pulse Power Rating Junction-to-

Case (Note F)

Figure 9: Maximum Forward Biased Safe

Operating Area (Note F)

D=T_on/T

In descending order

D=0.5, 0.3, 0.1, 0.05, single pulse

T_J,PK=T_C+P_DM.Z_θJC.R_θJC

R_θJC=2°C/W

P_D

0.1

Single Pulse

T_on

0.01

0.00001

0.0001

0.001

0.01

Pulse Width (s)

Figure 16: Normalized Maximum Transient Thermal Impedance (Note F)

0.1

100

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

200

150

100

T_A=25°C

T_CASE(°C)

Figure 13: Power De-rating (Note B)

100

125

150

175

0.00001

0.0001

Time in avalanche, t_A(s)

Figure 12: Single Pulse Avalanche capability

0.001

100

500

400

300

200

100

125

150

175

1E-05 1E-04 0.001 0.01 0.1

100 1000

_CASE(°C)

Pulse Width (s)

Figure 15: Single Pulse Power Rating Junction-to-

Ambient (Note H)

Figure 14: Current De-rating (Note B)

D=T_on/T

In descending order

D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

T_J,PK=T_A+P_DM.Z_θJA.R_θJA

R_θJA=60°C/W

0.1

0.01

P_D

0.001

Single Pulse

0.001

T_on

0.0001

0.00001

0.0001

0.01

0.1

100

1000

Pulse Width (s)

Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)

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Gate Charge Test Circuit & Waveform

Vgs

10V

VDC

Qgs

Qgd

Vds

VDC

DUT

Vgs

Charge

Resistive Switching Test Circuit & Waveforms

Vds

90%

DUT

Vdd

Vgs

VDC

10%

Vgs

t_d(on)

t_d(off)

t_on

t_off

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms

E_AR= 1/2 LI_A²_R

BV_DSS

Vds

Vgs

Vds

Vgs

Vdd

I _AR

VDC

DUT

Vgs

Diode Recovery Test Circuit & Waveforms

Q_rr= - Idt

Vds +

Vds -

DUT

Vgs

t_rr

Isd

I _F

Isd

Vgs

dI/dt

I _RM

Vdd

VDC

Vdd

Vds

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