IRF3205Z [FREESCALE]
HEXFET® Power MOSFET; HEXFET®功率MOSFET
| 型号： | IRF3205Z |
| 厂家： | 
Freescale |
| 描述： | HEXFET® Power MOSFET |
| 文件： | 总12页 (文件大小：753K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRF3205Z/ZS/ZL
Features
HEXFET® Power MOSFET
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
D
VDSS = 55V
Repetitive Avalanche Allowed up to Tjmax
RDS(on) = 6.5mΩ
G
Description
ID = 75A
ThisHEXFET® PowerMOSFETutilizesthelatest
processing techniques to achieve extremely low
on-resistancepersiliconarea.Additionalfeatures
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features
combinetomakethisdesignanextremelyefficient
and reliable device for use in a wide variety of
applications.
S
D2Pak
TO-262
IRF3205ZL
TO-220AB
IRF3205Z
IRF3205ZS
Absolute Maximum Ratings
Parameter
Max.
110
78
Units
(Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
I
@ T = 25°C
C
D
D
D
@ T = 100°C
C
A
(Package Limited)
@ T = 25°C
C
75
440
170
DM
P
@T = 25°C
Power Dissipation
C
W
D
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
1.1
± 20
W/°C
V
V
GS
EAS (Thermally limited)
180
250
mJ
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (Tested )
IAR
See Fig.12a, 12b, 15, 16
A
Repetitive Avalanche Energy
EAR
mJ
T
J
Operating Junction and
-55 to + 175
T
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
300 (1.6mm from case )
10 lbf in (1.1N m)
Thermal Resistance
Parameter
Typ.
–––
Max.
0.90
–––
62
Units
°C/W
Rθ
JC
Junction-to-Case
Rθ
Rθ
Rθ
0.50
–––
CS
JA
JA
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
–––
40
Junction-to-Ambient (PCB Mount)
1 / 12
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IRF3205Z/ZS/ZL
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250μA
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
V
Breakdown Voltage Temp. Coefficient ––– 0.051 ––– V/°C Reference to 25°C, ID = 1mA
mΩ
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
4.9
–––
–––
–––
–––
–––
–––
76
6.5
4.0
VGS = 10V, ID = 66A
VDS = VGS, ID = 250μA
VDS = 25V, ID = 66A
VGS(th)
V
S
gfs
Forward Transconductance
71
–––
20
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
μA VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
250
200
-200
110
–––
–––
–––
–––
–––
–––
–––
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Qg
Qgs
Qgd
td(on)
tr
ID = 66A
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
21
nC VDS = 44V
VGS = 10V
30
18
VDD = 28V
Rise Time
95
ID = 66A
td(off)
tf
Turn-Off Delay Time
45
ns RG = 6.8 Ω
VGS = 10V
Fall Time
67
LD
Internal Drain Inductance
4.5
Between lead,
nH 6mm (0.25in.)
from package
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
VGS = 0V
Ciss
Input Capacitance
––– 3450 –––
Coss
Output Capacitance
–––
–––
550
310
–––
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
pF ƒ = 1.0MHz
Coss
––– 1940 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
–––
430
640
–––
–––
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
VGS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
Continuous Source Current
–––
–––
75
MOSFET symbol
S
(Body Diode)
A
showing the
I
Pulsed Source Current
–––
–––
440
integral reverse
SM
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
28
1.3
42
38
V
T = 25°C, I = 66A, V = 0V
SD
J
S
GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 66A, VDD = 25V
J F
rr
di/dt = 100A/μs
Q
t
25
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2 / 12
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IRF3205Z/ZS/ZL
1000
100
10
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
BOTTOM 4.5V
BOTTOM 4.5V
100
4.5V
4.5V
20μs PULSE WIDTH
20μs PULSE WIDTH
Tj = 25°C
Tj = 175°C
1
10
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
120
1000
T
= 175°C
J
T
= 25°C
J
100
80
60
40
20
0
T
= 175°C
J
100
10
1
T
= 25°C
J
V
= 10V
DS
20μs PULSE WIDTH
V
= 25V
20μs PULSE WIDTH
DS
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
0
20
40
60
80
100
I
Drain-to-Source Current (A)
V
, Gate-to-Source Voltage (V)
D,
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3 / 12
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IRF3205Z/ZS/ZL
6000
5000
4000
3000
2000
1000
0
20
V
= 0V,
= C
f = 1 MHZ
GS
I = 66A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
V
= 44V
DS
= C
rss
oss
gd
16
12
8
VDS= 28V
VDS= 11V
= C + C
ds
gd
Ciss
4
Coss
Crss
0
0
20
40
60
80
100
120
1
10
, Drain-to-Source Voltage (V)
100
Q
Total Gate Charge (nC)
G
V
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000.0
100.0
10.0
1.0
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100μsec
T
= 25°C
J
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0V
GS
0.1
0.1
1
10
100
1000
0.2
0.6
1.0
1.4
1.8
2.2
V
, Drain-toSource Voltage (V)
V
, Source-toDrain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4 / 12
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IRF3205Z/ZS/ZL
120
100
80
60
40
20
0
2.5
2.0
1.5
1.0
0.5
LIMITED BY PACKAGE
I
= 66A
D
V
= 10V
GS
25
50
75
100
125
150
175
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
T
, Case Temperature (°C)
C
, Junction Temperature (°C)
J
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current Vs.
Vs. Temperature
Case Temperature
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5 / 12
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IRF3205Z/ZS/ZL
350
15V
ID
TOP
27A
47A
300
250
200
150
100
50
BOTTOM 66A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
2V0GVS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
4.0
3.0
2.0
1.0
V
G
I
= 250μA
D
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
DUT
0
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
1K
T
J
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
6 / 12
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IRF3205Z/ZS/ZL
1000
100
10
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.05
0.10
1
0.1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
200
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
TOP
BOTTOM 10% Duty Cycle
= 66A
Single Pulse
I
160
120
80
40
0
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
25
50
75
100
125
150
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Fig 16. Maximum Avalanche Energy
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Vs. Temperature
7 / 12
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IRF3205Z/ZS/ZL
Driver Gate Drive
P.W.
Period
D =
D.U.T
Period
P.W.
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8 / 12
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IRF3205Z/ZS/ZL
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
- B -
3.78 (.149)
3.54 (.139)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
MIN
LEAD ASSIGNMENTS
1 - GATE
1
2
3
2 - DRAIN
3 - SOURCE
4 - DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
3X
3X
0.46 (.018)
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
AS S E MBL Y
LOT CODE
For GB Production
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
DAT E CODE
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
LOT CODE
9
9 / 12
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IRF3205Z/ZS/ZL
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
PART NUMBER
F530S
DAT E CODE
YEAR 0 = 2000
AS S E MB L Y
LOT CODE
WEEK 02
LINE L
For GB Production
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DATE CODE
LOT CODE
10 / 12
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IRF3205Z/ZS/ZL
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT
1- GATE
2- COLLEC-
TOR
TO-262 Part Marking Information
EXA
MPLE:
THIS
IS AN IRL3103L
LOT CODE 1789
PART NUMBER
ASSEMBLED ON WW 19, 1
997
IN THE ASSEMBL
Y LINE "C"
DATE CODE
YEAR 7 = 1997
ASSEMBLY
LOT CODE
WEE
K 19
LINE C
11 / 12
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IRF3205Z/ZS/ZL
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
26.40 (1.039)
24.40 (.961)
4
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Notes:
ꢀ
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.08mH
This value determined from sample failure population. 100%
tested to this value in production.
RG = 25Ω, IAS = 66A, VGS =10V. Part not
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
This is only applied to TO-220AB pakcage.
This is applied to D2Pak, when mounted on 1" square PCB (FR-
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
from 0 to 80% VDSS
.
TO-220AB package is not recommended for Surface Mount Application.
12 / 12
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相关型号：
IRF3205ZSTRL
Power Field-Effect Transistor, 75A I(D), 55V, 0.0065ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, PLASTIC, D2PAK-3
INFINEON
IRF3205ZSTRLPBF
Power Field-Effect Transistor, 75A I(D), 55V, 0.0065ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, LEAD FREE, PLASTIC, D2PAK-3
INFINEON
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