IRL3803 [FREESCALE]

HEXFET® Power MOSFET; HEXFET®功率MOSFET
IRL3803
型号: IRL3803
厂家: Freescale    Freescale
描述:

HEXFET® Power MOSFET
HEXFET®功率MOSFET

晶体 晶体管 开关 脉冲 局域网
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IRL3803  
HEXFET® Power MOSFET  
l Logic-Level Gate Drive  
l Advanced Process Technology  
l Ultra Low On-Resistance  
l Dynamic dv/dt Rating  
l 175°C Operating Temperature  
l Fast Switching  
D
VDSS = 30V  
RDS(on) = 0.006Ω  
G
l Fully Avalanche Rated  
Description  
ID = 140A  
S
Fifth Generation HEXFETs from International Rectifier  
utilize advanced processing techniques to achieve the  
lowestpossibleon-resistancepersiliconarea. Thisbenefit,  
combined with the fast switching speed and ruggedized  
device design that HEXFET Power MOSFETs are well  
knownfor, providesthedesignerwithanextremelyefficient  
device for use in a wide variety of applications.  
The TO-220 package is universally preferred for all  
commercial-industrial applications at power dissipation  
levelstoapproximately50watts. Thelowthermalresistance  
and low package cost of the TO-220 contribute to its wide  
acceptance throughout the industry.  
TO-220AB  
Absolute Maximum Ratings  
Parameter  
Max.  
140  
98ꢀ  
470  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current   
A
PD @TC = 25°C  
Power Dissipation  
200  
W
Linear Derating Factor  
1.3  
W/°C  
V
VGS  
EAS  
IAR  
Gate-to-Source Voltage  
±16  
Single Pulse Avalanche Energy ‚  
Avalanche Current  
610  
mJ  
A
71  
EAR  
dv/dt  
TJ  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt ƒ  
Operating Junction and  
20  
mJ  
V/ns  
5.0  
-55 to + 175  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
Mounting torque, 6-32 or M3 screw.  
°C  
300 (1.6mm from case)  
10 lbf•in (1.1N•m)  
Thermal Resistance  
Parameter  
Junction-to-Case  
Min.  
––––  
––––  
––––  
Typ.  
––––  
0.50  
Max.  
Units  
RθJC  
RθCS  
RθJA  
0.75  
––––  
62  
Case-to-Sink, Flat, Greased Surface  
Junction-to-Ambient  
°C/W  
––––  
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IRL3803  
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
30 ––– –––  
Conditions  
VGS = 0V, ID = 250µA  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA  
––– ––– 0.006  
––– ––– 0.009  
VGS = 10V, ID = 71A „  
VGS = 4.5V, ID = 59A „  
VDS = VGS, ID = 250µA  
VDS = 25V, ID = 71A  
VDS = 30V, VGS = 0V  
VDS = 24V, VGS = 0V, TJ = 150°C  
VGS = 16V  
RDS(on)  
Static Drain-to-Source On-Resistance  
VGS(th)  
gfs  
Gate Threshold Voltage  
1.0  
55  
––– –––  
––– –––  
V
S
Forward Transconductance  
––– ––– 25  
––– ––– 250  
––– ––– 100  
––– ––– -100  
––– ––– 140  
––– ––– 41  
––– ––– 78  
IDSS  
Drain-to-Source Leakage Current  
µA  
nA  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
IGSS  
VGS = -16V  
Qg  
ID = 71A  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
nC VDS = 24V  
VGS = 4.5V, See Fig. 6 and 13 „  
–––  
14 –––  
VDD = 15V  
––– 230 –––  
ID = 71A  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
–––  
–––  
29 –––  
35 –––  
RG = 1.3Ω, VGS = 4.5V  
RD = 0.20Ω, See Fig. 10 „  
Between lead,  
D
LD  
LS  
Internal Drain Inductance  
Internal Source Inductance  
––– 4.5 –––  
––– 7.5 –––  
6mm (0.25in.)  
nH  
pF  
G
from package  
and center of die contact  
VGS = 0V  
S
Ciss  
Coss  
Crss  
Input Capacitance  
––– 5000 –––  
––– 1800 –––  
––– 880 –––  
Output Capacitance  
VDS = 25V  
Reverse Transfer Capacitance  
ƒ = 1.0MHz, See Fig. 5  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
D
IS  
––– ––– 140ꢀ  
showing the  
A
G
ISM  
Pulsed Source Current  
(Body Diode)   
integral reverse  
––– ––– 470  
S
p-n junction diode.  
TJ = 25°C, IS = 71A, VGS = 0V „  
TJ = 25°C, IF = 71A  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.3  
––– 120 180  
––– 450 680  
V
ns  
Qrr  
ton  
nC di/dt = 100A/µs „  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
 Repetitive rating; pulse width limited by  
„ Pulse width 300µs; duty cycle 2%.  
max. junction temperature. ( See fig. 11 )  
‚ VDD = 15V, starting TJ = 25°C, L = 180µH  
Caculated continuous current based on maximum allowable  
RG = 25, IAS = 71A. (See Figure 12)  
ƒ ISD 71A, di/dt 130A/µs, VDD V(BR)DSS  
TJ 175°C  
junction temperature;for recommended current-handling of the  
package refer to Design Tip # 93-4  
,
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2 / 8  
IRL3803  
10000  
1000  
100  
10  
VGS  
15V  
10000  
1000  
100  
10  
TOP  
VGS  
12V  
TOP  
15V  
10V  
12V  
10V  
8.0V  
6.0V  
4.0V  
3.0V  
8.0V  
6.0V  
4.0V  
3.0V  
BOTTOM 2.0V  
BOTTOM 2.0V  
1
2.0V  
1
0.1  
0.1  
2.0V  
20µs PULSE W IDTH  
20µs PULSE W IDTH  
T
= 25°C  
J
0.01  
A
T
= 175°C  
J
0.01  
0.1  
1
10  
100  
A
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 2. Typical Output Characteristics,  
Fig 1. Typical Output Characteristics,  
TJ = 175oC  
TJ = 25oC  
2.0  
1.5  
1.0  
0.5  
0.0  
1000  
I
= 120A  
D
TJ = 25°C  
TJ = 175°C  
100  
10  
1
0.1  
0.01  
V
DS = 25V  
V
= 10V  
20µs PULSE W IDTH  
G S  
A
9.0A  
-60 -40 -20  
0
20  
40  
60  
80 100 120 140 160 180  
2.0  
3.0  
4.0  
5.0  
6.0  
7.0  
8.0  
T
J
, Junction Tem perature (°C)  
VG S , Gate-to-Source Voltage (V)  
Fig 4. Normalized On-Resistance  
Fig 3. Typical Transfer Characteristics  
Vs. Temperature  
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IRL3803  
15  
12  
9
10000  
8000  
6000  
4000  
2000  
0
I
= 71A  
V
C
C
C
= 0V ,  
f = 1M Hz  
D
G S  
iss  
= C  
= C  
= C  
+ C  
+ C  
,
C
SHORTE D  
gs  
gd  
ds  
gd  
ds  
V
V
= 24V  
= 15V  
D S  
D S  
rss  
oss  
C
C
iss  
gd  
oss  
6
C
rss  
3
FO R TEST CIRCUIT  
SEE FIGURE 13  
0
A
A
1
10  
100  
0
40  
80  
120  
160  
200  
V
, Drain-to-Source Voltage (V)  
Q
, Total Gate Charge (nC)  
DS  
G
Fig 5. Typical Capacitance Vs.  
Fig 6. Typical Gate Charge Vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
1000  
100  
10  
1000  
100  
10  
OPE RATION IN THIS AREA LIM ITE D  
BY R  
DS(on)  
10µs  
T
= 175°C  
J
100µs  
T
= 25°C  
J
1m s  
T
T
= 25°C  
= 175°C  
C
J
V
= 0V  
G S  
2.8  
S ingle Pulse  
10m s  
A
A
0.4  
0.8  
1.2  
1.6  
2.0  
2.4  
3.2  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
SD  
DS  
Fig 7. Typical Source-Drain Diode  
Fig 8. Maximum Safe Operating Area  
Forward Voltage  
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4 / 8  
IRL3803  
140  
120  
100  
80  
RD  
VDS  
LIMITED BY PACKAGE  
VGS  
D.U.T.  
RG  
+VDD  
-
4.5V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
60  
Fig 10a. Switching Time Test Circuit  
40  
V
DS  
20  
90%  
0
25  
50  
75  
100  
125  
150  
175  
°
, Case Temperature ( C)  
T
C
10%  
V
GS  
Fig 9. Maximum Drain Current Vs.  
t
t
r
t
t
f
d(on)  
d(off)  
Case Temperature  
Fig 10b. Switching Time Waveforms  
1
D = 0.50  
0.20  
0.1  
0.10  
0.05  
P
DM  
t
1
0.02  
0.01  
t
SINGLE PULSE  
(THERMAL RESPONSE)  
2
Notes:  
1. Duty factor D =  
t / t  
1 2  
2. Peak T = P  
x Z  
+ T  
C
J
DM  
thJC  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t , Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
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IRL3803  
1500  
1200  
900  
600  
300  
0
L
I
D
V
DS  
TOP  
29A  
50A  
71A  
D.U.T.  
BO TTO M  
R
+
-
G
V
DD  
I
4.5 V  
AS  
t
p
0.01Ω  
Fig 12a. Unclamped Inductive Test Circuit  
V
= 15V  
DD  
V
(BR)DSS  
A
175  
25  
50  
75  
100  
125  
150  
t
p
Starting T , Junction Tem perature (°C)  
J
V
DD  
Fig 12c. Maximum Avalanche Energy  
Vs. Drain Current  
V
DS  
I
AS  
Fig 12b. Unclamped Inductive Waveforms  
Current Regulator  
Same Type as D.U.T.  
50KΩ  
.2µF  
12V  
.3µF  
Q
G
+
4.5 V  
V
DS  
D.U.T.  
-
Q
Q
GD  
GS  
V
GS  
V
G
3mA  
I
I
D
G
Charge  
Current Sampling Resistors  
Fig 13b. Gate Charge Test Circuit  
Fig 13a. Basic Gate Charge Waveform  
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6 / 8  
IRL3803  
Peak Diode Recovery dv/dt Test Circuit  
+
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T  
ƒ
-
+
‚
-
„
-
+

RG  
dv/dt controlled by RG  
+
-
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
VDD  
Driver Gate Drive  
P.W.  
Period  
Period  
D =  
P.W.  
V
=10V  
*
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 14. For N-Channel HEXFETS  
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