MC44BS374T1A_技术文档

Freescale Semiconductor, Inc.

Advance Information

MC44BS374T1/374T1A

Rev. 1.2 11/2003

MC44BS374T1

PLL Tuned UHF and

VHF Audio/Video High

Integration Modulator

MC44BS374T1A

SO16NB Package

Ordering Information

Device

Temp Range

0°C to +70°C

Package

SO16NB

MC44BS374T1D,R2

MC44BS374T1AD,R2

NOTE: For tape and reel, add R2 suffix.

Contents

The MC44BS374T1 and MC44BS374T1A audio and video modulator are for use in VCRs,

1Features . . . . . . . . . . . . . . 2 set-top boxes, and similar devices. These products are the next generation of the

Comparing the

MC44BS374T1/374T1A to

the MC44BC374T1 . . . . . 2

MC44BC374T1 with the following new features:

•

TV output level 82dBuV typical for the MC44BS374T1A, 75 dBuV for the

MC44BS374T1

Pin Descriptions . . . . . . . . 3

Functional Overview . . . . . 4

Maximum Ratings . . . . . . . 5

Thermal Ratings . . . . . . . . . 5

Electrostatic Discharge . . . 5

Electrical Characteristics . 6

I2C Bit Mapping . . . . . . . . . 7

I2C Programming . . . . . . . . 8

•

5V and 3.3V compatible I²C bus

Logic Output Port pin (pin 3) available

Figure 1 shows the pin connections.

Modulator High Frequency

Characteristics . . . . . . 10

Video Characteristics . . . 11

Audio Characteristics . . . 13

Characterization

Measurement Conditions

14

GNDD

VCCD

SCL

SDA

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Modes of Operation . . . . . 20

High Speed I2C Compatible

Bus . . . . . . . . . . . . . . . . 24

PLLFLT

LOP

XTAL

TVOVCC

TVOUT

GND

Pin Circuit Schematics . . 27

Application Diagrams . . . 28

GND

Evaluation Board Schematic

and Layout . . . . . . . . . . 29

PREEM

AUDIO

VCCA

Packaging Instructions . . 31

Marking Instructions31

VIDEO

SPLFLT

SO16 pin package

Figure 1. MC44BS374T1 and MC44BS374T1A Pin Connections

This document contains information on a product under development. Motorola reserves the right to change or

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Features

1 Features

The MC44BS374T1/374T1A is a PAL/NTSC Modulator with integrated VCO.

The channel is set by an on-chip high-speed I²C compatible bus receiver. A Phase-Locked Loop (PLL)

tunes the modulator over the full UHF range.

The modulator incorporates a sound subcarrier oscillator and uses a second PLL to derive 4.5, 5.5, 6.0,

and 6.5MHz subcarrier frequencies. These frequencies are selectable by bus.

The picture-to-sound ratio may be adjusted using the bus. In addition, an on-chip video test pattern

generator can be switched ON with a 1KHz audio test signal.

The MC44BS374T1/374T1A have the following features:

•

Integrated on-chip programmable UHF oscillator

No external varicaps diodes/inductor or tuned components

Extremely low external components count

Channel 21-69 UHF operation

VHF range possible by internal dividers (30MHz-450MHz)

Boosted TV output level (82 dBuV typical) for the MC44BS374T1A

TV output level of 75 dBuV typical for the MC44BS374T1

•

High speed read and write I²C-bus compatible (800kHz)

•

I²C-bus 5V and 3.3V compatible

Fixed video modulation depth (82% typical)

Peak White Clip disabled by bus

Programmable picture/sound carrier ratio (12 dB and 16 dB)

Integrated on-chip programmable sound subcarrier oscillator (4.5, 5.5, 6.0 and 6.5 MHz) - No

external varicaps

•

On-chip video test pattern generator with sound test signal (1kHz)

Low-power programmable modulator standby mode

Transient output inhibit during PLL Lock-up at power-ON

Logical Output Port controlled by bus

Start-up on channel ‘71’ (871.25 MHz)

ESD protection, minimum 4 kV

2 Comparing the MC44BS374T1 and MC44BS374T1A to the

MC44BC374T1

Compared to the MC44BC374T1 devices, the MC44BS374T1/374T1A has the following improvements:

•

Higher output level for the MC44BS374T1A (82 dBuV versus 74.5 dBuV)

Higher Video signal to noise (+ 3 dB) for the MC44BS374T1A

•

I²C-bus 3.3V compatible

Lower power consumption in normal and standby modes (-2 mA)

2

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Pin Descriptions

•

The device can be powered down without holding the I²C lines down

Switch between the two integrated VCO’s controlled directly by the frequency divider (@ 700

MHz)

•

The external standby pin is no more required as the I²C lines are not hold down when the device is

not powered up.

•

The standby pin is replaced by the LOP Logic Ouput Port pin (pin 3)

Lower RF second harmonic spurious but higher third harmonic spurious. In the application it is

easier to filter UHF third harmonics spurious than second harmonics as these frequencies are always

out of the UHF band. Unfortunately the second harmonic can fall back into the same UHF band (for

instance channel 21 second harmonic). For this reason it is almost impossible to have a good

rejection of low UHF second harmonic with an external low pass filter. This is the reason why the

design has been optimized for a maximum second harmonic rejection in spite of an increase of the

third harmonic.

3 Pin Descriptions

Table 1. SO16 Package Pin Descriptions

Pin number

Pin Name

Description

1

2

SCL

SDA

I2C clock

I2C data

3

LOP

Logical output port controlled by I2C bus

Crystal

4

XTAL

5

GND

Ground

6

PREEMP

AUDIO

SPLFLT

VIDEO

VCCA

GND

Pre-emphasis capacitor

Audio input

7

8

Sound PLL loop filter

Video input

9

10

11

12

13

14

15

16

Main analog supply voltage

Analog ground

TVOUT

TVOVCC

PLLFLT

VCCD

GNDD

TV output signal

TV output stage supply voltage

RF PLL loop filter

Digital supply voltage

Digital ground

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Functional Overview

4 Functional Overview

Figure 2 shows a simplified block diagram of the MC44BS374T1/374T1A device.

The MC44BS374T1/374T1A device has three main sections:

1. A high speed I²C-compatible bus section

2. A PLL section to synthesize the UHF/VHF output channel frequency (from an integrated

UHF oscillator, divided for VHF output)

3. A modulator section, which accepts audio and video inputs, then uses them to modulate the

UHF/VHF carrier

An on-chip video test pattern generator with an audio test signal is included.

The MC44BS374T1/374T1A operates as a multi-standard modulator and can handle the following systems

using the same external circuit components: B/G, I, D/K, M/N.

High frequency BiCMOS technology allows integration of the UHF tank circuit and certain filtering

functions.

LOP

3

VIDEO SPLLFLT

9

8

MODULATOR

SECTION

Peak

White

Clip

I²C BUS

Clamp

31.25

kHz

Video

Modulator

7

6

AUDIO

Sound

Oscillator

and FM

Audio

Amplifier

Sound

PFD

PREEM

LPF

75

Ω

Modulator

TVOVCC 13

12

TVOUT

10 VCCA

Prog

Divider

LPF ALC

11

5

GND

LPF

FM

RF Sound

Modulator

BUS SECTION

VCO and PLL SECTION

VHF Dividers

UHF OSC

PLL

High Speed

SCL

SDA

1

2

I²C Bus

Prescaler/8

I²C BUS

Receiver

Prog

Divider

4MHz

XCO

Phase

Comp

Ref Divider

/128

31.25KHz

4

14

15

16

VCCD GNDD

PLLFLT

XTAL

Figure 2. MC44BS374T1/374T1A Simplified Block Diagram

4

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Maximum Ratings

5 Maximum Ratings

Sym

Parameter

Value Unit

This device contains protection circuitry to guard

Vcc

Supply voltage

6

V

against damage due to high static voltage or electric

fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated

voltages to this high impedance circuit. For proper

operation, input and output voltages should be

constrained to the ranges indicated in the

^oC

Tamin Minimum operating ambient temperature

Tamax Maximum operating ambient temperature

Tstgmin Minimum storage temperature

0

+70

-65

150

Tstgmax Maximum storage temperature

Recommended Operating Conditions.

Tj

Junction Temperature

Note: Maximum ratings are those values beyond which damage to the device may occur. For functional operation,

values should be restricted to the Recommended Operating Condition.

Note: Meets Moisture Sensitivity Level 1, no dry pack required.

6 Thermal Ratings

Sym

Parameter

Value

Unit

R_thja

Thermal resistance from Junction to Ambient

102

°C/W

7 Electrostatic Discharge

Electrostatic Discharge (ESD) tests are done on all pin

s

Sym

Parameter

Min

Unit

ESD

MM (Machine Model) - MIL STD 883C method 3015-7

400

V

HBM (Human Body Model) - MIL STD 883C method 3015-7

4000

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8 Electrical Characteristics

•

A = 100% tested

B = 100% Correlation tested

C = Characterized on samples

D = Design parameter

See Characterization conditions section for each C type parameter.

8.1 Operating Conditions

Unless otherwise stated: V_cc=5.0V, Ambient Temperture=25^oC, Video Input 1V_p-p, 10-step grayscale.

RF output into 75Ohm load.

NOTE:

Specifications only valid for envelope demodulation.

Table 2. Operating Conditions

Parameter

Min Typ Max Unit

Notes

Type

Operating supply voltage range

Total supply current

4.5

42

5.0

50

5.5

58

V

B

A

mA

All sections active

OSC=0, SO=1, ATT=1

Bus Section active

Total standby mode supply current

Test pattern sync pulse width

3

5

7

mA

A

B

4.7

6.5

µS

Sound comparator charge pump current

During locking

7

0.7

10

1

12

1.5

µA

A

When locked

RF comparator charge pump current

60

1

100

-

150

-

µA

A

D

Crystal oscillator stability-negative

resistance

KΩ

Logic Output Port

Saturation voltage at I=2mA

Leakage current

-

160

-

300

1

mV

µA

A

6

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I2C Bit Mapping

2

9 I C Bit Mapping

WRITE MODE

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ACK

CA-CHIP ADDRESS

C1-High Order Bits

C0-Low Order Bits

FM-High Order Bits

FL-Low Order Bits

1

0

1

0

1

0

ACK

SO

ATT

N11

N3

LOP

PS

X3

0

X2

X5

N7

X1

0

PWC

0

OSC

TPEN

N4

SFD1 SFD0

X4

N6

X0

N10

N2

N9

N1

N8

N0

N5

READ MODE

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ACK

CHIP ADDRESS

R-Status Byte

1

-

1

-

0

-

0

-

1

-

0

1

ACK

-

Y2

Y1

OOR

Bit Name

Description

PWC

OSC

ATT

Peak White Clip enable/disable

UHF oscillator ON/OFF

Modulator output attenuated-sound and video modulators ON/OFF

Sound subcarrier frequency control bits

Sound Oscillator ON/OFF

SFD0, 1

SO

LOP

Logic Output Port

PS

Picture-to-sound carrier ratio

TPEN

Test pattern enable-picture and sound

Test mode bits-All bits are 0 for normal operation (see Test Mode tables, page 6 & page 7) except

“OSC” bit (normal mode is “1”)

X5…X0

N0…N11

OOR

UHF frequency programming bits, in steps of 250kHz

RF oscillator out-of-frequency range information

RF oscillator operating range information

Y1, Y2

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I2C Programming

2

10 I C Programming

Sound

UHF

SFD1 SFD0

Sound Subcarrier Freq (MHz)

OSC

UHF Oscillator

Normal operation

0

1

0

1

0

1

4.5

5.5

6.0

6.5

1

0

UHF oscillator disabled (oscillator and PLL

sections bias turned OFF)

ATT

Modulator Output Attenuation

PS

Picture-to-Sound Ratio (dB)

0

Normal operation

0

1

12

16

Modulator output attenuation (sound and

video modulators sections bias turned OFF.

1

SO

Sound Oscillator

Standby Mode

0

Sound oscillator ON (Normal mode)

OSC

SO ATT

Combination of 3-bits

Sound oscillation disabled (oscillator and PLL

section bias turned OFF)

1

0

1

Modulator standby mode

Video

Logic Output Port

PWC

Peak White Clip

LOP

Description

0

1

Peak White Clip ON (System B/G)

Peak White Clip OFF (System L)

0

1

Pin 3 is low voltage

Pin 3 is high impedance

TPEN

Test Pattern Signal

0

1

Test pattern signal OFF (normal operation)

Test pattern signal ON (picture and sound)

WRITE MODE: Test Mode 1 and VHF Range

X2

X1

X0

State

Description

0

1

0

1

0

1

0

1

0

1

0

1

0

1.a

1.b

1.c

1.d

1.e

1.f

Normal operation

RF frequency divided for low frequency testing or VHF range: RF/2

RF/4

RF/8

RF/16

DC drive applied to modulators: Non-inverted video at TVOUT

DC drive applied to modulators: Inverted video at TVOUT

1.g

Transient output inhibit disabled (ie speed up mode)

During this speed-up test mode, ATT=0 forces sound current source to 1µA, and

ATT=1 forces it to 10µA.

1

1.h

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I2C Programming

WRITE MODE: Test Mode 2

X5

X4

X3

State

Description

0

1

2.a

2.b

Normal operation

Test pattern generator DC verification (Test pattern DC test mode available)

Program divider test (UHF program divider on PLLFILT pin and sound program

divider on SPLLFIL pin)

0

1

0

1

2.c

2.d

Reference divider test (UHF reference divider on PLLFILT pin)

UHF phase comparison, upper source on PLLFILT pin

Sound phase comparison 10µA upper source on SPLLFIL

(Only valid during transient output inhibit.)

1

0

1

2.e

2.f

UHF phase comparison, lower source on PLLFILT pin

Sound phase comparison 10µA lower source on SPLLFIL

(Only valid during transient output inhibit.)

Sound phase comparison 1µA upper source on SPLLFIL

(Not valid during transient output inhibit.)

1

0

1

2.g

2.h

Sound phase comparison 1µA lower source on SPLLFIL

(Not valid during transient output inhibit.)

NOTE:

Test modes 1 and 2 are intended for manufacturing test purposes only and

cannot be used for normal applications, except for VHF range (states 1.b

to 1.e).

READ MODE

OOR

Description

0

1

Normal operation, VCO in range

VCO out of range

Y1

Description

0

1

VCO out of range, frequency too low, only valid if OOR=1

VCO out of range, frequency too high, only valid if OOR=1

Y2

Description

0

1

High VCO is active

Low VCO is active

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MC44BS374T1A High Frequency Characteristics

11 MC44BS374T1A High Frequency Characteristics

Unless otherwise stated: V_cc=5.0V, Ambient Temperture=25^oC, Video Input 1V_p-p, 10-step grayscale.

RF inputs/outputs into 75Ohm load.

NOTE:

Specifications only valid for envelope demodulation.

Table 3. High Frequency Characteristics

Parameter

Test Conditions

Min Typ

Max

Unit

Type

Output signal from modulator section

See Figure 3. See Note 2

TVOUT output level

79

82

85

dBµV

B

UHF oscillator frequency

VHF range

460

45

-

880

460

MHz

A

B

From UHF oscillator internally divided

During transient output inhibit, or

when ATT bit is set to 1. See

Figure 3.

TVOUT output attenuation

65

75

-

dBc

B

See Note 2

Sound subcarrier harmonics

(Fp+n∗Fs)

Reference picture carrier. See Note 2

Using red EBU bar. See Note 2

Using red EBU bar.See Note 2

50

45

65

63

70

82

-

dBc

C

Second harmonic of chroma

subcarrier

Chroma/Soundintermodulation:

Fp+ (Fsnd- Fchr)

2nd harmonic: CH21

3rd harmonic: CH21

Other channels: See Figure 3.

See NOTE 1. See Note 2

-

38

58

50

70

Fo (picture carrier) harmonics

dBµV

C

Out band (picture carrier)

spurious

1/2∗Fo - 1/4∗Fo - 3/2∗Fo - 3/4∗Fo

From 40MHz to 1GHz. See Note 2

-

10

-

dBµV

C

No video sound modulation.See Note

2

In band spurious (Fo@5MHz)

65

75

dBc

Note: 1: Picture carrier harmonics are highly dependant on PCB layout and decoupling capacitors.

Note: 2: See “Characterization Measurement Conditions” on page 15.

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MC44BS374T1 High Frequency Characteristics

2Fo Harmonics

3Fo Harmonics

75

70

65

60

55

50

45

40

35

75

70

65

60

55

50

45

40

35

Maximum specification

Typical

471

521

571

621

671

721

771

821

871

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

TV Output Level

TV Output Attenuation

87

85

80

75

70

65

60

55

Maximum specification

Minimum specification

85

83

81

79

77

Typical

Minimum specification

471

521

571

621

671

721

771

821

871

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

Figure 3. Typical High Frequency Performance

12 MC44BS374T1 High Frequency Characteristics

Unless otherwise stated: V_cc=5.0V, Ambient Temperture=25^oC, Video Input 1V_p-p, 10-step grayscale.

RF inputs/outputs into 75Ohm load.

NOTE:

Specifications only valid for envelope demodulation.

Table 4. High Frequency Characteristics

Parameter

Test Conditions

Min Typ

Max

Unit

Type

TVOUT output level for

MC44BS374T1A

Output signal from modulator section

See Figure 3. See Note 2

75

dBµV

B

UHF oscillator frequency

VHF range

460

45

-

880

460

MHz

A

B

From UHF oscillator internally divided

During transient output inhibit, or

when ATT bit is set to 1. See

Figure 3.

TVOUT output attenuation

65

-

dBc

B

See Note 2

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Table 4. High Frequency Characteristics

Parameter

Test Conditions

Min Typ

Max

Unit

Type

Sound subcarrier harmonics

(Fp+n∗Fs)

Reference picture carrier. See Note 2

50

45

65

63

70

82

-

dBc

C

Second harmonic of chroma

subcarrier

Using red EBU bar. See Note 2

Using red EBU bar.See Note 2

-

dBc

C

Chroma/Soundintermodulation:

Fp+ (Fsnd- Fchr)

2nd harmonic: CH21

3rd harmonic: CH21

Other channels: See Figure 3.

See NOTE 1. See Note 2

-

32

52

46

64

Fo (picture carrier) harmonics

dBµV

C

Out band (picture carrier)

spurious

1/2∗Fo - 1/4∗Fo - 3/2∗Fo - 3/4∗Fo

From 40MHz to 1GHz. See Note 2

-

4

-

dBµV

C

No video sound modulation.See Note

2

In band spurious (Fo@5MHz)

65

75

dBc

Note: 1: Picture carrier harmonics are highly dependant on PCB layout and decoupling capacitors.

Note: 2: See “Characterization Measurement Conditions” on page 15.

2Fo Harmonics

3Fo Harmonics

75

70

65

60

55

50

45

40

35

75

70

65

60

55

50

45

40

35

Maximum specification

Typical

471

521

571

621

671

721

771

821

871

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

TV Output Level

TV Output Attenuation

87

85

80

75

70

65

60

55

Maximum specification

Minimum specification

85

83

81

79

77

Typical

Minimum specification

471

521

571

621

671

721

771

821

871

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

Figure 4. Typical High Frequency Performance

12

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Video Characteristics

13 Video Characteristics

Unless otherwise stated: V_cc=5.0V, Ambient Temperature=25^oC, Video Input 1V_p-p, 10-step grayscale.

RF output into 75Ohm load.

Note: Specifications only valid for envelope demodulation.

Table 5. Video Performance Characteristics

Parameter

Test Conditions

Min

Typ

Max

Unit

Type

Reference 0dB at 100kHz,

measured at 5MHz. See Note 2

Video bandwidth

-1.5

-0.8

-

dB

C

Video input level

75Ohm load

-

0.2

-

1.5

1

Vcvbs

µA

D

A

Video input current

Video input impedance

500

-

KΩ

Video Modulation depth for

video=1.4V_CVBS

Peak White Clip

90.5

94

97.5

%

B

No sound modulation,100% white video

Video S/N for the

MC44BS374T1A

Using CCIR Rec.567 weighting filter

See Figure 5. See Note 2

53

48

56

53

-

dB

C

Unweighted. See Note 2

No sound modulation,100% white video

Video S/N for the

MC44BS374T1

Using CCIR Rec.567 weighting filter

See Figure 5. See Note 2

53

56

-

dB

C

Unweighted. See Note 2

48

-5

53

-

C

Differential Phase

Differential Gain

CCIR Test Line 330, See Note 2

5

deg

%

-

6.8/

3.2

7.0/

3.0

7.2/

2.8

Luma/Sync ratio

Input ratio 7.0:3.0

-

B

Video modulation depth

See Figure 5. See Note 2

76

82

88

%

Note: 2: See “Characterization Measurement Conditions” on page 15.

Video Signal to Noise

(with CCIR Weighting filter)

62

60

Typical

58

56

54

52

50

48

Minimum specification

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

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Audio Characteristics

PAL Video Modulation Depth

90

88

Maximum specification

86

84

Typical

82

80

78

Minimum specification

76

74

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

Figure 5. Typical Video Performance

14 Audio Characteristics

Unless otherwise stated: V_cc=5.0V, Ambient Temperture=25^oC, Video Input 1V_p-p, 10-step grayscale.

RF inputs/outputs into 75Ohm load.

Note: Specifications only valid for envelope demodulation.

Table 6. Audio Performance Characteristics

Parameter

Test Conditions

Min

Typ

Max

Unit

Type

PS bit set to 0

PS bit set to 1

9

13

12

16

15

19

Picture-to-Sound ratio

dB

B

Using specific pre-emphasis circuit,

audio input level=205mVrms-audio frequency=1kHz

FM modulation: Fs=5.5, 6 or 6.5MHz

100% modulation=+/-50kHz FM

deviation

76

80

84

%

B

Audio modulation depth

Audio input resistance

FM modulation: NTSC Fs=4.5MHz

100% modulation=+/-25kHz FM

deviation

76

45

80

53

84

61

%

B

A

KΩ

Reference 0dB at 1kHz,

Audio Frequency

response

using specified pre-emphasis circuit,

measure from 50Hz to 15kHz

Depends on loop filter components

-2.0

-

+2.0

0.8

-

dB

%

C

Audio Distortion FM (THD

only)

at 1kHz, 100% modulation (±50kHz)

No video

0.2

54

Ref 1Khz, 50% modulation (+/-25Khz)

EBU color bars Video signal,

using CCIR 468.2 weighting filter

Audio S/N with Sync Buzz

FM

50

dB

Note: 2: See “Characterization Measurement Conditions” on page 15.

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Characterization Measurement Conditions

FM Audio Weighted Signal to Noise

58

56

54

52

50

48

46

Typical

Minimum specification

471

521

571

621

671

721

771

821

871

Frequency (Mhz)

Figure 6. Typical Audio Performance

15 Characterization Measurement Conditions

The following list shows the MC44BS374T1/374T1A default configuration unless otherwise specified.

•

Peak White Clip enabled

UHF oscillator ON

Sound and video modulators ON

Sound subcarrier frequency = 5.5 MHz

Sound Oscillator ON

Logic Output Port LOW

Picture-to-sound carrier ratio = 12 dB

Test pattern disabled

All test mode bits are ‘0’

Frequency from channel 21 to 69

RF Inputs / Output into 75ohm Load using a 75 to 50 ohm transformation. Video Input 1Vpp.

Audio pre-emphasis circuit enabled.

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Characterization Measurement Conditions

Table 7. Measurement Conditions

Measurement Set-up

Device and Signals Set-up

TVOUT output level

Measured picture carrier in dBuV with the HP8596E Spectrum

Analyzer using a 75 to 50 ohm transformation, all cables losses and

transformation pads having been calibrated.

Video: 10 steps grey scale

No audio

Measurement used as a reference for other tests: TVout_Ref

TVOUT output attenuation

Measure in dBc picture carrier at ATT=1 with reference to picture

carrier at ATT=0

ATT” bit = 1

No Video signal

No Audio signal

Sound Subcarrier Harmonics

Video: 10 steps grey scale

No Audio signal

Measure in dBc second and third sound harmonics levels in reference

to picture carrier (TVout_Ref).

Picture carrier

Sound carrier

Sound

2nd harm

Sound

3rd harm

Fo

+5.5MHz +11MHz +16.5MHz

Second Harmonics of Chroma subcarrier

No audio

Measure in dBc, in reference to picture carrier (TVout_Ref), second

Video: a 700m Vpp 100 kHz sinusoidal

signal is inserted on the black level of

active video area.

harmonic of chroma at channel frequency plus 2 times chroma

frequency, resulting in the following spectrum.

Picture carrier

Frequency

100Khz

Frequency

100kHz

700mVpkpk

700mV pk-pk

Sound

Chroma

carrier

Chroma 2nd

Harmonic

Fo

+4.43MHz +5.5MHz

+8.86MHz

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Characterization Measurement Conditions

Table 7. Measurement Conditions

Measurement Set-up

Device and Signals Set-up

Chroma/Sound Intermodulation

No audio signal

Measure in dBc, in reference to picture carrier (TVout_Ref),

intermodulation product at channel frequency plus the sound carrier

frequency (+5,5 MHz) minus the chroma frequency (-4,43 MHz),

resulting in the following spectrum.

Video: 700m Vpp 100 kHz sinusoidal

signal inserted on the black level of

active video area.This is generated using

a Rohde & Schwarz Video Generator

SAF and inserting the required frequency

from a RF Signal generator.

Intermodulation product is at the channel frequency +1,07 MHz.

Picture carrier

Sound

Chroma

carrier

Frequency

4.43 MHz

Frequency

100kHz

700mVpp

700mV pk-pk

Chroma/Sound

Intermod.

+1.07MHz

+4.43MHz +5.5MHz

Fo

Picture Carrier Harmonics

No Video signal

No Audio signal

Measure in dBc, in reference to picture carrier (TVout_Ref), second

and third harmonic of channel frequency, resulting in the following

spectrum.

Picture carrier

3rd harmonic

2nd harmonic

Fo

2Fo

3Fo

Out of Band Spurious

No Video signal

No Audio signal

Measure in dBuV spurious levels at 0.25, 0.5, 0.75 and 1.5 times

channel frequency, resulting in the following spectrum

Measure from 40MHz to 1GHz.

Picture carrier

Spurious

Fo/4

Fo/2 Fo*3/4

Fo

Fo*3/2

In Band Spurious

Measure in dBc, in reference to picture carrier (TVout_Ref), spurious

levels falling into video bandwidth starting from +/-100 KHz from the

picture carrier up to +/-5MHz.

No Video signal

No Audio signal

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Characterization Measurement Conditions

Table 7. Measurement Conditions

Measurement Set-up

Device and Signals Set-up

Video Bandwidth

The Video signal is demodulated on the spectrum analyzer, and the

peak level of the 100KHz signal is measured as a reference. The

frequency is then swept from 100KHz to 5MHz, and then the difference

in dB from the 100KHz reference level is measured.

No audio

Video: 600mVpp sinusoidal signal

inserted on the black level of active video

area.

Weighted Video Signal to Noise

Video: 100% White video signal - 1Vpk-

pk.

No Audio signal

The Video Analyzer measures the ratio between the amplitude of the

active area of the video signal (700mV) and the noise level in Vrms on

a video black level which is show below.

This is measured using a Rohde &

Schwarz AMFS UHF Demodulator in B/G

(using a CCIR Rec. 567 weighting

network, 100kHz to 5MHz band with

sound trap and envelope detection, and a

Rohde & Schwarz UAF Video Analyzer.

VideoS/N is calculated as 20 x log(700 /N) in dB.

N

noise level in Vrms

Unweighted Video Signal to Noise

Same as above.

Same as above with CCIR filter disabled.

Video Differential Phase

Video: 5 step Grey Scale- 1Vpk-pk.

No Audio signal

On line CCIR 330, the video analyzer DP measure consists of

calculating the difference of the Chroma phase at the black level and

the different chroma subcarrier phase angles at each step of the

greyscale. The largest positive or negative difference indicates the

distortion.

This is measured using a Rohde &

Schwarz AMFS UHF Demodulator in B/G

(using a CCIR Rec. 567 weighting

network, 100kHz to 5MHz band with

sound trap, and envelope detection, and

a Rohde & Schwarz UAF Video Analyzer.

the largest positive or negative difference

DIFF PHASE =

* 100%

the phase at position 0

The video analyzer method takes the worst step from the first 4 steps.

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Characterization Measurement Conditions

Table 7. Measurement Conditions

Measurement Set-up

Device and Signals Set-up

Video Differential Gain

Video: 5 step Grey Scale- 1Vpk-pk.

No Audio signal

On line CCIR 330 shown below, the video analyzer DG measure

consists of calculating the difference of the Chroma amplitude at the

black level and the different amplitudes at each step of the greyscale.

The largest positive or negative difference indicates the distortion.

This is measured using a Rohde &

Schwarz AMFS UHF Demodulator in B/G

(using a CCIR Rec. 567 weighting

network, 100kHz to 5MHz band with

sound trap and envelope detection, and a

Rohde & Schwarz UAF Video Analyzer.

3

5

1

0

2

4

5-step Greyscale with Chroma subcarrier superimposed

(not to scale), line CCIR 330.

the largest positive or negative difference

DIFF GAIN =

* 100%

the amplitude at position 0

The video analyzer method takes the worst step from the first 4 steps.

Video Modulation Depth

No Audio signal

Video: 10 step grey scale

This is measured using a HP8596E Spectrum Analyzer with a TV

Trigger option, allowing demodulation and triggering on any specified

TV Line. The analyzer is centred on the maximum peak of the Video

signal and reduced to zero Hertz span in Linear mode to demodulate

the Video carrier.

A(

A

m

( 6

V

-10mV)

)

B(mV)

B (0.6 - 3mV)

TV Line Demodulated by Spectrum Analyzer-BG standard

The Modulation Depth is calculated as (A-B)/A x 100 in%

Picture to Sound ratio

No Video signal

Measure in dBc sound carrier in reference to picture carrier

No Audio Signal

PS” bit set to 0 and 1

(TVout_Ref) for PS” bit=0 (PS=12dB typical) and for PS” bit=1

(PS=16dB),

Picture carrier

Sound carrier

Fo

+5.5Mhz

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Characterization Measurement Conditions

Table 7. Measurement Conditions

Measurement Set-up

Device and Signals Set-up

Audio Modulation Depth

Video Black Level

Audio signal: 1Khz, 205mVrms.

This is measured using a Rohde &

Schwarz AMFS Demodulator in B/G and

a HP8903A Audio Analyzer at 1kHz

The audio signal 205mV at 1kHz is supplied by the Audio Analyzer,

and the FM demodulated signal deviation is indicated on the

Demodulator in Khz peak.

This value is then converted in% of FM deviation, based on specified

standards.

Audio Frequency response

The audio signal 1KHz 100mV_rmsis supplied by the Audio Analyzer,

demodulated by the Demodulator and the audio analyzer measures

the AC amplitude of this demodulated audio signal: this value is taken

as a reference (0dB).

The audio signal is then swept from 50Hz to 15KHz, and demodulated

AC amplitude is measured in dB relative to the 1KHz reference.

Audio pre-emphasis and de-emphasis circuits are engaged, all audio

analyzer filters are switched OFF.

Video Black Level

Audio signal: 50Hz to 15KHz, 100mV_rms

This is measured using a Rohde &

Schwarz AMFS Demodulator in B/G and

a HP8903A.

Audio Distortion FM

The input arms detector of the Audio Analyzer converts the ac level of

the combined signal + noise + distortion to dc. It then removes the

fundamental signal (1kHz) after having measured the frequency. The

output rms detector converts the residual noise + distortion to dc. The

dc voltmeter measures both dc signals and calculates the ratio in% of

the two signals.

Audio: 1Khz, adjustable level

Video Black Level

This is measured using a Rohde &

Schwarz AMFS UHF Demodulator in B/G

and a HP8903A Audio Analyzer at 1kHz.

The output level of the Audio analyzer is

varied to obtain a deviation of 50kHz

indicated on the Demodulator.

ADist = (Distorsion + Noise) ⁄ (Distorsion + Noise + Signal)

Audio Signal to Noise

The Audio Analyzer alternately turns ON and OFF it's internal audio

source to make a measure of the Audio signal plus noise and then

another measure of only the noise.

The measurement is made using the internal CCIR468-2 Filter of the

Audio Analyzer together with the internal 30+/-2kHz (60dB/decade)

Lowpass filters.

The AMFS demodulator uses a quasi-parallel demodulation as is the

case in a normal TV set. In this mode the Nyquist filter is bypassed and

the video carrier is used without added delay to effectuate intercarrier

conversion. In this mode the phase noise information fully cancels out

and the true S/N can be measured.

Audio: 1Khz, adjustable level

Video: EBU Color Bars

This is measured using a Rohde &

Schwarz AMFS Demodulator in B/G and

a HP8903A Audio Analyzer at 1kHz. The

output level of the Audio analyzer is

varied to obtain a Modulation Deviation of

25kHz indicated on the AMFS

Demodulator.

ASN(dB) = 20 × log(Signal + Noise) ⁄ (Noise)

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Modes of Operation

16 Modes of Operation

16.1 Power ON Settings

At power-ON, the MC44BS374T1/374T1A is configured as follows:

Table 8. Power ON Settings

WRITE MODE

C1-High Order Bits

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ACK

1

0

1

0

1

0

ACK

C0-Low Order Bits

FM-High Order Bits

FL-Low Order Bits

0

N11

N3

N10

N2

N9

N1

N8

N0

N7

0

N6

0

N5

N4

Note: N0 to N11 are set to have UHF oscillator on channel 71 (871.25MHz).

Note: Peak White Clip is ON.

Note: Sound frequency is 5.5MHz.

Note: Logic Output Port is low voltage

Note: Picture to sound ratio is 12dB.

16.2 Power Supply

The three device Vccs (pins 10, 13 and 15) must be applied at the same time to ensure all internal blocks

are correctly biased. Do not bias any other pin before Vcc is applied to the MC44BS374T1/374T1A.

When all Vccs are switched to 0V, SDA and SCL pins are high impedance.

16.3 Standby modes

During standby mode, the modulator is switched to low power consumption. That is, the sound oscillator,

UHF oscillator, and the video and sound modulator section’s bias are internally turned OFF.

The I²C bus section remains active.

The MC44BS374T1/374T1A can be set to standby mode with a combination of 3 bits: OSC=0, SO=1 and

ATT=1

16.4 Transient Output Inhibit

To minimize the risk of interference to other channels while the UHF PLL is acquiring a lock on the

desired frequency, the Sound and Video modulators are turned OFF during a time out period for each of

the following two cases:

•

Power-ON from zero (i.e., all Vcc is switched from 0V to 5V).

UHF oscillator power-ON from OFF state (i.e., OSC bit is switched from 1 to 0)

There is a time-out of 263ms until the output is enabled. This lets the UHF PLL settle to its programmed

frequency. During the 263ms time-out, the sound PLL current source is set to 10µA typical to speed up the

locking time. After the 263ms time-out, the current source is switched to 1µA. Use care when selecting

loop filter components, to ensure the loop transient does not exceed this delay.

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Modes of Operation

For test purposes, it is possible to disable the 263ms delay using Test Mode1-State1.h (this is called speed

up mode).

16.5 UHF Oscillator-VHF range

The UHF oscillator is fully integrated and does not require any external components.

For low frequency testing or VHF range operation (test mode 1, states 1.b to 1.e), the UHF oscillator can

be internally divided by: 2, 4, 8, or 16.

16.6 UHF PLL Section

The reference divider is a fixed divide-by-128, resulting in a reference frequency of 31.25KHz with a

4.0MHz crystal.

The prescaler is a fixed divide-by-8 and is permanently engaged.

The programmable divider division-ratio is controlled by the state of control bits N0 to N11.

The divider-ratio N for a desired frequency F (in MHz) is given by:

F

8

128

4

--- --------

N =

×

with:

N = 2048 × N11 + 1024 × N10 + …… + 4 × N2 + 2 × N1 + N0

NOTE:

Programming a division-ratio N=0 is not allowed.

16.7 Logic Output Port (LOP)

The LOP pin controls any logic function. The primary applications for the LOP are to control an external

attenuator or an external switch, between the antenna input and TV output. A typical attenuator application

with PIN diode is shown in Figure 7. The LOP pin switches the PIN attenuator depending on the signal

strength of the Antenna Input. This reduces the risks of intermodulation in certain areas. The LOP can also

be used as an OFF position bypass switch or for other logic functions in the application.

Vcc

Antenna

Input

TV Out

LOP pin

Figure 7. Typical Attenuator Application with Pin Diode

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16.8 Video Section - Peak White Clip

Modes of Operation

The MC44BS374T1/374T1A requires the following for proper video functionality:

•

A composite video input with negative going sync pulses

A nominal level of 1Vpp

This signal is AC-coupled to the video input where the sync tip level is clamped.

The video signal is then passed to a Peak White Clip (PWC) circuit. The PWC circuit function soft-clips

the top of the video waveform, if the sync tip amplitude to peak white clip goes too high. This avoids

carrier over-modulation by the video. Clipping can be disabled by software.

16.9 Test Pattern Generator

The I²C generates a simple test pattern, which can be switched under bus control to permit a TV receiver to

easily tune to the modulator output. The pattern consists of two white vertical bars on a black background

and a 976 Hz audio test signal.

TE2

7/10

3/10

TE1

10

20 24 2830

40 44

50

60 64

0

TIME INµS.

Figure 8. Test Pattern Generator

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Modes of Operation

16.10 Sound Section

The oscillator is fully integrated and does not require any external components. An internal low-pass filter

and matched structure provide very low harmonics levels.

The sound modulator system consists of an FM modulator incorporating the sound subcarrier oscillator.

The audio input signal is AC-coupled into the amplifier, which then drives the modulator. The audio pre-

emphasis circuit is a high-pass filter with an external capacitor and an internal resistor (106KOhms

typical).

The recommended capacitor value for BG standard (with a time constant of 50µS) is 470 pF.

The recommended capacitor value for M/N standard (with a time constant of 75µS) is 750 pF.

To increase the audio bandwidth at low frequencies it is possible to change the sound PLL loop filter. The

recommended values are 220 nF and 22 nF. To increase the bandwidth at low frequencies (lower than 50

Hz) it is possible to use larger loop filter capacitor values. This will give a lower cut off frequency. In this

case it is necessary to calculate the new values of the loop filter according to the required Q factor and loop

bandwidth. This is described in the following figure:

Sound PLL loop filter calculation

1

Kpd * Kosc

N *C1

Loop filter equation :

ωo =

, Q =

, with :

R*C1*ωo

ωo = 3dB cut off frequency

Kpd = 1uA : Phase detector current

Kosc = 5MHz/V : sound oscillator slope (in fact Kosc=40MHz/prescaler divider

=8) This gives 5 MHz/V

N = sound divider ratio

Q = quality factor

C2, added to minimize glitches, is usually set to one tenth the size of C1.

Example :

Fref=31.25KHz Æ N=5.5MHz / 31.25KHz = 176

Assuming C1= 220 nF, then ωo = 360 rad, and fo= 57Hz

Q depends on the desired frequency response ; Choosing Q = 0.7 as a starting point,

then R= 18 kΩ. The resistance acts directly on the factor quality and can be adjusted to

create peaking on the low frequency range. It is recommended to adjust the value of R

experimentally depending on the application and requirements. In the proposed

application schematic a value of 15 kΩ has been chosen.

Figure 9. Sound PLL Loop Filter Calculation

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High Speed I2C Compatible Bus

2

17 High Speed I C Compatible Bus

17.1 Specification Conditions

Unless otherwise specified, Vcc=5.0V, TA=25^oC.

Electrical Characteristics

SDA / SCL output current at 0V

Symbol

Min Typ

Max

-

Unit Type

-5

-

-2

-

µA

A

B

V_IL

V_IH

SDA / SCL low input level

1.5

V

SDA / SCL high input level

2.1

-5

0

-

5

V

µA

V

B

C

D

C

SDA/SCL input current for input level from 0.4V to 0.3Vcc

SDA/SCL input level

Vcc+0,3

10

SDA/SCL capacitance

-

pF

V

ACK low output level (3 mA sinking current)

ACK low output level (9 mA sinking current)

-

0.3

-

0.8

V

Timing Characteristics

Bus clock frequency

Symbol

Min Typ

Max

Unit Type

0

-

800

kHz

ns

C

T_buf

Bus free time between stop and start

Setup time for start condition

Hold time for start condition

Data setup time

200

500

0

-

T_su;sta

T_hd;sta

T_su;dat

T_hd;dat

T_su;sto

T_hd;sto

T_ack;low

Data hold time

0

Setup time for stop condition

Hold time for stop condition

500

Acknowledge propagation delay

-

300

50

ns

C

SDA fall time at 3ma sink I and 130pF load

SDA fall time at 3ma sink I and 400pF load

80

SDA rise time

SCL fall/rise time

-

300

ns

C

Pulse width of spikes suppressed by the input filter

-

50

ns

C

17.2 Timing Definitions

Tbuf

Stop

Start

ACK

Stop

Start

Chip Address

SSDA

SSCL

...

SDA

SCL

SDA

SCL

Tsu;sto Thd;sta

Tsu;dat Thd;dat

Tack:low

Tsu;sta

Thd;sto

Figure 10. SSDA/SSCL Timing

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High Speed I2C Compatible Bus

17.3 Level Definitions

SDA/SCL high and low levels are designed to be compatible with 0-5V and 0-3.3V SDA / SCL signals.

Vcc

Vih

dead band

SDA

...

Vil

0V

Figure 11. SDA/SCL Levels

17.4 High Speed I²C Compatible Bus Format

SCL

1

2

3

4

5

6

7

8

9

10 11 12 13 14

16 17

15

18 19

44 45

Stop

STA

Chip Address ($CA)

First Data Byte (C1 or FM)

Data

ACK

SDA

2

Figure 12. I C Bus Timing

17.5 I²C Write Mode Format and Bus Receiver

It The bus receiver operates the I²C compatible data format. The chip address (I²C bus) is as follows.

2

Table 9. Chip Address (I C Bus)

1 1 0 0 1 0 1 0 (ACK) = $CA (hex) in write mode

In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45) is an acknowledge bit (ACK) during which

the MCU sends a logic 1 and the Modulator circuit answers on the data line by pulling it low. Besides the

chip address, the circuit needs two or four data bytes for operation. The following sequences of data bytes

are the permitted incoming information:

Table 10. Permitted Data Bytes (Incoming Information)

Example 1

Example 2

Example 3

Example 4

Note:

STA

CA

C1

FM

C1

FM

C0

FL

C0

FL

STO

FM

FL

C0

STO

C1

STA = Start condition

CA = Chip Address

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High Speed I2C Compatible Bus

Table 10. Permitted Data Bytes (Incoming Information)

FM = Frequency information, high order bits

FL = Frequency information, low order bits

CO = Control information, low order bits

C1 = Control information, high order bits

STO = Stop condition

After the chip address, two or four data bytes may be received.

•

If three data bytes are received, the third one is ignored.

If five or more data bytes are received, the fifth and following ones are ignored, and the last ACK

pulse is sent at the end of the fourth data byte.

The first and third data bytes contain a function bit, which lets the IC distinguish between frequency

information and control information. If the function bit is a logic 1, the two following bytes contain control

information. The first data byte after the chip address, may be byte CO or byte FM. The two bytes of

frequency information are preceded by a logic 0.

17.6 I²C Read Mode Format

The chip address (I²C) is:

2

Table 11. Chip Address (I C Read Mode)

1 1 0 0 1 0 1 1 (ACK) = $CB (hex) in read mode

The incoming information consists of the read mode chip address byte. The device then answers with an

ACK followed by one byte containing three bits of status information. No acknowledge is answered by the

modulator after this byte.

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Pin Circuit Schematics

18 Pin Circuit Schematics

VCCD

VCC

25K

50

SCL

SDA

1/2 VCCD

ACK

VCC

LOP

5K

XTAL

1.5K

VCC

50k

PREM

AUDIO IN

10k

audio

11.8k

VCC

TV OUT

VCC

5K

VCC

SPLLFLT

75

TVOVCC

VCC

100

VIDEO

PLLFLT

500

10K

2K

Figure 13. Pin Circuit Schematics

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Application Diagram

19 Application Diagram

This document contains information on a new product under development.

Motorola reserves the right to change or discontinue this product without notice.

Vcc

SDA SCL

O

2.2k

Note 2

22nF

16

1

SCL

GNDD

15

VCCD

2

SDA

3

14

LOP

PLLFLT

Note 3

47nF

O TVOUT

Cx

4

13

4MHz

XTAL

TVOVCC

10nF

Note 1

5

12

GND

TVOUT

1nF

Pre-em

6

11

PREEM

GND

470pF

7

10

Note 3

10nF

AUDIO

VCCA

8

9

SPLLFLT

VIDEO

220nF

10nF

100nF

15K

22nF

100nF

75

O

Vcc

O

Video

Audio

Figure 14. Proposed Application Schematic

Note: 1. Cx value depends on crystal characteristics. Cx = 27pF on Motorola application board.

Note: 2. RF PLL Loop Filter components at pin 14 must be as close as possible to Vccd at pin 15.

Note: 3. Supply voltage decoupling capacitors must be as close as possible to ground.

MOTOROLA

MC44BS374T1/374T1A Advance Information

29

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Evaluation Board Layout and Schematic

20 Evaluation Board Layout and Schematic

20.1 Evaluation Board Layout

Figure 15. Evaluation Board PCB Layout

30

MC44BS374T1/374T1A Advance Information

MOTOROLA

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Evaluation Board Layout and Schematic

20.2 Evaluation Board Schematic

Figure 16. Evaluation Board Schematic

MOTOROLA

MC44BS374T1/374T1A Advance Information

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Packaging Instructions

21 Packaging Instructions

Tape and reel packaging per 12MRH00360A issue Y with the following conditions applicable for Dual In-

Line SOP (SOIC) package.

Figure 17. Dual In-line SOP (SOIC)

Component Orientation: Arrange parts with the pin 1 side closest to the tape's round sprocket holes on the

tape's trailing edge.

22 Marking Instructions

Bar marked part way across Pin 1 end of package.

Bar width 10 to 20 mils, length to be at least four

times Bar width. Bar placement may extend across

MCBS374T1

chamfer and dimple areas.

AWLYWW

Pin 1 Dot or Dimple

•

1st line:

MCBS374T1 (Part number coded on 9 digits)

2nd line:

Assembly site code AW (2 digits) followed by the

wafer lot code L (1 digit),

year Y (1 digit) and

work week WW (2 digits)

Bar marked part way across Pin 1 end of package.

Bar width 10 to 20 mils, length to be at least four

times Bar width. Bar placement may extend across

chamfer and dimple areas.

MCBS374T1A

AWLYWW

Pin 1 Dot or Dimple

•

1st line:

MCBS374T1A (Part number coded on 10 digits)

2nd line:

Assembly site code AW (2 digits) followed by the

wafer lot code L (1 digit),

year Y (1 digit) and

work week WW (2 digits)

32

MC44BS374T1/374T1A Advance Information

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23 Case Outline

Note: 1. Dimensions and Tolerances per ASME

Y14.5M, 1994.

Millimeters

Dim

Inches

Min

Max

Min

Max

Note: 2. Controlling dimension: Millimeters.

Note: 3. Dimension D and E1 do not include mold

protrusion.

A

A1

D

E

1.35

0.1

1.75

0.25

10

0.054

0.004

0.385

0.229

0.150

0.014

0.008

0.068

0.009

0.393

0.244

0.157

0.019

0.009

Note: 4. Maximum mold protrusion 0.15 (0.006) per

side.

9.8

5.8

6.2

Note: 5. Dimension b does not include Dambar

protrusion.

Allowable Dambar protrusion shall be 0.127 (0.005)

total in excess of the b dimension at maximum material

condition.

E1

b

3.8

4

0.35

0.19

0.49

0.25

c

e

1.27 BSC

0.050 BSC

L

0.4

1.25

0.5

0.016

0.010

0.049

0.019

h

0.25

0^o

7^o

0^o

7^o

Q

Figure 18. SO16NB package

For More Information On This Product,

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Freescale Semiconductor, Inc.

Information in this document is provided solely to enable system and software implementers to

HOW TO REACH US:

use Motorola products. There are no express or implied copyright licenses granted hereunder to

design or fabricate any integrated circuits or integrated circuits based on the information in this

document.

USA/EUROPE/LOCATIONS NOT LISTED:

Motorola Literature Distribution;

P.O. Box 5405, Denver, Colorado 80217

1-303-675-2140 or 1-800-441-2447

Motorola reserves the right to make changes without further notice to any products herein.

Motorola makes no warranty, representation or guarantee regarding the suitability of its products

for any particular purpose, nor does Motorola assume any liability arising out of the application or

use of any product or circuit, and specifically disclaims any and all liability, including without

limitation consequential or incidental damages. “Typical” parameters which may be provided in

Motorola data sheets and/or specifications can and do vary in different applications and actual

performance may vary over time. All operating parameters, including “Typicals” must be validated

for each customer application by customer’s technical experts. Motorola does not convey any

license under its patent rights nor the rights of others. Motorola products are not designed,

intended, or authorized for use as components in systems intended for surgical implant into the

body, or other applications intended to support or sustain life, or for any other application in which

the failure of the Motorola product could create a situation where personal injury or death may

occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized

application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries,

affiliates, and distributors harmless against all claims, costs, damages, and expenses, and

reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that Motorola

was negligent regarding the design or manufacture of the part.

JAPAN:

Motorola Japan Ltd.; SPS, Technical Information Center,

3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan

81-3-3440-3569

ASIA/PACIFIC:

Motorola Semiconductors H.K. Ltd.; Silicon Harbour

Centre, 2 Dai King Street, Tai Po Industrial Estate,

Tai Po, N.T., Hong Kong

852-26668334

TECHNICAL INFORMATION CENTER:

1-800-521-6274

HOME PAGE:

http://www.motorola.com/semiconductors

Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. All other

product or service names are the property of their respective owners. Motorola, Inc. is an Equal

Opportunity/Affirmative Action Employer.

MC44BS374T1/374T1A

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型号：	MC44BS374T1A
厂家：	Freescale
描述：	PLL Tuned UHF and VHF Audio/Video High Integration Modulator 锁相环调谐UHF和VHF音频/视频高集成调制器
文件：	总34页 (文件大小：453K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MC44BS374T1A [FREESCALE]

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