P1022DS

更新时间:2025-06-28 12:18:17
品牌:FREESCALE
描述:Integrated media and communications processor development system

P1022DS 概述

Integrated media and communications processor development system 综合媒体通信处理器开发系统

P1022DS 数据手册

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•ꢀ 36-bitꢀphysicalꢀaddressing,ꢀDP-FPU  
         
QorIQ Multicore Processor Development  
P1022DS  
Integrated media and communications  
processor development system  
The P1013 is a single-core version  
of the P1022. The P1022 processor  
also integrates an optional hardware  
encryption block that supports different  
algorithms for high-performance data  
that is critical for supporting secure  
communications. Devices marked  
with an E include a security engine.  
The P1022 also includes integrated  
dualꢀSATAꢀcontrollers,ꢀLCDꢀinterfaceꢀ  
Overview  
The P1022/P1013 development system  
(P1022DS) is ideal for hardware and software  
development for embedded applications. It  
leverages the highly integrated QorIQ P1022  
processor, a Freescale Energy-Efficient  
product solution, and leading-edge external  
components.  
The high level of integration in the P1022  
processor helps to lower system costs,  
improve performance and simplify board  
design. The P1022 processor supports:  
2
and I S/TDM audio interface, as well  
as advanced power management  
capabilities for Energy Star guidelines  
with less than 300 mW deep sleep  
power dissipation.  
Dual e500 Cores Built on Power  
Architecture Technology  
®
•ꢀ 800–1067ꢀMHz  
Aꢀboardꢀsupportꢀpackageꢀ(BSP)ꢀisꢀpre-  
installedꢀonꢀtheꢀP1022DS.ꢀThisꢀBSPꢀ  
•ꢀ 256ꢀKBꢀfrontsideꢀL2ꢀcacheꢀwithꢀECC,ꢀ  
hardware cache coherent  
consists of a boot loader (u-boot) and a  
genericꢀPowerꢀArchitectureꢀtechnologyꢀsystemꢀ  
System Unit  
®
basedꢀonꢀtheꢀLinux kernel. The u-boot binary  
•ꢀ 64-/32-bitꢀDDR2/DDR3ꢀwithꢀECC  
•ꢀ IntegratedꢀSECꢀ3.3ꢀsecurityꢀengineꢀ  
•ꢀ Open-PICꢀinterruptꢀcontroller,ꢀperformanceꢀ  
andꢀtheꢀLinuxꢀkernelꢀresideꢀinꢀtheꢀon-boardꢀ  
flash memory with a file system pre-installed  
on the hard disk shipped in the P1022DS  
development system.  
2
monitor, 2 x I C,ꢀtimers,ꢀ16ꢀGPIOs,ꢀDUART  
•ꢀ 16-bitꢀenhancedꢀlocalꢀbusꢀsupportsꢀbootingꢀ  
fromꢀNANDꢀflashꢀmemory  
TheꢀP1022DSꢀBSPꢀgenerationꢀtakesꢀadvantageꢀ  
ofꢀtheꢀLinuxꢀTargetꢀImageꢀBuilderꢀ(LTIB),ꢀaꢀ  
suite of tools that leverages existing open  
source configuration scripts and source code  
packages,ꢀcombiningꢀthemꢀallꢀintoꢀaꢀsingleꢀBSPꢀ  
generation bundle. The source code packages  
includeꢀbootꢀloaderꢀandꢀLinuxꢀkernelꢀsourcesꢀ  
as well as many user-space source code  
Many third-party applications are available  
for the P1022DS. They are typically built  
onꢀtopꢀofꢀtheꢀBSPꢀdeliveredꢀbyꢀFreescaleꢀ  
and can be installed on the hard disk. To  
see demonstrations or to acquire details of  
Freescale’s third-party applications for this  
platform, please contact your local Freescale  
sales office.  
•ꢀ UpꢀtoꢀtwoꢀUSBꢀ2.0ꢀhostꢀcontrollerꢀwithꢀ  
ULPIꢀinterface  
•ꢀ SPIꢀcontrollerꢀsupportsꢀbootingꢀfromꢀSPIꢀ  
serial flash memory  
•ꢀ SD/MMCꢀcardꢀcontrollerꢀsupportsꢀbootingꢀ  
from flash cards  
packagesꢀtoꢀbuildꢀaꢀcompleteꢀBSP.ꢀTheꢀLTIBꢀ  
also provides compiler packages, required to  
buildꢀtheꢀBSP.ꢀFreescaleꢀdevelopersꢀuseꢀtheꢀ  
LTIBꢀtoꢀcreateꢀBSPsꢀforꢀaꢀmultitudeꢀofꢀFreescaleꢀ  
developmentꢀmarkets.ꢀTheꢀLTIBꢀleveragesꢀ  
asꢀmanyꢀBSPꢀelementsꢀasꢀpossibleꢀforꢀtheꢀ  
Freescale markets supported, while offering the  
flexibilityꢀnecessaryꢀtoꢀcustomizeꢀcomponentsꢀ  
that require platform-specific modifications.  
•ꢀ Upꢀtoꢀtwoꢀ10/100/1000ꢀEthernetꢀcontrollersꢀ  
(eTSEC)ꢀwithꢀJumboꢀFrameꢀsupport,ꢀSGMIIꢀ  
interface  
•ꢀ Enhancedꢀfeatures:ꢀParser/filer,ꢀQOS,ꢀ  
IP-checksum offload, lossless flow control  
®
•ꢀ IEEE ꢀ1588ꢀv2ꢀsupport  
®
•ꢀ ThreeꢀPCIꢀExpress 1.0a controllers  
•ꢀ TwoꢀSATAꢀcontrollers  
2
•ꢀ I S/TDM interface  
•ꢀ LCDꢀinterface  
•ꢀ Packetꢀlosslessꢀdeepꢀsleep  
P1022DS Block Diagram  
Security  
Acceleration  
(optional)  
DDR3  
DIMM  
DDR2/DDR3  
SDRAM  
Controller  
e500 Core  
e500 Core  
256 KB  
L2 Cache  
32 KB  
32 KB  
32 KB  
32 KB  
L1 I-Cache L1 D-Cache  
L1 I-Cache L1 D-Cache  
XOR  
I2C  
PMBus GVDD/VREF  
PMBus VDD  
RJ11  
x4  
SLIC  
x2  
EN  
OK  
TDM  
SSI  
Coherency Module  
System Bus  
PMBus SVDD/XVDD  
PMBus OVDD  
I2S  
Codec  
Line  
In/Out  
Touch Screen  
SPI Flash  
SPI  
On-Chip Network  
10/100/  
1G  
PHY  
Dual  
RJ45  
2 x Gigabit  
Ethernet  
2 x  
USB  
2 x  
SATA  
SDHC  
SD Card  
SD Card  
3 x PCI Express® 2-ch. DMA Controller  
4-lane SerDes  
2-lane SerDes  
DVI Encoder  
DVI  
DIU  
LVDS Encoder  
Single Link  
DFP  
ATX  
USB  
Chassis  
Header  
ULPI  
ULPI  
Enhanced  
Local Bus  
Controller  
(eLBC)  
NOR Flash  
PROMJET  
PIXIS  
NAND Flash  
PCI Express x1/x2/x4  
PCI Express x2  
SATA  
SATA  
PCI Express x1 slot/MiniPCI  
Optional  
2
•ꢀ DualꢀI C  
•ꢀ Powerꢀsupplies  
P1022 Development System  
•ꢀ Dualꢀ(internalꢀandꢀexternal)ꢀSDHCꢀslot  
•ꢀ USB:ꢀTwoꢀUSBꢀinterfaces  
•ꢀ UARTs:ꢀTwoꢀDB9ꢀconnectors  
•ꢀ SATA2  
ꢀ PMBusꢀcontrolledꢀsuppliesꢀforꢀVDD,ꢀ  
SVDD/XVDD,ꢀOVDDꢀandꢀGVDDꢀ  
•ꢀ P1022ꢀQorIQꢀcommunications processor,  
builtꢀonꢀPowerꢀArchitectureꢀtechnology  
•ꢀ Video  
•ꢀ Memory  
ꢀ InternalꢀLVDSꢀencoderꢀattachedꢀ  
800ꢀxꢀ600ꢀ8"ꢀLCDꢀpanelꢀorꢀDVIꢀ  
ꢀ 64-bitꢀdual-rankꢀDDR3ꢀDIMMꢀwithꢀ8-bitꢀ  
ECCꢀsupport  
•ꢀ TDM:ꢀDualꢀSLICꢀinterfaces  
•ꢀ GPIO:ꢀ16  
•ꢀ Audio  
ꢀ 128ꢀMBꢀNORꢀflashꢀmemory  
ꢀ 1ꢀGBꢀ2K-blockꢀNANDꢀflashꢀmemory  
ꢀ 16ꢀMBꢀSPIꢀROM  
2
ꢀ Stereoꢀ24-bitꢀI S audio with headphone  
•ꢀ Twoꢀ10/100/1000ꢀEthernetꢀconnectors  
•ꢀ Systemꢀlogicꢀ(PixisꢀFPGA)  
Manages system reset sequencing  
output and microphone input  
•ꢀ Documentation  
ꢀ 256BꢀNVRAM  
ꢀ Referenceꢀmanualꢀ  
•ꢀ PCIꢀExpress:ꢀThreeꢀPCIꢀExpressꢀinterfaces  
Manages system bus clock speed  
selections  
Schematics  
•ꢀ SATA:ꢀTwoꢀindependentꢀSATAꢀ2.0ꢀ  
ꢀ Billꢀofꢀmaterials  
controllers  
Implements registers for system control  
and monitoring  
ꢀ Board-relatedꢀdocumentation  
ꢀ Configurationꢀguide  
•ꢀ Softwareꢀtools  
•ꢀ Ethernet:ꢀTwoꢀ10/100/1000MbpsꢀPHYsꢀ  
usingꢀRGMIIꢀinterfaces  
•ꢀ SystemꢀandꢀDDRꢀclock  
•ꢀ IEEEꢀ1588  
ꢀ Canꢀbeꢀindependentlyꢀsetꢀtoꢀoneꢀofꢀeightꢀ  
commonꢀsettingsꢀinꢀtheꢀintervalꢀ66ꢀMHz–ꢀ  
166ꢀMHz  
ꢀ Clockꢀinputꢀfromꢀprecisionꢀoscillator  
ꢀ Linuxꢀ2.6.xꢀkernel  
ꢀ CrossꢀcompileꢀandꢀnativeꢀGNUꢀtoolꢀchain  
ꢀ CodeWarriorꢀUSBꢀTAP  
Learn More:  
For current information about Freescale  
products and documentation, please visit  
freescale.com/QorIQ.  
Freescale,ꢀtheꢀFreescaleꢀlogoꢀandꢀCodeWarriorꢀareꢀtrademarksꢀofꢀFreescaleꢀSemiconductor,ꢀInc.,ꢀReg.ꢀU.S.ꢀPat.ꢀ&ꢀTm.ꢀOff.ꢀ  
TheꢀEnergy-EfficientꢀSolutionsꢀlogoꢀandꢀQorIQꢀareꢀtrademarksꢀofꢀFreescaleꢀSemiconductor,ꢀInc.ꢀAllꢀotherꢀproductꢀorꢀserviceꢀ  
namesꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.ꢀTheꢀPowerꢀArchitectureꢀandꢀPower.orgꢀwordꢀmarksꢀandꢀtheꢀPowerꢀandꢀ  
Power.org logos and related marks are trademarks and service marks licensed by Power.org.  
© 2010, 2011 Freescale Semiconductor, Inc.  
DocumentꢀNumber:ꢀP1022DSFSꢀ/ꢀREVꢀ1  

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