FTK5N50D [FS]
4.4A, 500V, 1.5Ω N-CHANNEL POWER MOSFET;
| 型号： | FTK5N50D |
| 厂家： | 
First Silicon Co., Ltd |
| 描述： | 4.4A, 500V, 1.5Ω N-CHANNEL POWER MOSFET |
| 文件： | 总7页 (文件大小：373K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR
FTK5N50P/F/DD/D/I
TECHNICAL DATA
4.4A, 500V, 1.5Ω
Power MOSFET
N-CHANNEL POWER MOSFET
DESCRIPTION
I :
1
TO - 251
FTK5N50 is 500V High voltage N-Channel enhancement
mode power MOS-FET chip fabricated in advanced
silicon epitaxial planar technology;
D :
1
TO - 252
Advanced termination scheme to provide enhanced voltage-
blocking capability;
DD :
1
Avalanche Energy Specified;
TO-263
Source-to-Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode;
P :
FTK5N50 product is widely used in AC-DC power
suppliers, DC-DC converters and H-bridge PWM motor
drivers.
1
TO - 220
F :
1
TO - 220F
FEATURES
* 4.4A, 500V, RDS(ON)=1.5Ω
* Single Pulse Avalanche Energy Rated
* Rugged - SOA is Power Dissipation Limited
* Fast Switching Speeds
SYMBOL
D
* Linear Transfer Characteristics
* High Input Impedance
G
S
ORDERING INFORMATION
Pin Assignment
Packing
Ordering Number
Package
1
2
3
FTK5N50P
FTK5N50F
FTK5N50DD
FTK5N50I
FTK5N50D
TO-220
TO-220F
TO-263
TO-251
G
D
S
Tube
Tube
G
G
G
G
D
D
S
S
S
S
Tape Reel
D
D
Tube
TO-252
Tape Reel
Note: Pin Assignment:
G: Gate
D: Drain
S: Source
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Revision No : 0
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FTK5N50P/F/DD/D/I
ABSOLUTE MAXIMUM RATINGS
(
T = 25˚C, unless otherwise specified)
a
PARAMET
SYMBOL
VDS
RATINGS
500
UNIT
V
Drain to Source Voltage (TJ = 25˚C ~ 125˚C)
Drain to Gate Voltage (RGS = 20kΩ) (TJ =25˚C ~ 125˚C)
VDGR
IGS
500
V
Gate to Source Voltage
±30
V
ID
ID
Continuous
4.4
A
T = 100°C
a
2.8
A
Drain Current
IDM
Pulsed
17.6
A
W
TC
= 25°C
45/45/31/62.5
Maximum Power Dissipation
(TO-251/252/TO-220F/220/263)
PD
0.36/0.36/0.25/0.5
Derating above 25℃
W/˚C
Single Pulse Avalanche Energy Rating
EAS
270
mJ
(VDD=50V, starting TJ =25℃,L=19.7mH,Rg =25Ω, peak IAS =5.0A)
Junction Temperature
TJ
+150
˚C
˚C
TSTG
Storage Temperature
-55 ~ +150
Note: 1. Signified recommend operating range that indicates conditions for which the device is intended to be
functional, but does not guarantee specific performance limits.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS
(TC = 25˚C , unless Otherwise specified.)
PARAMETER
SYMBOL
BVDSS
TEST CONDITIONS
MIN TYP
MAX UNIT
V
ID = 250µA, VGS = 0V
Drain-Source Breakdown Voltage
Gate to Threshold Voltage
500
2.0
4.5
VGS(TH)
ID(ON)
VDS = VGS, ID = 250µA
4.0
V
A
VDS > ID(ON) X RDS(ON)MAX, VGS = 10V
On-State Drain Current (Note 1)
µA
VDS = Rated BVDSS, VGS = 0V
1
IDSS
Zero Gate Voltage Drain Current
VDS = 0.8 x Rated BVDSS
VGS = 0V, TJ = 125˚C
,
10
µA
IGSS
VGS = ±20V
Gate to Source Leakage Current
±100
1.5
nA
Drain to Source On Resistance
(Note 2)
RDS(ON)
ID = 2.5A, VGS = 10V
1.15
4.2
Ω
Forward Transconductance
(Note 2)
gFS
VDS ≥ 10V, ID = 2.5A
2.5
S
tDLY(ON)
tR
tDLY(OFF)
tF
Turn-On Delay Time
Rise Time
23
17
40
13
12
3.4
4.5
ns
ns
VDD = 250V, ID ≈ 2.5A,
RGS = 25Ω, RL = 50Ω
(Note 2)
Turn-Off Delay Time
Fall Time
ns
ns
QG(TOT)
QGS
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
nC
nC
nC
VGS = 10V, ID = 5A,
V
DS = 0.8 X Rated BVDSS
IG(REF) = 1.5mA (Note 3)
QGD
CISS
COSS
CRSS
Input Capacitance
510
69
6
pF
pF
pF
VDS = 25V, VGS = 0V,f = 1.0MHz
Output Capacitance
Reverse - Transfer Capacitance
Note: 1. Pulse Test: Pulse width ≤ 300μs, Duty cycle ≤ 2%
2. MOSFET Switching Times are Essentially Independent of Operating Temperature.
3. Gate Charge is Essentially Independent of Operating Temperature.
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Revision No : 0
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FTK5N50P/F/DD/D/I
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
SOURCE TO DRAIN DIODE SPECIFICATIONS
VSD
TJ = 25°C, ISD = 5A, VGS = 0V
Source to Drain Diode Voltage (Note 1)
Continuous Source to Drain Current
Pulse Source to Drain Current
Reverse Recovery Time
1.4
V
ISD
5.0
20
A
A
Note 2
ISDM
tRR
TJ = 25°C, ISD = 5A,
300
3.1
ns
QRR
dlSD/dt =100 A/µs
Reverse Recovery Charge
µC
Note:
1. Pulse Test: Pulse width ≤ 300μs, Duty cycle ≤ 2%
2. Modified MOSFET symbol showing the integral reverse P-N junction diode as below.
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FTK5N50P/F/DD/D/I
TEST CIRCUITS AND WAVEFORMS
VDS
L
VARY tp TO OBTAIN
REQUIRED PEAK I AS
+
-
RG
VDD
VGS
DUT
tp
0V
IAS
0.01
FIGURE 1. UNCLAMPED ENERGY TEST CIRCUIT
BVDSS
tp
VDS
IAS
VDD
0
tAV
FIGURE 2. UNCLAMPED ENERGY WAVEFORMS
RL
+
-
RG
VDD
DUT
VGS
FIGURE 3. SWITCHING TIME TEST CIRCUIT
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FTK5N50P/F/DD/D/I
tON
tOFF
tDLY(OFF)
tDLY(ON)
tR
tF
VDS
90%
90%
10%
10%
0
90%
VGS
10%
50%
50%
PULSE WIDTH
0
FIGURE 4. RESISTIVE SWITCHING WAVEFORMS
VDS (ISOLATED
SUPPLY)
CURRENT
REGULATOR
SAME TYPE
AS DUT
12V
BATTERY
0.2
F
50K
0.3
F
D
DUT
G
IG (REF)
S
0
VDS
IG CURRENT
SAMPLING
RESISTOR
ID CURRENT
SAMPLING
RESISTOR
FIGURE 5. GATE CHARGE TEST CIRCUIT
VDD
Q
G
(TOT)
VGS
Q
GD
Q
GS
VDS
0
0
IG(REF)
FIGURE 6. GATE CHARGE WAVEFORMS
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FTK5N50P/F/DD/D/I
Fig1. I - V
Fig2. I - V
D GS
D
DS
100
10
V
DS
=30V
101
100
10-1
V
=10V
GS
V
=7V
GS
TC=100 C
25 C
V
=5V
GS
1
0.1
0.1
10
Drain - Source Voltage VDS (V)
2
4
6
8
10
1
100
Gate - Source Voltage VGS (V)
Fig3. BV
- T
Fig4. R
- I
DS(ON) D
DSS
j
1.2
1.1
1.0
0.9
0.8
3.0
2.5
2.0
1.5
1.0
0.5
0
VGS = 0V
IDS = 250
V
=6V
GS
V
=10V
GS
100
-100
-50
0
50
150
0
2
4
6
8
10
12
Junction Temperature Tj (
)
Drain Current ID (A)
C
Fig6. R
- T
j
DS(ON)
Fig5. I - V
S
SD
102
101
100
10-1
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
I
=10V
= 2.5A
GS
DS
TC=100 C
25 C
-100
-50
0
50
100
150
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
(V)
Junction Temperature T (
)
C
Source - Drain Voltage VSD
j
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FTK5N50P/F/DD/D/I
Fig 7. C - V
DS
Fig8. Q - V
g
GS
12
1000
100
10
ID=5A
10
8
C
C
iss
V
= 400V
DS
V
= 250V
DS
oss
6
V
= 100V
DS
4
C
rss
2
1
0
2
6
8
14
16
0
4
10
g
12
0
5
10
15
20
25
30
35
40
Gate - Charge
Q
(nC)
Drain - Source Voltage VDS (V)
Fig10. I - T
Fig9. Safe Operation Area
D
j
102
101
100
10-1
102
6
5
4
3
2
1
0
Operation in this
area is limited by RDS(ON)
10µs
100µs
1ms
10ms
100ms
DC
T = 25
C
c
C
T = 150
j
Single pulse
102
103
50
75
100
125
150
100
101
0
25
Drain - Source Voltage V
(V)
DS
Junction Temperature T
( )
C
j
Fig11. Transient Thermal Response Curve
Duty=0.5
100
0 2
0.1
0.05
P
DM
10-1
t
1
t
2
- Duty Factor, D= t1/t2
Tj(max) - Tc
- RthJC
=
PD
10-2
10-5
10-4
10-3
10-2
10-1
100
101
TIME (sec)
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Revision No : 0
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