FTK5N80P [FS]

5.0 Amps, 800 Volts N-Channel MOS -FET;
FTK5N80P
型号: FTK5N80P
厂家: First Silicon Co., Ltd    First Silicon Co., Ltd
描述:

5.0 Amps, 800 Volts N-Channel MOS -FET

文件: 总8页 (文件大小:622K)
中文:  中文翻译
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SEMICONDUCTOR  
FTK5N80P/D/DD  
TECHNICAL DATA  
5.0 Amps, 800 Volts N-Channel MOS-FET  
DESCRIPTION  
These N-Channel enhancement mode power field effect  
Transistors are produced using planar stripe, DMOS  
technology.  
P :  
1
This advanced technology has been especially tailored  
to minimize on - state resistance , provide superior  
switching performance,and Withstand high energy pulse  
in the avalanche and commutaion mode .These devices  
are well suited for high efficiency switch mode power  
TO-220  
F :  
supply electronic lamp ballasts  
based on half bridge topology.  
1
TO-220F  
FEATURES  
* RDS(ON) = 2.7Ω@VGS = 10V  
* Fast switching capability  
* Avalanche energy tested  
DD :  
1
* Improved dv/dt capability, high ruggedness  
TO-263  
SYMBOL  
2.Drain  
1.Gate  
3.Source  
ORDERING INFORMATION  
Pin Assignment  
Order Number  
Package  
Packing  
1
2
3
FTK5N80P  
FTK5N80F  
FTK5N80DD  
TO-220  
TO-220F  
TO-263  
G
D
S
Tube  
Tube  
G
G
D
D
S
S
Reel & Taping  
Note: Pin Assignmen:  
G: Gate  
D: Drain  
S: Source  
2013. 01. 03  
Revision No : 0  
1/8  
FTK5N80P/F/DD  
ABSOLUTE MAXIMUM RATINGS (  
T
C
=25˚C, unless otherwise specified)  
PARAMET  
SYMBOL  
VDSS  
RATINGS  
UNIT  
V
Drain-Source Voltage  
800  
±30  
5.0  
5.0  
3.0  
20  
VGSS  
Gate-Source Voltage  
V
IAR  
Avalanche Current (Note 1)  
A
TC = 25°C  
A
Continuous Drain Current  
ID  
TC = 100°C  
Pulsed Drain Current (Note 1)  
IDM  
EAS  
A
Avalanche Energy  
Single Pulse(Note 2)  
320  
4.5  
mJ  
Peak Diode Recovery dv/dt (Note 3)  
dv/dt  
V/ns  
W
TC = 25°C  
142 / 48  
1.14 / 0.38  
+150  
Power Dissipation (TO-220,TO-263/ TO-220F)  
PD  
Derate above 25°C  
W / ˚C  
TJ  
Junction Temperature  
˚C  
˚C  
TSTG  
-55 ~ +150  
Operating and Storage Temperature  
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.  
Absolute maximum ratings are stress ratings only and functional device operation is not implied.  
THERMAL DATA  
PARAMETER  
Junction-to-Ambient  
Junction-to-Case  
SYMBOL  
MIN  
TYP  
MAX  
62.5  
1.0  
UNIT  
θJA  
TO-220, TO-263  
TO-220F  
θJc  
θJc  
˚C / W  
3.12  
ELECTRICAL CHARACTERISTICS (T = 25˚C , unless Otherwise specified.)  
C
PARAMETER  
OFF CHARACTERISTICS  
Drain-Source Breakdown Voltage  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
V
BVDSS  
IDSS  
VGS = 0V, ID = 250µA  
VDS = 800V, VGS = 0V  
800  
10  
µA  
Drain-Source Leakage Current  
Gate-Body Leakage Current  
IGSSF  
IGSSR  
VGS = 30V, VDS = 0V  
Forward  
100  
nA  
nA  
VGS = -30V, VDS = 0V  
Reverse  
-100  
ID = 250µA, Referenced to  
25°C  
ΔBVDSS / ΔTJ  
Breakdown Voltage Temperature Coefficient  
0.93  
5.5  
V / ˚C  
ON CHARACTERISTICS  
Gate Threshold Voltage  
VGS(TH)  
RDS(ON)  
gFS  
VDS = VGS, ID = 250µA  
2.0  
4.0  
2.7  
V
S
V
V
GS = 10V, I  
DS = 40V, I  
D
= 2.50A  
Static Drain-Source On-Resistance  
D
= 2.5A (Note 4)  
Forward Transconductance  
DYNAMIC CHARACTERISTICS  
Input Capacitance  
CISS  
COSS  
CRSS  
1020  
77  
pF  
pF  
pF  
VDS = 25V, VGS = 0V,  
f = 1.0MHz  
Output Capacitance  
Reverse Transfer Capacitance  
SWITCHING CHARACTERISTICS  
Turn-On Delay Time  
10.3  
tD(ON)  
50  
ns  
tR  
tD(OFF)  
tF  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
V
DD=400V, I  
D
=2.5A, R  
G
= 25Ω  
85  
120  
30  
ns  
ns  
(Note 4,5)  
ns  
QG  
21  
nC  
nC  
VDS = 640V,ID = 4A, VGS = 10V  
(Note 4,5)  
QGS  
3.2  
QGD  
Gate-Drain Charge  
78  
nC  
2013. 01. 03  
Revision No : 0  
2/8  
FTK5N80P/F/DD  
ELECTRICAL CHARACTERISTICS (T = 25˚C , unless Otherwise specified.)  
C
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS  
VSD  
V
GS = 0 V, I =5.0A  
S
Drain-Source Diode Forward Voltage  
1.4  
5.5  
V
A
Maximum Continuous Drain-Source Diode  
Forward Current  
IS  
Maximum Pulsed Drain-Source Diode Forward  
Current  
ISM  
20  
A
tRR  
VGS = 0 V, IS = 5.0A,  
Reverse Recovery Time  
700  
7.7  
ns  
QRR  
dIF/dt =100 A/µs (Note 4)  
Reverse Recovery Charge  
µC  
Notes:  
1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.  
Absolute maximum ratings are stress ratings only and functional device operation is not implied.  
2. Pulse width limited by safe operating area.  
3. Starting TJ=25°C, ID=IAR, VDD=50V  
4. Pulsed: Pulse duration=300μs, duty cycle 1.5%.  
5. Essentially independent of operating temperature  
2013. 01. 03  
Revision No : 0  
3/8  
FTK5N80P/F/DD  
7
6
5
4
3
2
1
0
VDS = 30V  
Top VGS=15.0V  
250 μs Pulse Test  
10  
10.0V  
8.0V  
7.0V  
6.0V  
5.0V  
4.5V  
Bottom 4.0V  
150  
-55  
1
25  
1. TC = 25  
2. 250μs Pulse Test  
0.1  
0
2
4
6
8
10  
0
5
10  
15  
20  
Gate-Source Voltage, VGS [V]  
Drain-Source Voltage, VDS [V]  
12  
10  
8
5
VGS = 0V  
250μs Pulse Test  
TJ = 25  
4
3
2
1
VGS = 10V  
150  
VGS = 20V  
6
25℃  
4
2
0
0.0  
0
2
4
6
8
10  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
Source-Drain Voltage, VSD [V]  
Drain Current,ID [A]  
12  
1600  
1200  
800  
400  
0
Ciss = Cgs + Cgd (Cds = shorted)  
Coss = Cds + Cgd  
ID = 4A  
Crss = Cgd  
10  
8
VDS = 160V  
VDS = 400V  
VGS = 0 V  
f = 1 MHz  
Ciss  
6
VDS = 640V  
Coss  
4
2
Crss  
0
100  
101  
0
5
10  
15  
20  
25  
Total Gate Charge, QG [nC]  
Drain-Source Voltage, VDS [V]  
2013. 01. 03  
Revision No : 0  
4/8  
FTK5N80P/F/DD  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
3.0  
VGS = 10 V  
ID = 2 A  
VGS = 0 V  
ID = 250 μA  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
-80  
-40  
0
40  
80  
120  
160  
-80  
-40  
0
40  
80  
120  
160  
Junction Temperature,TJ [oC]  
Junction Temperature, TJ [oC]  
1.5  
5
4
3
2
1
0
1.0  
0.5  
0.0  
VGS = 10 V  
ID = 250  
A  
25  
50  
75  
100  
125  
150  
-80  
-40  
0
40  
80  
120  
160  
Case Temperature, TC []  
Junction Temperature, TJ [oC]  
FTK5N80P  
FTK5N80F  
102  
102  
101  
100  
10-1  
10-2  
Operation in This Area  
is Limited by R DS(on)  
Operation in This Area  
is Limited by R DS(on)  
10 us  
10 us  
100 us  
101  
100  
10-1  
10-2  
100 us  
1 ms  
1 ms  
10 ms  
10 ms  
100 ms  
100 ms  
DC  
DC  
TC = 25 o  
J = 150 o  
Single Pulse  
C
TC = 25 o  
C
T
J = 150 o  
C
T
C
Single Pulse  
100  
101  
102  
103  
100  
101  
102  
103  
Drain-Source Voltage, VDS [V]  
Drain-Source Voltage, VDS [V]  
2013. 01. 03  
Revision No : 0  
5/8  
FTK5N80P/F/DD  
Fig11. Transient Thermal Response Curve  
(FTK5N80P)  
100  
Duty=0.5  
0 2  
0.1  
10-1  
P
DM  
t
1
t
2
- Rth(j-c) = 2.8 C/W Max.  
- Duty Factor, D= t1/t2  
Single Pulse  
10-2  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
101  
TIME (sec)  
Fig12. Transient Thermal Response Curve  
(FTK5N80F)  
100  
Duty=0.5  
0 2  
10-1  
P
DM  
0.1  
t
1
0.05  
t
0.02  
2
- Rth(j-c) = 2.8 C/W Max.  
- Duty Factor, D= t1/t2  
Single Pulse  
10-2  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
101  
TIME (sec)  
2013. 01. 03  
Revision No : 0  
6/8  
FTK5N80P/F/DD  
+
D.U.T.  
VDS  
-
+
-
L
RG  
Driver  
VDD  
* dv/dt controlled by R  
G
* ISD controlled by pulse period  
* D.U.T.-Device Under Test  
Same Type  
as D.U.T.  
VGS  
Fig. 1A Peak Diode Recovery dv/dt Test Circuit  
Period  
P. W.  
VGS  
(Driver)  
D=  
P.W.  
Period  
10V  
=
VGS  
I
FM, Body Diode Forward Current  
ISD  
(D.U.T.)  
di/dt  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VDS  
(D.U.T.)  
VDD  
Body Diode  
Forward Voltage Drop  
Fig. 1B Peak Diode Recovery dv/dt Waveforms  
2013. 01. 03  
Revision No : 0  
7/8  
FTK5N80P/F/DD  
TEST CIRCUITS AND WAVEFORMS (Cont.)  
RL  
VDS  
VDS  
90%  
VDD  
VGS  
RG  
10%  
VGS  
D.U.T.  
10V  
tD(ON)  
tD(OFF)  
Pulse Width 1μs  
Duty Factor 0 1%  
tF  
tR  
Fig. 2A Switching Test Circuit  
Fig. 2B Switching Waveforms  
Same Type  
as D.U.T.  
50kΩ  
QG  
12V  
10V  
0 3μF  
0.2μF  
VDS  
QGS  
QGD  
VGS  
DUT  
VG  
3mA  
Charge  
Fig. 3A Gate Charge Test Circuit  
Fig. 3B Gate Charge Waveform  
L
VDS  
BVDSS  
RD  
VDD  
10V  
D.U.T.  
tp  
IAS  
Time  
tp  
Fig. 4A Unclamped Inductive Switching Test Circuit  
Fig. 4B Unclamped Inductive Switching Waveforms  
2013. 01. 03  
Revision No : 0  
8/8  

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