FTK640P [FS]

18A, 200V, 0.155Î© , N-CHANNEL POWER MOS FET;


型号：	FTK640P
厂家：	First Silicon Co., Ltd
描述：	18A, 200V, 0.155Î© , N-CHANNEL POWER MOS FET
文件：	总7页 (文件大小：433K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SEMICONDUCTOR

FTK640D/DD/P/F

TECHNICAL DATA

18A, 200V, 0.155Ω , N-CHANNEL POWER MOS FET

P :

DESCRIPTION

The N-Channel enhancement mode silicon gate power MOSFET

is designed for high voltage, high speed power switching

applications such as switching regulators, switching converters,

solenoid, motor drivers, relay drivers.

TO-220

F :

FEATURES

TO-220F

* 18A, 200V, Low R_DS(ON)(0.155Ω)

* Single Pulse Avalanche Energy Rated

* Rugged - SOA is Power Dissipation Limited

* Fast Switching Speeds

* Linear Transfer Characteristics

* High Input Impedance

DD :

TO-263

D :

SYMBOL

TO - 252

2.Drain

1.Gate

3.Source

ORDERING INFORMATION

Pin Assignment

Order Number

Package

Packing

FTK640P

FTK640F

FTK640DD

FTK640D

TO-220

TO-220F

TO-263

TO-252

Tube

Note: Pin Assignment:

G: Gate

D: Drain S: Source

2014. 3. 10

Revision No : 0

1/7

FTK640D/DD/P/F

ABSOLUTE MAXIMUM RATINGS

(T_C= 25˚C, unless otherwise specified)

PARAMET

SYMBOL

V_DS

RATINGS

200

UNIT

Drain-Source Voltage

(

T_J= 25˚C ~ 125˚C)

Drain to Gate Voltage (R_GS= 20kΩ, T_J= 25˚C ~ 125˚C)

V_DGR

I_GS

I_D

200

Gate to Source Voltage

±20

Continuous

Drain Current

T_A= 100°C

Pulsed

I_D

I_DM

Maximum Power Dissipation (T_c= 25°C)

Derating factor

125 / 40

1.0 / 0.32

P_D

(FTK640P / FTK640F)

W/˚C

Single Pulse Avalanche Energy Rating

E_AS

580

(V_DD= 50V, starting T_J= 25˚C, L = 3.3mH, R_G=25Ω, I_AS= 19.4A)

Operating Temperature Range

˚C

T_J

-40 ~ +150

T_STG

Storage Temperature Range

Note: 1. Signified recommend operating range that indicates conditions for which the device is intended to be

functional, but does not guarantee specific performance limits.

2. Absolute maximum ratings indicate limits beyond which damage to the device may occur.

ELECTRICAL SPECIFICATIONS

(T_C= 25˚C , unless Otherwise specified.)

PARAMETER

SYMBOL

BV_DSS

TEST CONDITIONS

MIN TYP

MAX UNIT

I_D= 250µA, V_GS= 0V (Figure 16)

Drain-Source Breakdown Voltage

Gate to Threshold Voltage

200

2.0

V_GS(THR)

I_D(ON)

V_GS= V_DS, I_D= 250µA

4.0

V_DS> I_D(ON)X R_DS(ON)MAX,V_GS= 10V

On-State Drain Current (Note 1)

V_DS= Rated BV_DSS, V_GS= 0V

µA

I_DSS

Zero Gate Voltage Drain Current

V_DS=0.8xRated BV_DSS,V_GS=0V, T_J=125˚C

µA

I_GSS

V_GS= ±20V

Gate to Source Leakage Current

Drain to Source On Resistance

(Note 1)

±100

R_DS(ON)

I_D= 9.0A, V_GS= 10V

0.125 0.15

Ω

Forward Transconductance

(Note 1)

V_DS>

10V

g_FS

6.7

I_D= 11A

t_DLY(ON)

t_R

t_DLY(OFF)

t_F

Turn-On Delay Time

Rise Time

V_DD= 100V, I_D≈ 19.4A,

R_GS= 25Ω,

390

120

170

190

Turn-Off Delay Time

Fall Time

Q_G(TOT)

Q_GS

V_GS= 10V, I_D= 19.4A,

Total Gate Charge

V_DS= 0.8 X Rated BV_DSS

Gate to Source Charge

Gate to Drain “Miller” Charge

Input Capacitance

8.6

Q_GD

13.5

C_ISS

1220

1600

290

V_DS= 25V, V_GS= 0V,f = 1.0MHz

C_OSS

C_RSS

Output Capacitance

Reverse - Transfer Capacitance

220

Note: 1. Pulse Test: Pulse width≤300μs, Duty Cycle≤2%.

2. MOSFET Switching Times are Essentially Independent of Operating Temperature.

3. Gate Charge is Essentially Independent of Operating Temperature.

2014. 3. 10

Revision No : 0

2/7

FTK640D/DD/P/F

THERMAL DATA

PARAMETER

SYMBOL

RATINGS

UNIT

θ_JA

Thermal Resistance Junction-Ambient (FTK640P)

Thermal Resistance Junction-Case (FTK640P)

˚C / W

θ_Jc

1.0

SOURCE TO DRAIN DIODE SPECIFICATIONS

PARAMETER

SYMBOL

V_SD

TEST CONDITIONS

SD = 11A,

MIN

TYP

MAX UNIT

VGS = 0V

Source to Drain Diode Voltage (Note 1)

1.3

I_SD

I_SDM

t_RR

Continuous Source to Drain Current

Pulse Source to Drain Current

Reverse Recovery Time

Note 2

I_SD= 19.4A,

140

µC

Q_RR

dl_SD/dt =100 A/µs

Reverse Recovery Charge

0.69

Note:

1. Pulse Test: Pulse width ≤ 300μs, Duty cycle ≤ 2%

2. Modified MOSFET symbol showing the integral reverse P-N junction diode as below.

Typical Performance Curves Unless Otherwise Specified

1.2

1.0

0.8

0.6

0.4

0.2

100

T , CASE TEMPERATURE ( C)

125

150

100

150

, CASE TEMPERATURE ( C)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

NOTES

DUTY FACTOR D = t /t

+ T

PEAK T = P

x Z

θJC

0.001

-5

-4

-3

-2

-1

, RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

2011. 3. 10

Revision No : 0

3/7

FTK640D/DD/P/F

MOSFET

1000

100

OPERATION IN THIS AREA MAY BE

LIMITED BY r

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

DS(ON)

10V

= 25 C

10µs

100µs

1ms

10ms

= 25 C

= MAX RATED

SINGLE PULSE

100

1000

, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

FIGURE 5. OUTPUT CHARACTERISTICS

100

= 8V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= 10V

≥50V

= 7V

25 C

= 6V

= 5V

150 C

= 4V

0.1

2.0

3.0

4.0

5.0

1.0

, DRAIN TO SOURCE VOLTAGE (V)

, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS

FIGURE 7. TRANSFER CHARACTERISTICS

1.5

1.2

3.0

2.4

1.8

1.2

0.6

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= 10V, I = 18A

0.9

0.6

= 10V

0.3

= 20V

, DRAIN CURRENT (A)

-60 -40 -20

40 60 80 100 120 140 160

T , JUNCTION TEMPERATURE ( C)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

2014. 3. 10

Revision No : 0

4/7

FTK640D/DD/P/F

1.25

1.15

1.05

0.95

0.85

0.75

3000

= 0V, f = 1MHz

= 250µA

= C

+ C

ISS

= C

RSS

OSS

≈C

+ C

2400

1800

1200

600

ISS

OSS

RSS

, DRAIN TO SOURCE VOLTAGE (V)

-60 -40 -20

20 40 60 80 100 120 140 160

100

T , JUNCTION TEMPERATURE ( C)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

1000

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

150 C

25 C

100

150 C

25 C

0.4

0.8

1.2

1.6

2.0

, DRAIN CURRENT (A)

, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT

FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

= 28A

= 40V

= 100V

= 160V

Q , GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

2014. 3. 10

Revision No : 0

5/7

FTK640D/DD/P/F

TEST CIRCUITS AND WAVEFORMS

V_DS

VARY tp TO OBTAIN

REQUIRED PEAK I_AS

R_G

V_DD

V_GS

DUT

t_p

I_AS

0.01

FIGURE 1. UNCLAMPED ENERGY TEST CIRCUIT

BV_DSS

t_p

V_DS

I_AS

V_DD

t_AV

FIGURE 2. UNCLAMPED ENERGY WAVEFORMS

R_L

R_G

V_DD

DUT

V_GS

FIGURE 3. SWITCHING TIME TEST CIRCUIT

2014. 3. 10

Revision No : 0

6/7

FTK640D/DD/P/F

TEST CIRCUITS AND WAVEFORMS(cont.)

t_ON

t_OFF

t_DLY(ON)

t_DLY(OFF)

t_R

t_F

V_DS

90%

10%

90%

V_GS

10%

50%

PULSE WIDTH

FIGURE 4. RESISTIVE SWITCHING WAVEFORMS

V_DS(ISOLATED

SUPPLY)

CURRENT

REGULATOR

SAME TYPE

AS DUT

12V

BATTERY

0.2μF

50K

0.3μF

DUT

I_{G (REF)}

V_DS

I_GCURRENT

SAMPLING

RESISTOR

I_DCURRENT

SAMPLING

RESISTOR

FIGURE 5. GATE CHARGE TEST CIRCUIT

V_DD

(TOT)

V_GS

V_DS

I_G(REF)

FIGURE 6. GATE CHARGE WAVEFORMS

2014. 3. 10

Revision No : 0

7/7

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