FTK7NS65D [FS]
7Amps, 650Volts N-Channel Super Juction MOS-FET;型号: | FTK7NS65D |
厂家: | First Silicon Co., Ltd |
描述: | 7Amps, 650Volts N-Channel Super Juction MOS-FET |
文件: | 总7页 (文件大小:618K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SEMICONDUCTOR
FTK7NS65P/F/D/I
TECHNICAL DATA
7Amps, 650Volts N-Channel Super Juction MOS-FET
Product Summary
P :
VDS @ Tj,max
RDS(on),max
IDM
650V
0.57Ω
21A
1
TO-220
Qg,typ
15nC
F :
DESCRIPTION
1
TO-220F
FTK7NS65 Power MOS FET is fabricated using
advanced super junction technology. The resulting
device has extremely low on resistance, making it
especially suitable for applications which require
superior power density and outstanding efficiency.
D :
1
TO-252
TO - 251
FEATURES
I :
�
�
�
�
�
Ultra fast body diode
Ultra low RDS(on)
1
Ultra low gate charge (typ. Qg = 15nC)
100% UIS tested
RoHS compliant
Applications
SYMBOL
�
Power faction correction (PFC).
2.Drain
�
�
Switched mode power supplies (SMPS).
Uninterruptible power supply (UPS).
1.Gate
3.Source
ORDERING INFORMATION
Pin Assignment
Packing
Order Number
Package
1
2
3
FTK7NS65P
FTK7NS65F
FTK7NS65D
FTK7NS65I
TO-220
TO-220F
TO-252
TO-251
G
D
S
Tube
Tube
G
G
G
D
D
D
S
S
S
Tube
Reel & Taping
Note: Pin Assignmen:
G: Gate
D: Drain
S: Source
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Revision No : 0
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FTK7NS65P/F/D/I
Absolute Maximum Ratings
Parameter
Symbol
Value
650
7
Unit
V
Drain - Source Voltage
VDSS
ID
Continuous drain current
( TC = 25°C )
( TC = 100°C )
A
4.4
A
Pulsed drain current 1)
Gate - Source voltage
IDM
21
A
VGSS
± 30
V
Avalanche energy, single pulse 2)
EAS
120
mJ
Avalanche energy, repetitive 1)
Avalanche current, repetitive 1)
EAR
IAR
0.5
mJ
A
2
Power Dissipation
( TC = 25°C )
PD
83
W
- Derate above 25°C
0.67
W/°C
°C
A
Operating and Storage Temperature Range
Continuous diode forward current
Diode pulse current
TJ, TSTG
IS
-55 to +150
7
IS,pulse
21
A
Thermal CharacteristicsTO-220/TO-251/TO-252
Parameter
Symbol
Value
2.5
Unit
°C/W
°C/W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
RθJC
RθJA
62
Thermal Characteristics TO-220F
Parameter
Symbol
Value
4.3
Unit
°C/W
°C/W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
RθJC
RθJA
80
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FTK7NS65P/F/D/I
Electrical Characteristics Tc = 25°C unless otherwise noted
Parameter
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Symbol
Test Condition
Min.
Typ.
Max.
Unit
BVDSS
VGS(th)
IDSS
VGS=0 V, ID=0.25 mA
VDS=VGS, ID=0.25mA
VDS=650 V, VGS=0 V,
VGS=30 V, VDS=0 V
650
2.5
-
-
3.5
-
-
V
V
4.5
1
Drain cut-off current
μA
nA
Gate leakage current, Forward
IGSSF
-
-
100
Gate leakage current, Reverse
Drain -source on-state resistance
IGSSR
VGS=-30 V, VDS=0 V
VGS=10 V, ID=3.5A
Tj = 25°C
-
-
-
-
-
-
-100
nA
RDS(on)
0.47
1.90
8.3
0.57
Ω
Tj = 150°C
-
-
Gate resistance
RG
f=1 MHz, open drain
Ω
Dynamic characteristics
Input capacitance
Ciss
Coss
Crss
td(on)
tr
VDS = 100 V, VGS = 0 V,
f = 1 MHz
-
-
-
-
-
584
23
-
-
-
-
-
pF
ns
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
1.3
11
VDD = 300V, ID = 3.5A
RG = 12Ω, VGS=10V
10
Turn-off delay time
Fall time
td(off)
tf
-
-
30
6
-
-
Gate charge characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Qgs
VDD=480 V, ID=3.5A,
VGS=0 to 10 V
-
-
-
-
2.4
6.8
15
-
-
-
-
nC
V
Qgd
Qg
Gate plateau voltage
Vplateau
5.8
-
Reverse diode characteristics
Diode forward voltage
-
-
-
-
VSD
trr
VGS=0 V, IF=3.5A
VR=50 V, IF=7A,
dIF/dt=100 A/μs
-
-
-
-
V
ns
μC
A
1.0
Reverse recovery time
262
Reverse recovery charge
Peak reverse recovery current
Qrr
Irrm
3.5
15
Notes:
1. Limited by maximum junction temperature, maximum duty cycle is 0.75.
2. IAS = 2A, VDD = 50V, Starting Tj= 25°C.
3. Repetitive Rating: Pulse width limited by maximum junction temperature.
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Revision No : 0
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FTK7NS65P/F/D/I
Typical Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
14
12
10
8
14
12
10
8
Common Source
Common Source
Tc = 25°C
VGS=10V
VGS=7V
VGS=6.5V
Tc = 25°C
VDS=20 V
Pulse test
Pulse test
VGS=6V
6
6
4
4
VGS=5.5V
2
2
0
0
0
4
8
12
16
2
4
6
8
Drain−source voltage DVS (V)
Gate−source voltage GVS (V)
Figure 3. On-Resistance Variation vs. Drain Current
Figure 4. Threshold Voltage vs. Temperature
1.1
1
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.9
0.8
0.7
0.6
0.5
VGS = 10V
0.5
0.4
Tc = 25°C
0.3
IDS=0.25 mA
Pulse test
Pulse test
0.2
0
5
10
15
20
-60 -40 -20
0
20
40
60
80 100 120 140 160
Drain current ID (A)
Junction temperature Tj (°C)
Figure 5. Breakdown Voltage vs. Temperature
Figure 6. On-Resistance vs. Temperature
1.1
2 5
2
1 5
1
1
0.9
0.8
VGS=0 V
IDS=0.25 mA
Pulse test
VGS=10 V
IDS=3 5 A
Pulse test
0 5
0
-60 -40 -20
0
20 40 60 80 100 120 140 160
-60 -40 -20
0
20 40 60 80 100 120 140 160
Junction temperature Tj (°C)
Junction temperature Tj (°C)
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Revision No : 0
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FTK7NS65P/F/D/I
Figure 8. Gate Charge Characterist
Figure 7. Capacitance Characteristics
104
103
102
101
100
10
8
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Ciss
6
4
Coss
ID = 3.5A
Notes:
f = 1 MHz
VGS=0 V
2
Crss
0
0
2
4
6
8
10
12
14
0
100
200
300
400
500
600
Total Gate Charge QG (nC)
Drain-Source Voltage VDS (V)
Figure 9. Maximum Safe Operating Area
Figure 10. Power Dissipation vs. Temperature
100
100
90
80
70
60
50
40
30
20
10
0
Limited by RDS(on)
10
1
10us
100us
1ms
DC
Notes:
Tc = 25°C
0.1
0.01
Tj = 150°C
Single Pulse
1
10
100
1000
0
40
80
120
160
Drain-Source Voltage VDS (V)
Case temperature Tc (°C)
Figure 11. Transient Thermal Response Curve
1 0E+01
1 0E+00
1.0E-01
1.0E-02
1.0E-03
In descending order
D=0.7, 0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
P
DM
t
Duty = t/T
T
Z
(t)=1.5°C/W Max.
θJC
1.0E-06
1 0E-05
1.0E-04
1 0E-03
1.0E-02
1.0E-01
Pulse Width t (s)
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FTK7NS65P/F/D/I
+
D.U.T.
VDS
-
+
-
L
RG
Driver
VDD
* dv/dt controlled by R
G
* ISD controlled by pulse period
* D.U.T.-Device Under Test
Same Type
as D.U.T.
VGS
Fig. 1A Peak Diode Recovery dv/dt Test Circuit
Period
P. W.
VGS
(Driver)
D=
P.W.
Period
10V
=
VGS
I
FM, Body Diode Forward Current
ISD
(D.U.T.)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(D.U.T.)
VDD
Body Diode
Forward Voltage Drop
Fig. 1B Peak Diode Recovery dv/dt Waveforms
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FTK7NS65P/F/D/I
TEST CIRCUITS AND WAVEFORMS (Cont.)
RL
VDS
VDS
90%
VDD
VGS
RG
10%
VGS
D.U.T.
10V
tD(ON)
tD(OFF)
Pulse Width ≤ 1μs
Duty Factor ≤ 0 1%
tF
tR
Fig. 2A Switching Test Circuit
Fig. 2B Switching Waveforms
Same Type
as D.U.T.
50kΩ
QG
12V
10V
0 3μF
0.2μF
VDS
QGS
QGD
VGS
DUT
VG
3mA
Charge
Fig. 3A Gate Charge Test Circuit
Fig. 3B Gate Charge Waveform
L
VDS
BVDSS
RD
VDD
10V
D.U.T.
tp
IAS
Time
tp
Fig. 4A Unclamped Inductive Switching Test Circuit
Fig. 4B Unclamped Inductive Switching Waveforms
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Revision No : 0
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