MB1515PFV [FUJITSU]
PLL Frequency Synthesizer, BICMOS, PDSO20, PLASTIC, SSOP-20;
| 型号： | MB1515PFV |
| 厂家： | 
FUJITSU |
| 描述： | PLL Frequency Synthesizer, BICMOS, PDSO20, PLASTIC, SSOP-20 输入元件 信息通信管理 光电二极管 |
| 文件： | 总16页 (文件大小：147K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Sept. 1995
Edition 2.0a
DATA SHEET
MB1515 ASSP
BiCMOS 2.5GHz PLL FREQUENCY SYNTHESIZER
WITH BUILT-IN PRESCALER
DESCRIPTION
The MB1515 is a serial input PLL (Phase-Locked Loop) frequency synthesizer with
a built-in prescaler allowing for a pulse swallow system in the two modulus 2.5 GHz
band. It is suitable for BS and TV tuners and CATV systems.
The synthesizer is powered by 5 V (typical). Using the latest proprietary process,
current consumption has been reduced to ICC = 16 mA (typical).
20–pin Plastic
FS ESAupTpUlyRvoEltaSge: VCC = 5 V
SSOP
S High-speed operation capability: fin = 2.5 GHz (Pin = - 4 dBm)
S Low current consumption: ICC = 16 mA (typical)
S Broad operating temperature range: Ta = - 40°C to +85°C
S Integrated Functions
24-bit shift register
24-bit latch
Reference divider
Binary 2-bit programmable reference counter (Divide ratios: 256, 512,
1024, and 2048)
Comparison Divider
(FPT-20P-M03)
Binary 5-bit swallow counter (Divide ratios: 0 to 31)
Binary 12-bit bit programmable counter (Divide ratios: 32 to 4095)
Phase comparator with phase conversion feature
Two modulus prescaler for 2.5 GHz band (Divide ratios: 256/272 and 512/528)
4-bit band switching signals
Control signal generator
Crystal oscillator
Charge pump
MAXIMUM RATINGS
Parameter
Supply voltage
Output voltage
Symbol
Value
–0.5 to +7.0
–0.5 to V CC+0.5
$10
Units
V
V
CC
V
O
V
Output current
I
O
mA
°C
Storage temperature
Tstg
–55 to +125
RECOMMENDED OPERATING CONDITIONS
Value
Min.
4.5
Typ.
5.0
—
Max
Parameter
Supply voltage
Symbol
Unit
V
V
CC
5.5
Input voltage
V
I
GND
–40
V
CC
V
Operating temperature
Ta
—
+85
°C
NOTES:
1. To prevent damage caused by static electricity, an antistatic element is added and
antistatic enhancement is also built into the circuit. However, the following handling
cautions must be observed:
S
Contain the device in a conductive case when storing or transporting it.
Before handling, verify that the person handling the device, fixtures, and tools are not
charged (grounded). Use a grounded conductive sheet as the work surface.
Turn off power before connecting or disconnecting the device to or from the socket.
Protect the lead with a conductive sheet when handling (such as transporting) a
board on which this device is mounted.
S
This device contains circuitry to protect the inputs against damage
due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this high
impedance circuit.
S
S
MB1515
PIN ASSIGNMENT
2
MB1515
PIN DESCRIPTION
Pin No.
Pin name
I/O
Descriprion
FC
I
Phase switch input pin to the phase comparator (with pull up resistor). This pin allows for inverting the polarity
of phase comparator output, according to the polarity of the externally connected LPF and VCO. When FC is
at “L” level, charge pump and phase comparator characteristics are reversed. This pin also toggles the output
of the fout pin (test pin) between fr and fp.
1
LE
I
Load enable signal input pin (with Schmitt trigger circuit). The pin sends shift register contents to the latch
when LE is at “H” (or open).
2
Data
I
I
Serial data input pin using binary codes (with Schmitt trigger circuit).
3
4
Clock
24-bit shift register clock input pin (with Schmitt trigger circuit). Data is read at the rising edge of the clock
pulse.
VCC1
OSCin
OSCout
GND1
DO1
—
I
Power supply pin (for PLL).
5
6
Cystal oscillator connect pin and reference divider input pin. (OSCin: Oscillator input pin, OSCout: Oscillator
output pin)
O
—
O
O
O
O
O
O
I
7
Grounding pin (for PLL)
8
Charge pump output pin. Phase characteristics invert with FC pin settings.
9
DO2
10
11
12
13
14
15
16
17
18
19
BC4
BC3
BC2
BC1
fin
Band switch output pin (open collector output). Output is controlled by the serial data band bit setting.
When BCX bit is “H”, the BCX output transistor turns ON.
When BCX bit is “H”, the BCX output transistor turns OFF. (X: 1 to 4)
fin’s complementary input pin. Connect to ground via a capacitor.
Ground pin (for prescaler).
GND2
fin
—
I
Prescaler input pin. Input using ac coupling.
Power supply pin (for prescaler).
VCC2
fout
—
O
FC
“H”
“L”
Output Signal
Phase comparator input monitor pin.Produces either the reference divider
output (fr)or the comparison divider output (fp) signal depending on the
FC pin’s input level.
fr
fp
LD
O
Phase comparator output pin. LD is usually “H”, and is set to “L” for the duration equivalent to the phase error
between fr and fp.
20
3
MB1515
BLOCK DIAGRAM
4
MB1515
ELECTRICAL CHARACTERISTICS
Value
Typ.
Min.
Max.
Parameter
Symbol
Condition
Units
When input at fin=2.5GHz
and OSCin= 4MHz,
Power supply current
I
V
CC
=5V. Other input pins
—
16.0
—
—
mA
CC
are GND and output pins
are open.
Must be AC-coupled. The
minimum operating fre-
quency when coupled at
1000 pF.
fin
fin
100
2500
MHz
Operating frequency
OSCin
fOSC
—
—
–4
4
10
6
MHz
dBm
dBm
dBm
dBm
VP-P
Pfin1
Pfin2
Pfin3
Pfin4
VOSC
2300 to 2500 MHz
1900 to 2300 MHz
1000 to 1900 MHz
100 to 1000 MHz
—
—
—
—
—
—
–7
6
fin
–10
–20
0.5
6
Permissible input voltage
6
OSCin
—
V
× 0.7
+ 0.4
CC
High level input voltage
Other the fin
VIH
VIL
V
and OSCin
V
× 0.3
–0.4
CC
Low level input voltage
—
—
—
V
High level input current
Data, Clock,
IIH
—
—
—
—
—
4.4
—
1.0
–1.0
–60
$50
—
—
mA
mA
mA
mA
V
LE
IIL
—
—
Low level input current
Input current
FC
IILFC
IIOSC
—
—
OSCin
—
When VCC = 5 V
—
—
High level output voltage
Low level output voltage
V
OH
—
Excluding
Do and BC
VOL
IOFF
—
0.4
V
High impedance cutoff
current
Do 1, 2 BC
1 to 4
—
—
—
1.1
mA
IOH
IOL
VB
—
—
—
–1.0
1.0
—
—
—
—
—
—
12
mA
mA
V
Excluding
Do and BC
Output current
Output voltage breakdown
BC1 to 4
5
MB1515
FUNCTIONAL DESCRIPTIONS
1. Formula for calculation of divide ratio
Set divider’s divide ratio according to the following formula:
fVCO
where
fVCO
P
N
A
fOSC
R
= [(P × N) + (16 × A)] × fOSC ÷ R
:
Externally connected VCO output frequency
Prescaler divide ratio (256 or 512)
Binary 12-bit programmable counter setting (32 to 4095)
Binary 5-bit swallow counter setting (0 to 31)
Reference oscillation frequency
:
:
:
:
:
Reference counter setting (256, 512, 1024, 2048)
2. Serial data input procedure
Serial data is input from three inputs, Data pin, Clock pin and LE pin, allowing for control of the 4-bit band switch setting, the 3-bit reference
divider and the 17-bit comparison divider respectively. The data is sequentially fetched into the internal shift register at the rising edge
of the clock and transferred to the latch when load enable is at the “H” level.
The 24-bit shift register is configured as follows:
S
S
Band switch setting (BC1 to BC4)
When data set in the band bits is at “H,” output is turned ON. When data is at “L,” output is turned OFF.
Prescaler divide ratio (SW)
Divided by 256/272 when data set in the SW bit is at “H.” Divided by 512/528 when data is at “L.”
6
MB1515
S
Divide ratios for 5-bit swallow counter (A1 to A5)
Divide ratio A
A5
0
A4
0
A3
0
A2
0
A1
0
0
1
2
0
0
0
0
1
0
0
0
1
0
S
S
S
S
S
S
S
S
S
S
S
S
31
1
1
1
1
1
S
S
Reference counter divide ratios (R1 and R2)
Divide ratio R
256
R2
0
R1
0
512
0
1
1024
1
0
2048
1
1
Divide ratios for 12-bit programmable counter (N1 to N12)
Divide ratios
N12
0
N11
0
N10
0
N9
0
N8
0
N7
0
N6
1
N5
0
N4
0
N3
N2
N1
0
0
1
2
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
1
0
0
0
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
4095
1
1
1
1
1
1
1
1
1
1
1
1
7
MB1515
3. Serial data input timings
When designing the synthesizer, control the FC pin according to the VCO polarity.
*: Fetches data at the rising edge of the clock.
*: Fetches data when LE is at “H” level.
4. FC pin input in relation to phase characteristics
The FC pin switches the phase of the phase comparator. Phase characteristics (charge pump output) are inverted by controlling this
pin. Output from the phase comparator input monitor pin (fout) is also controlled by this FC pin. The relation of FC pin input with Do and
fout is as follows:
FC: “H” (or open)
FC: “L”
DO1, DO2
fout
DO1, DO2
fout
fr>fp
fr=fp
fr<fp
H
Z
L
L
Z
L
Outputs reference
divider output (fr)
Outputs comparison
divider output (fp)
Z: high impedance
8
MB1515
When designing the synthesizer, control the FC pin according to the VCO polarity.
PHASE COMPARATOR OUTPUT WAVEFORMS
Notes:
1. The phase error is detected in a range of - 2 π to +2 π.
2. Output of a “glitch” varies slightly with charge pump characteristics. This “glitch” is output to eliminate an dead band.
9
MB1515
EXAMPLE MEASUREMENT CIRCUIT (PRESCALER INPUT SENSITIVITY)
10
MB1515
EQUIVALENT CIRCUIT DIAGRAM
11
MB1515
EXAMPLE APPLICATION
C1, C2: Determined by the crystal oscillator
FC: with pull up resistor
12
MB1515
ORDERING INFORMATION
Parts Number
Package
Notes
MB1515PFV
Plastic SSOP, 20 pins
(FPT–20P–M03)
EXTERNAL DIMENSIONS
20-pin plastic SSOP
(FPT-20P-M03)
13
MB1515
NOTES
14
MB1515
All Rights Reserved.
Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete information sufficient for
construction purposes is not necessarily given.
The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for
inaccuracies.
The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu.
Fujitsu reserves the right to change products or specifications without notice.
This document contains information on a new product. Specification and information herein are subject to change without notice.
No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu.
15
MB1515
FUJITSU LIMITED
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FUJITSU LIMITED 1994
16
DS04-21317-2E
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