MB39A125 [FUJITSU]
DC/DC Converter IC for Charging Li-ion Battery; DC / DC转换器IC,适用于充电锂离子电池型号: | MB39A125 |
厂家: | FUJITSU |
描述: | DC/DC Converter IC for Charging Li-ion Battery |
文件: | 总64页 (文件大小:743K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27248-1E
ASSP for Power Supply Applications (Secondary battery)
DC/DC Converter IC for Charging
Li-ion Battery
MB39A125/126
■ DESCRIPTION
MB39A125/126 is a DC/DC converter IC for charging Li-ion battery, which is suitable for down-conversion, and
uses pulse width modulation (PWM) for controlling the output voltage and current independently. This IC integrates
the build-in comparator for the voltage detection of the AC adapter, and selects the AC adapter or battery auto-
matically for power supply to the system.
Provides a wide range of power supply voltage, low standby current, and high efficiency, which makes them ideal
as a built-in charging device in products such as notebook PC.
■ FEATURES
• High efficiency : 97% (MAX)
• Built-in two constant current control circuits
• Analog control of the charging current value (+INE1, +INE2 terminal)
• Built-in AC adapter voltage detection function (ACOK, XACOK terminal)
(Continued)
■ PACKAGES
24-pin plastic SSOP
28-pin plastic QFN
(FPT-24P-M03)
(LCC-28P-M11)
MB39A125/126
(Continued)
• External output voltage setting resistor : MB39A125
• Built-in output voltage setting resistor : MB39A126
• Built-in charge stop function at low VCC
• Output voltage setting accuracy : 0.74% (Ta = −10 °C to +85 °C) : MB39A125
: 12.6 V/16.8 V 0.8% (Ta = −10 °C to +85 °C) : MB39A126
• Built-in high accuracy current detection amplifier ( 5%) (At input voltage difference 100 mV) ,
( 15%) (At input voltage difference 20 mV)
• In IC standby mode (Icc= 0 µA Typ) , make output voltage setting resistor open to prevent inefficient current loss
• Built-in soft-start circuit
• Standby current : 0 µA (Typ)
• Totem-pole type output for Pch MOS FET
2
MB39A125/126
■ PIN ASSIGNMENTS
• MB39A125
(TOP VIEW)
−INC2
OUTC2
+INE2
−INE2
ACOK
VREF
ACIN
1
2
24
23
22
21
20
19
18
17
16
15
14
13
+INC2
GND
CS
3
4
VCC
OUT
VH
5
6
7
XACOK
RT
−INE1
+INE1
OUTC1
OUTD
−INC1
8
9
−INE3
FB123
CTL
1 0
11
1 2
+INC1
(FPT-24P-M03)
(Continued)
3
MB39A125/126
(Continued)
(TOP VIEW)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
N.C.
GND
1
2
3
4
5
6
7
FB123
CTL
+INC2
N.C.
+INC1
N.C.
−INC2
OUTC2
+INE2
−INC1
OUTD
N.C.
8
9
10
11
12
13
14
(LCC-28P-M11)
Note : Connect IC’s radiation board at bottom side to potential of GND.
4
MB39A125/126
• MB39A126
(TOP VIEW)
−INC2
OUTC2
+INE2
−INE2
ACOK
VREF
ACIN
1
2
24
23
22
21
20
19
18
17
16
15
14
13
+INC2
GND
CS
3
4
VCC
OUT
VH
5
6
7
XACOK
RT
−INE1
+INE1
OUTC1
SEL
8
9
−INE3
FB123
CTL
10
11
12
−INC1
+INC1
(FPT-24P-M03)
(Continued)
5
MB39A125/126
(Continued)
(TOP VIEW)
28
27
26
25
24
23
22
1
2
3
4
5
6
7
21
20
19
18
17
16
15
N.C.
GND
INC2
N.C.
FB123
CTL
+
−
+INC1
N.C.
INC2
−INC1
OUTC2
SEL
N.C.
+INE2
8
9
14
10
11
12
13
(LCC-28P-M11)
Note : Connect IC’s radiation board at bottom side to potential of GND.
6
MB39A125/126
■ PIN DESCRIPTIONS
• MB39A125 : SSOP-24
Pin No.
Pin Name
I/O
Description
1
2
3
4
−INC2
I
O
I
Current detection amplifier (Current Amp2) inverted input terminal
Current detection amplifier (Current Amp2) output terminal
Error amplifier (Error Amp2) non-inverted input terminal
Error amplifier (Error Amp2) inverted input terminal
OUTC2
+INE2
−INE2
I
AC adapter voltage detection block (AC Comp.) output terminal
ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L,
ACOK = Hi-Z when CTL = L
5
ACOK
O
6
7
VREF
ACIN
O
I
Reference voltage output terminal
AC adapter voltage detection block (AC Comp.) input terminal
Error amplifier (Error Amp1) inverted input terminal
Error amplifier (Error Amp1) non-inverted input terminal
Current detection amplifier (Current Amp1) output terminal
8
−INE1
+INE1
OUTC1
I
9
I
10
O
When IC is standby mode, this terminal is set to “Hi-Z” to prevent loss
of inefficient current through the output voltage setting resistor.
Set CTL terminal to “H” level to output “L” level.
11
OUTD
O
12
13
−INC1
+INC1
I
I
Current detection amplifier (Current Amp1) inverted input terminal
Current detection amplifier (Current Amp1) non-inverted input terminal
Power supply control terminal
14
CTL
I
Setting the CTL terminal at “L” level places the IC in the standby
mode.
15
16
17
FB123
−INE3
RT
O
I
Error amplifier (Error Amp1, 2, 3) output terminal
Error amplifier (Error Amp3) inverted input terminal
⎯
Triangular wave oscillation frequency setting resistor connection terminal
AC adapter voltage detection block ( AC Comp.) output terminal
XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L,
XACOK = Hi-Z when CTL = L
18
XACOK
O
19
20
VH
O
O
Power supply terminal for FET drive circuit (VH = VCC − 6 V)
OUT
External FET gate drive terminal
Power supply terminal for reference voltage, control circuit, and output cir-
cuit
21
VCC
⎯
22
23
24
CS
⎯
⎯
I
Soft-start setting capacitor connection terminal
Ground terminal
GND
+INC2
Current detection amplifier (Current Amp2) non-inverted input terminal
7
MB39A125/126
• MB39A125 : QFN-28
Pin No.
Pin Name
I/O
⎯
⎯
I
Description
1
2
3
4
5
6
7
8
N.C.
No connection
GND
Ground terminal
+INC2
N.C.
Current detection amplifier (Current Amp2) non-inverted input terminal
No connection
⎯
I
−INC2
OUTC2
+INE2
−INE2
Current detection amplifier (Current Amp2) inverted input terminal
Current detection amplifier (Current Amp2) output terminal
Error amplifier (Error Amp2) non-inverted input terminal
Error amplifier (Error Amp2) inverted input terminal
O
I
I
AC adapter voltage detection block (AC Comp.) output terminal
ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L,
ACOK = Hi-Z when CTL = L
9
ACOK
O
10
11
12
13
14
15
VREF
ACIN
O
I
Reference voltage output terminal
AC adapter voltage detection block (AC Comp.) input terminal
Error amplifier (Error Amp1) inverted input terminal
Error amplifier (Error Amp1) non-inverted input terminal
Current detection amplifier (Current Amp1) output terminal
No connection
−INE1
+INE1
OUTC1
N.C.
I
I
O
⎯
When IC is standby mode, this terminal is set to “Hi-Z” to prevent loss
of inefficient current through the output voltage setting resistor.
Set CTL terminal to “H” level to output “L” level.
16
OUTD
O
17
18
19
−INC1
N.C.
I
⎯
I
Current detection amplifier (Current Amp1) inverted input terminal
No connection
+INC1
Current detection amplifier (Current Amp1) non-inverted input terminal
Power supply control terminal
20
CTL
I
Setting the CTL terminal at “L” level places the IC in the standby
mode.
21
22
23
FB123
−INE3
RT
O
I
Error amplifier (Error Amp1, 2, 3) output terminal
Error amplifier (Error Amp3) inverted input terminal
⎯
Triangular wave oscillation frequency setting resistor connection terminal
AC adapter voltage detection block ( AC Comp.) output terminal
XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L,
XACOK = Hi-Z when CTL = L
24
XACOK
O
25
26
VH
O
O
Power supply terminal for FET drive circuit (VH = VCC - 6 V)
External FET gate drive terminal
OUT
Power supply terminal for reference voltage, control circuit, and output cir-
cuit
27
28
VCC
CS
⎯
⎯
Soft-start setting capacitor connection terminal
8
MB39A125/126
• MB39A126 : SSOP-24
Pin No.
Pin Name
I/O
Description
1
2
3
4
−INC2
I
O
I
Current detection amplifier (Current Amp2) inverted input terminal
Current detection amplifier (Current Amp2) output terminal
Error amplifier (Error Amp2) non-inverted input terminal
Error amplifier (Error Amp2) inverted input terminal
OUTC2
+INE2
−INE2
I
AC adapter voltage detection block (AC Comp.) output terminal
ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L,
ACOK = Hi-Z when CTL = L
5
ACOK
O
6
7
VREF
ACIN
O
I
Reference voltage output terminal
AC adapter voltage detection block (AC Comp.) input terminal
Error amplifier (Error Amp1) inverted input terminal
Error amplifier (Error Amp1) non-inverted input terminal
Current detection amplifier (Current Amp1) output terminal
8
−INE1
+INE1
OUTC1
I
9
I
10
O
Charge voltage setting switch terminal (3cells or 4cells)
SEL terminal “H” level : Charge voltage setting 16.8 V (4cells)
SEL terminal “L” level : Charge voltage setting 12.6 V (3cells)
11
SEL
I
12
13
−INC1
+INC1
I
I
Current detection amplifier (Current Amp1) inverted input terminal
Current detection amplifier (Current Amp1) non-inverted input terminal
Power supply control terminal
Setting the CTL terminal at “L” level places the IC in the standby mode.
14
CTL
I
15
16
17
FB123
−INE3
RT
O
I
Error amplifier (Error Amp1, 2, 3) output terminal
Error amplifier (Error Amp3) inverted input terminal
⎯
Triangular wave oscillation frequency setting resistor connection terminal
AC adapter voltage detection block ( AC Comp.) output terminal
XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L,
XACOK = Hi-Z when CTL = L
18
XACOK
O
19
20
VH
O
O
Power supply terminal for FET drive circuit (VH = VCC - 6 V)
External FET gate drive terminal
OUT
Power supply terminal for reference voltage, control circuit, and output cir-
cuit
21
VCC
⎯
22
23
24
CS
⎯
⎯
I
Soft-start setting capacitor connection terminal
Ground terminal
GND
+INC2
Current detection amplifier (Current Amp2) non-inverted input terminal
9
MB39A125/126
• MB39A126 : QFN-28
Pin No.
Pin Name
I/O
⎯
⎯
I
Description
1
2
3
4
5
6
7
8
N.C.
No connection
GND
Ground terminal
+INC2
N.C.
Current detection amplifier (Current Amp2) non-inverted input terminal
No connection
⎯
I
−INC2
OUTC2
+INE2
−INE2
Current detection amplifier (Current Amp2) inverted input terminal
Current detection amplifier (Current Amp2) output terminal
Error amplifier (Error Amp2) non-inverted input terminal
Error amplifier (Error Amp2) inverted input terminal
O
I
I
AC adapter voltage detection block (AC Comp.) output terminal
ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L,
ACOK = Hi-Z when CTL = L
9
ACOK
O
10
11
12
13
14
15
VREF
ACIN
O
I
Reference voltage output terminal
AC adapter voltage detection block (AC Comp.) input terminal
Error amplifier (Error Amp1) inverted input terminal
Error amplifier (Error Amp1) non-inverted input terminal
Current detection amplifier (Current Amp1) output terminal
No connection
−INE1
+INE1
OUTC1
N.C.
I
I
O
⎯
Charge voltage setting switch terminal (3cells or 4cells) .
SEL terminal “H” level : Charge voltage setting 16.8 V (4cells)
SEL terminal “L” level : Charge voltage setting 12.6 V (3cells)
16
SEL
I
17
18
19
−INC1
N.C.
I
⎯
I
Current detection amplifier (Current Amp1) inverted input terminal
No connection
+INC1
Current detection amplifier (Current Amp1) non-inverted input terminal
Power supply control terminal
20
CTL
I
Setting the CTL terminal at “L” level places the IC in the standby
mode.
21
22
23
FB123
−INE3
RT
O
I
Error amplifier (Error Amp1, 2, 3) output terminal
Error amplifier (Error Amp3) inverted input terminal
⎯
Triangular wave oscillation frequency setting resistor connection terminal
AC adapter voltage detection block ( AC Comp.) output terminal
XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L,
XACOK = Hi-Z when CTL = L
24
XACOK
O
25
26
VH
O
O
Power supply terminal for FET drive circuit (VH = VCC - 6 V)
External FET gate drive terminal
OUT
Power supply terminal for reference voltage, control circuit, and output cir-
cuit
27
28
VCC
CS
⎯
⎯
Soft-start setting capacitor connection terminal
10
MB39A125/126
■ BLOCK DIAGRAMS
• MB39A125
ACIN
7
ACOK
5
XACOK
18
<AC Comp.>
+
−
−INE1
8
1.4 V
<Current Amp1>
VREF
OUTC1 10
13
+
×20
−
+INC1
<Error Amp1>
0.2 V
<UV Comp.>
−INC1
−
12
+
+
−
−
INC1
(Vo)
+INE1
−INE2
9
4
21
20
VCC
OUT
<PWM Comp.>
+
<Current Amp2>
2
OUTC2
<Error Amp2>
−
<OUT>
−
24
+
×20
−
+INC2
−INC2
Drive
+
1
3
+INE2
−2.5 V
−1.5 V
19 VH
FB123
15
(VCC − 6 V)
VH
Bias
<Error Amp3>
Voltage
−INE3
16
11
−
+
OUTD
<UVLO>
4.2 V
VREF
UVLO
< SOFT>
4.2 V
Bias
VREF
VCC
Slope
Control
10 µA
<OSC>
500 kHz Max
14
<REF>
<CTL>
CTL
22
CS
VREF
5.0 V
C
T
(45 pF)
23
6
17
RT
VREF
GND
11
MB39A125/126
• MB39A126
ACIN
7
ACOK
5
XACOK
18
<AC Comp.>
+
−
−INE1
8
1.4 V
<Current Amp1>
VREF
OUTC1 10
13
+
×20
−
+INC1
<Error Amp1>
0.2 V
<UV Comp.>
−INC1
−
12
+
+
−
−INC1
+INE1
−INE2
9
4
(Vo)
21
VCC
<PWM Comp.>
+
<Current Amp2>
2
OUTC2
<Error Amp2>
−
<OUT>
−
24
+
×20
−
+INC2
−INC2
Drive
20 OUT
+
1
3
+INE2
−2.5 V
−1.5 V
19
VH
FB123
15
(VCC − 6 V)
VH
Bias
Voltage
<Error Amp3>
R1
R2
−INE3 16
−
+
<UVLO>
4.2 V/3.15 V
VREF
UVLO
SEL 11
Hi : 4 Cells
Lo : 3 Cells
< SOFT>
4.2 V
Bias
VREF
VCC
Slope
Control
10 µA
<OSC>
500 kHz Max
14
<REF>
<CTL>
CTL
22
CS
VREF
5.0 V
C
T
(45 pF)
23
6
17
RT
VREF
GND
12
MB39A125/126
■ ABSOLUTE MAXIMUM RATINGS
Rating
Unit
Parameter
Symbol
Condition
Min
Max
Power supply voltage
Output current
VCC
IOUT
IOUT
VCC terminal
⎯
⎯
⎯
28
V
60
mA
mA
mW
mW
°C
Peak output current
Duty ≤ 5% (t = 1 / fosc × Duty)
Ta ≤ +25 °C (SSOP-24)
Ta ≤ +25 °C (QFN-28)
⎯
⎯
700
⎯
740*1
3700*2
+125
Power dissipation
PD
⎯
Storage temperature
TSTG
−55
*1 : When mounted on a 10cm square epoxy double-sided.
*2 : The packages are mounted on the dual-sided epoxy board (10 cm × 10 cm) . Connect IC’s radiation board at
bottom side to potential of GND.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
13
MB39A125/126
■ RECOMMENDED OPERATION CONDITIONS
Value
TYP
⎯
Parameter
Symbol
Condition
VCC terminal
Unit
MIN
8
MAX
25
Power supply voltage
VCC
IREF
IVH
V
mA
mA
V
Reference voltage Output current
VH terminal output current
⎯
−1
0
⎯
0
⎯
⎯
30
VINE
VINC
VCTL
IOUT
+INE, −INE terminal
0
⎯
5
Input voltage
+INC, −INC terminal
0
⎯
VCC
25
V
CTL terminal input voltage
Output current
⎯
⎯
0
⎯
V
−45
⎯
+45
mA
Duty ≤ 5%
(t = 1 / fosc × Duty)
Peak output current
IOUT
−600
⎯
+600
mA
ACIN terminal input Voltage
ACOK terminal output voltage
ACOK terminal output current
XACOK terminal output voltage
XACOK terminal output current
VACIN
VACOK
IACOK
⎯
⎯
⎯
⎯
⎯
0
0
0
0
0
⎯
⎯
⎯
⎯
⎯
VCC
25
1
V
V
mA
V
VXACOK
IXACOK
25
1
mA
OUTD terminal output voltage :
MB39A125
VOUTD
IOUTD
VSEL
⎯
⎯
⎯
0
0
0
⎯
⎯
⎯
17
2
V
mA
V
OUTD terminal output current :
MB39A125
SEL terminal input voltage :
MB39A126
25
Oscillation frequency
fOSC
RT
⎯
⎯
⎯
⎯
⎯
⎯
100
27
300
47
500
130
1.0
1.0
kHz
kΩ
µF
µF
µF
°C
Timing resistor
Soft-start capacitor
CS
⎯
0.22
0.1
VH terminal capacitor
CVH
CREF
Ta
⎯
Reference voltage output capacitor
Operating ambient Temperature
⎯
0.22
+25
1.0
+85
−30
Note : The terminal number which has been described in the text is the one of the SSOP-24P package after this.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
14
MB39A125/126
■ ELECTRICAL CHARACTERISTICS
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
Value
Sym- Pin
Parameter
Condition
Unit Remarks
bol
No.
Min
4.963 5.000 5.037
Ta = −10 °C to +85 °C 4.95 5.000 5.05
Ta = +25 °C 4.943 4.980 5.017
Ta = −10 °C to +85 °C 4.930 4.980 5.030
Typ Max
VREF1
VREF2
VREF1
VREF2
Line
6
6
6
6
6
6
Ta = +25 °C
V
V
MB39A125
MB39A125
MB39A126
MB39A126
Output voltage
V
1.
Reference
voltage block
[REF]
V
Input stability
Load stability
VCC = 8 V to 25 V
⎯
⎯
3
1
10
10
mV
mV
Load
VREF = 0 mA to −1 mA
Output current
at short circuit
Ios
6
VREF = 1 V
−50
−25
−12 mA
2.
VTLH
VTHL
6
6
VREF =
VREF =
2.6
2.4
2.8
2.6
3.0
2.8
V
V
Threshold
voltage
Under voltage
lockout
protection
circuit block
[UVLO]
Hysteresis
width
VH
6
⎯
⎯
⎯
0.2*
⎯
V
3.
Charge
current
Softstartblock
[SOFT]
ICS
22
−14
270
⎯
−10
300
1*
−6
µA
Oscillation
frequency
fOSC
20 RT = 47 kΩ
330 kHz
4.
Triangular
waveoscillator
block [OSC]
Frequency
temperature
stability
∆f/fdt 20 Ta = −30 °C to +85 °C
⎯
%
Input offset
voltage
3, 4,
8, 9
VIO
IB
FB123 = 2 V
⎯
1
5
mV
nA
Input bias
current
3, 4,
8, 9
⎯
−100 −30
⎯
Common
mode input
voltage range
3, 4,
8, 9
VCM
⎯
0
⎯
5
V
5-1.
Error amplifier
block
[Error Amp1,
Error Amp2]
Voltage gain
Av
15 DC
⎯
⎯
100*
1.3*
⎯
⎯
dB
Frequency
bandwidth
BW
15 AV = 0 dB
MHz
VFBH
VFBL
15
15
⎯
⎯
4.8
5.0
0.8
⎯
V
V
Output voltage
⎯
0.9
Output source
current
ISOURCE 15 FB123 = 2 V
ISINK 15 FB123 = 2 V
⎯
−120 −60
4.0
µA
Output sink
current
2.0
⎯
mA
* : Standard design value
(Continued)
15
MB39A125/126
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
Value
Sym-
Pin
No.
Parameter
bol
Condition
Unit Remarks
Min
Typ
Max
Input
IINE
16
15
15
−INE3 = 0 V
−100
−30
⎯
nA MB39A125
current
Voltage
Av
DC
⎯
⎯
100*
1.3*
⎯
⎯
dB
gain
Frequency
BW
AV = 0 dB
MHz
bandwidth
VFBH
VFBL
15
15
⎯
⎯
4.8
5.0
0.8
⎯
V
V
Output
voltage
⎯
0.9
Output
source
current
ISOURCE
15
FB123 = 2 V
⎯
−120
−60
µA
Outputsink
current
ISINK
VTH1
VTH2
VTH3
VTH4
VTH5
VTH6
15
16
16
12
12
12
12
FB123 = 2 V
2.0
4.0
⎯
mA
FB123 = 2 V,
Ta = +25 °C
4.179 4.200 4.220
4.169 4.200 4.231
16.700 16.800 16.900
16.666 16.800 16.934
12.525 12.600 12.675
12.500 12.600 12.700
V
V
V
V
V
V
MB39A125
MB39A125
MB39A126
MB39A126
MB39A126
MB39A126
FB123 = 2 V,
Ta = −10 °C to +85 °C
5-2.
Error
amplifier
block
[Error
Amp3]
SEL = 5 V, FB123 = 2 V,
Ta = +25 °C
Threshold
voltage
SEL = 5 V, FB123 = 2 V,
Ta = −10 °C to +85 °C
SEL = 0 V, FB123 = 2 V,
Ta = +25 °C
SEL = 0 V, FB123 = 2 V,
Ta = −10 °C to +85 °C
OUTD
terminal
output leak
current
ILEAK
11
OUTD = 17 V
⎯
0
1
µA MB39A125
OUTD
terminal
output ON
resistance
RON
11
12
OUTD = 1 mA
−INC1 = 16.8 V
⎯
⎯
35
84
50
Ω
MB39A125
Input
current
IIN
150
µA MB39A126
R1
R2
12, 16
16
⎯
⎯
105
35
150
50
195
65
kΩ MB39A126
kΩ MB39A126
Input
resistance
* : Standard design value
(Continued)
16
MB39A125/126
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
Value
Sym-
bol
Parameter
Pin No.
Condition
Error Amp3
Unit Remarks
Min
Typ
Max
reference voltage
= 4.2 V
(4-cell setting)
VON
11
2
⎯
25
V
V
MB39A126
MB39A126
5-2.
Error
amplifier
block
SEL input
voltage
Error Amp3
reference voltage
= 3.15 V
VOFF
11
0
⎯
0.8
[Error Amp3]
(3-cell setting)
ISELH
ISELL
11
11
SEL = 5 V
SEL = 0 V
⎯
⎯
50
0
100
1
µA MB39A126
µA MB39A126
Input
current
Input
offset
voltage
+INC1 = +INC2 =
−INC1 = −INC2 =
3 V to VCC
1, 12,
13, 24
VIO
−3
⎯
⎯
20
+3
30
mV
+INC1 = +INC2 =
I+INCH
13, 24 3 V to VCC,
µA
∆VIN = −100 mV
+INC1 = +INC2 =
1, 12 3 V to VCC,
∆VIN = −100 mV
⎯
0.1
0.1
0.2
0.2
µA MB39A125
µA MB39A126
I-INCH
Input
current
+INC1 = +INC2 =
3 V to VCC,
1
⎯
∆VIN = −100 mV
+INC1 = +INC2 = 0 V,
∆VIN = −100 mV
6.
I+INCL
13, 24
1, 12
−180 −120
−195 −130
⎯
⎯
µA
µA
Current
Detection
Amplifier
B l o c k
[Current
Amp1,
Current
Amp2]
+INC1 = +INC2 = 0 V,
∆VIN = −100 mV
I-INCL
+INC1 = +INC2 =
2, 10 3 V to VCC,
VOUTC1
1.9
2.0
2.1
V
V
∆VIN = −100 mV
+INC1 = +INC2 =
2, 10 3 V to VCC,
∆VIN = −20 mV
Current
detection
voltage
VOUTC2
0.34
0.40
0.46
+INC1 = +INC2 = 0 V,
2, 10
VOUTC3
VOUTC4
1.8
0.2
2.0
0.4
2.2
0.6
V
V
∆VIN = −100 mV
+INC1 = +INC2 = 0 V,
∆VIN = −20 mV
2, 10
Common
mode input
voltage
1, 12,
⎯
VCM
Av
0
⎯
VCC
21
V
13, 24
range
+INC1 = +INC2 =
2, 10 3 V to VCC,
∆VIN = −100 mV
Voltage
gain
19
20
V/V
(Continued)
17
MB39A125/126
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
Value
Re-
Sym-
bol
Parameter
Frequency
Pin No.
Condition
Unit
marks
Min
Typ
Max
BW
2, 10 AV = 0 dB
⎯
2*
⎯
MHz
6.
bandwidth
Current
Detection
Amplifier
Block
[Current
Amp1,
Current
Amp2]
VOUTCH
VOUTCL
2, 10
2, 10
⎯
⎯
4.7
4.9
20
⎯
V
Output
voltage
⎯
200
mV
Output
source cur- ISOURCE
rent
2, 10 OUTC1 = OUTC2 = 2 V
⎯
−2
−1
mA
Outputsink
ISINK
2, 10 OUTC1 = OUTC2 = 2 V 150
300
1.5
⎯
⎯
µA
current
7.
VTL
15
Duty cycle = 0%
1.4
V
PWMComp.
Block
[PWM
Comp.]
Threshold
voltage
VTH
15
Duty cycle = 100%
⎯
2.5
2.6
V
Output
source cur- ISOURCE
rent
OUT = 13 V,
20
20
Duty ≤ 5%
⎯
⎯
−400*
⎯
⎯
mA
mA
(t = 1 / fosc × Duty)
OUT = 19 V,
Duty ≤ 5%
(t = 1 / fosc × Duty)
Outputsink
ISINK
8.
400*
current
Output
block
[OUT]
ROH
ROL
tr1
20
20
20
20
OUT = −45 mA
OUT = 45 mA
OUT = 3300 pF
OUT = 3300 pF
⎯
⎯
⎯
⎯
6.5
5.0
50*
50*
9.8
7.5
⎯
Ω
Ω
Output ON
resistance
Rise time
Fall time
ns
ns
tf1
⎯
VCC =
,
9.
VTLH
VTHL
VH
21
21
21
17.2
16.8
⎯
17.4
17.0
0.4*
17.6
17.2
⎯
V
V
V
−INC1 = 16.8 V
Threshold
voltage
Low Input
Voltage
Detection
Block
VCC =
−INC1 = 16.8 V
,
Hysteresis
width
⎯
[UV Comp.]
10.
VTLH
VTHL
7
7
ACIN =
ACIN =
1.3
1.2
1.4
1.3
1.5
1.4
V
V
Threshold
voltage
AC Adapter
Voltage
Detection
Block
Hysteresis
width
VH
7
⎯
⎯
0.1*
⎯
V
[AC Comp.]
* : Standard design value
(Continued)
18
MB39A125/126
(Continued)
(VCC = 19 V, VREF = 0 mA, Ta = +25 °C)
Value
Re-
Sym- Pin
Parameter
Condition
Unit
bol
No.
marks
Min
Typ
Max
ACOK
terminal
output leak
current
ILEAK
5
ACOK = 25 V
⎯
0
1
µA
Ω
ACOK
terminal
output ON
resistance
10.
RON
ILEAK
RON
5
ACOK = 1 mA
⎯
⎯
⎯
200
0
400
1
AC Adapter
Voltage
Detection
Block
XACOK
terminal
output leak
current
18 XACOK = 25 V
18 XACOK = 1 mA
µA
Ω
[AC Comp.]
XACOK
terminal
output ON
resistance
200
400
11.
VON
VOFF
ICTLH
ICTLL
14 IC operation mode
14 IC standby mode
14 CTL = 5 V
2
0
⎯
⎯
25
0.8
150
1
V
V
CTL input
voltage
Power
Supply
Control
Block
[CTL]
⎯
⎯
100
0
µA
µA
Input current
14 CTL = 0 V
12.
BiasVoltage Output
VCC = 8 V to 25 V,
19
VCC −
6.5
VCC −
6.0
VCC −
5.5
VH
V
Block
[VH]
Voltage
VH = 0 mA to 30 mA
Standby
current
ICCS
21 CTL = 0 V
21 CTL = 5 V
⎯
⎯
0
5
10
µA
13.
General
Power
supply
current
ICC
7.5
mA
* : Standard design value
19
MB39A125/126
■ TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage
CTL Terminal Input Current, Reference Voltage vs.
CTL Terminal Input Voltage
6
5
4
3
2
1000
900
800
700
600
500
400
300
200
100
0
10
9
8
7
6
5
4
3
2
1
0
Ta = +25 °C
VCC = 19 V
VREF = 0 mA
VREF
ICTL
Ta = +25 °C
CTL = 5 V
1
0
0
5
10
15
20
25
0
5
10
15
20
25
Power supply voltage VCC (V)
CTL terminal input voltage VCTL (V)
Reference Voltage vs. Power Supply Voltage
Reference Voltage vs. Load Current
6
5
4
3
2
1
0
6
5
4
3
2
1
0
Ta = +25 °C
VCC = 19 V
CTL = 5 V
Ta = +25 °C
CTL = 5 V
VREF = 0 mA
0
5
10
15
20
25
30
35
0
5
10
15
20
25
Power supply voltage VCC (V)
Load current IREF (mA)
Reference Voltage vs.
Operating Ambient Temperature
Triangular Wave Oscillation Frequency vs.
Power Supply Voltage
340
330
320
310
300
290
280
270
260
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
Ta = +25 °C
CTL = 5 V
VCC = 19 V
CTL = 5 V
RT = 47 kΩ
VREF = 0 mA
−40
−20
0
20
40
60
80
100
0
5
10
15
20
25
Operating ambient temperature Ta ( °C)
Power Supply Voltage VCC (V)
(Continued)
20
MB39A125/126
Triangular Wave Oscillation Frequency vs.
Operating Ambient Temperature
Triangular Wave Oscillation Frequency vs.
Timing Resistor
340
330
320
310
300
290
280
270
260
1000
VCC = 19 V
CTL = 5 V
Ta = +25 °C
VCC = 19 V
CTL = 5 V
RT = 47 kΩ
100
10
10
100
1000
−40
−20
0
20
40
60
80
100
Operating ambient temperature Ta ( °C)
<MB39A125>
Error Amplifier Threshold Voltage vs.
Operating Ambient Temperature
Timing resistor RT (kΩ)
4.28
4.26
4.24
4.22
4.20
4.18
4.16
4.14
4.12
VCC = 19 V
CTL = 5 V
VREF = 0 mA
−40
−20
0
20
40
60
80
100
Operating ambient temperature Ta ( °C)
<MB39A126>
Error Amplifier Threshold Voltage vs.
Error Amplifier Threshold Voltage vs.
Operating Ambient Temperature
Operating Ambient Temperature
16.90
16.85
16.80
16.75
16.70
12.70
12.65
12.60
12.55
12.50
VCC = 19 V
VCC = 19 V
CTL = 5 V
SEL = 0 V
CTL = 5 V
SEL = 5 V
−40 −20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
Operating ambient temperature Ta ( °C)
Operating ambient temperature Ta ( °C)
(Continued)
21
MB39A125/126
Error Amplifier, Gain, Phase vs. Frequency
Vcc = 19 V
Ta = +25 °C
4.2 V
240 kΩ
VCC = 19 V
40
30
180
90
10
10
kΩ
kΩ
20
−INE1, 2
IN
φ
2.4 kΩ
1 µ+F
OUT
FB123
15
8
−
10
(4)
Av
0
0
+
9
(3)
+INE1, 2
−10
−20
−30
−40
10
kΩ
10
kΩ
Error Amp1
(Error Amp2)
−90
−180
100
1k
10k
100k
1M
10M
Frequency f (Hz)
Error Amplifier, Gain, Phase vs. Frequency
Ta = +25 °C
40
30
VCC = 19 V 180
240 kΩ
10
20
90
kΩ
φ
10
−INE3
16
IN
1µF
2.4 kΩ
Av
+
OUT
FB123
15
−
+
0
0
−10
−20
−30
−40
−90
−180
10
kΩ
4.2 V
Error Amp3
100
1k
10k
100k
1M
10M
Frequency f (Hz)
Current Detection Amplifier, Gain, Phase vs. Frequency
VCC = 19 V
+INC
40
30
180
90
13
(24)
+
OUTC
Av
×20
10
−INC
−
20
12
(2)
OUT
(1)
10
Current Amp1
(Current Amp2)
0
0
φ
−10
−20
−30
−40
12.55 V
12.6 V
−90
−180
100
1k
10k
100k
1M
10M
Frequency f (Hz)
(Continued)
22
MB39A125/126
(Continued)
Power Dissipation vs.
Operating Ambient Temperature (SSOP)
Power Dissipation vs.
Operating Ambient Temperature (QFN)
800
4000
740
700
3700
3500
600
500
400
300
200
100
0
3000
2500
2000
1500
1000
500
0
−40
−20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
Operating ambient temperature Ta ( °C)
Operating ambient temperature Ta ( °C)
23
MB39A125/126
■ FUNCTIONAL DESCRIPTION
1. DC/DC Converter Block
(1) Reference voltage block (REF)
The reference voltage circuit uses the voltage supplied from the VCC terminal (pin 21) to generate a temperature
compensated, stable voltage (5.0 V Typ) used as the reference power supply voltage for the IC’s internal circuitry.
This block can also be used to obtain a load current to a maximum of 1 mA from the reference voltage VREF
terminal (pin 6) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator block has built-in capacitor for frequency setting into and generates the triangular
wave oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator circuits on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current Amp1) , compares this to
the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charge current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB123 terminal (pin 15) and −INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier detects the output signal from the current detection amplifier (Current Amp2) , compares this to
the +INE2 terminal (pin 3) , and outputs a PWM control signal to be used in controlling the charge current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB123 terminal (pin 15) and −INE2 terminal (pin 4) , providing stable phase compensation to the system.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM
control signal. MB39A125 can set the desired level of output voltage from 1 cell to 4 cells by connecting external
output voltage setting resistors to the error amplifier inverted input terminal. MB39A126 can set the output voltage
for 3 cells or 4 cells by SEL terminal (pin 11) input.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB123
terminal (pin 15) to the −INE3 terminal (pin 16) , enabling stable phase compensation to the system.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the
output sense resistor (RS2) due to the flow of the charge current, using the +INC1 terminal (pin 13) and −INC1
terminal (pin 12) . The signal amplified to 20 times is output to the OUTC1 terminal (pin 10) .
24
MB39A125/126
(7) Current detection amplifier block (Current Amp2)
The current detection amplifier (Current Amp2) detects a voltage drop which occurs between both ends of the
output sense resistor (RS1) due to the flow of the AC adapter current, using the +INC2 terminal (pin 24) and
−INC2 terminal (pin 1) . The signal amplified to 20 times is output to the OUTC2 terminal (pin 2) .
(8) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave voltage the lowest generated by the triangular wave
oscillator to the error amplifier output voltage and turns on the external output transistor, during the interval in
which the triangular wave voltage is lower than the error amplifier output voltage.
(9) Output block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external Pch MOS FET.
The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block
(VH) .
This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external
transistor in a wide range of input voltages.
(10) Power supply control block (CTL)
Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The power supply current is 10µA at
maximum in the standby mode.)
CTL function table : MB39A125
CTL
L
Power
OUTD
Hi-Z
L
OFF (Standby)
ON (Active)
H
CTL function table : MB39A126
CTL
Power
L
OFF (Standby)
ON (Active)
H
(11) Bias voltage block (VH)
The bias voltage circuit outputs VCC − 6 V (Typ) as the minimum potential of the output circuit. In the standby
mode, this circuit outputs the potential equal to VCC.
25
MB39A125/126
2. Protection Functions
(1) Under voltage lockout protection circuit block (UVLO)
The transient state or a momentary decrease in power supply voltage or internal reference voltage (VREF) ,
which occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in
breakdown or deterioration of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects internal reference voltage drop
and fixes the OUT terminal (pin 20) to the “H” level. The system restores voltage supply when the internal
reference voltage reaches the threshold voltage of the under voltage lockout protection circuit.
Protection circuit (UVLO) operation function table : MB39A125
When UVLO is operating (VREF voltage is lower than UVLO threshold voltage, the logic of the following terminal
is fixed.)
OUTD
OUT
CS
ACOK
XACOK
Hi-Z
H
L
H
L
Protection circuit (UVLO) operation function table : MB39A126
When UVLO is operating (VREF voltage is lower than UVLO threshold voltage, the logic of the following terminal
is fixed.)
OUT
CS
ACOK
XACOK
H
L
H
L
(2) Low input voltage detection block (UV Comp.)
UV Comp. detects that power supply voltage (VCC) is lower than the battery voltage +0.2 V (Typ) and fixes the
OUT terminal (pin 20) to the “H” level.
The system restores voltage supply when the power supply voltage reaches the threshold voltage of the AC
adapter detection block.
Protection circuit (UV Comp.) operation function table : MB39A125
When UV Comp. is operating (VCC voltage is lower than UV Comp. threshold voltage, the logic of the following
terminal is fixed.)
OUTD
OUT
CS
L
H
L
Protection circuit (UV Comp.) operation function table : MB39A126
When UV Comp. is operating (VCC voltage is lower than UV Comp. threshold voltage, the logic of the following
terminal is fixed.)
OUT
CS
H
L
26
MB39A125/126
3. Detection Function
(1) AC adapter voltage detection block (AC Comp.)
When ACIN terminal (pin 7) voltage is lower than 1.3 V (Typ) , AC adapter voltage detection block (AC Comp.)
outputs “Hi-Z” level to the ACOK terminal (pin 5) and outputs “L” level to the XACOK terminal (pin 18) . When
CTLterminal(pin14)issetto“L”level, ACOKterminal(pin5)andXACOKterminal(pin18)arefixedto“Hi-Z”level.
ACIN
ACOK
L
XACOK
Hi-Z
L
H
L
Hi-Z
4. Switch Function : MB39A126
The charge voltage can be set to 16.8 V/12.6 V with the SEL terminal (pin 11) .
SEL function table
SEL
H
DC/DC output setting voltage
16.8 V
12.6 V
L
27
MB39A125/126
■ CONSTANT CHARGING VOLTAGE AND CURRENT OPERATION
MB39A125/126 is DC/DC converter with the pulse width modulation (PWM) .
MB39A125 is in the output voltage control loop, the Error Amp3 compares internal voltage reference voltage
4.2 V and DC/DC converter output to output the PWM controlled signal.
MB39A126 is in the output voltage control loop, the Error Amp3 compares internal voltage reference voltage
4.2 V/3.15 V and DC/DC converter output to output the PWM controlled signal.
In the charging current control loop, the voltage drop generated at both ends of charging current sense resistor
(RS2) is sensed by +INC1 terminal (pin 13) , −INC1 terminal (pin 12) of Current Amp1, and the signal is output
to OUTC1 terminal (pin 10) , which is amplified by 20 times. Error Amp1 compares the OUTC1 terminal (pin
10) voltage, which is the output of Current Amp1, and +INE1 terminal (pin 9) to output the PWM control signal
and regulates the charging current.
In the AC adapter current control loop, the voltage drop generated at both ends of AC adapter current sense
resistor (RS1) is sensed by +INC2 terminal (pin 24) , −INC2 terminal (pin 1) of Current Amp2, and the signal is
output to OUTC2 terminal (pin 2) , which is amplified by 20 times. Error Amp2 compares OUTC2 terminal (pin
2) voltage, which is output of Current Amp2, and +INE2 terminal (pin 3) voltage and outputs PWM controlled
signal, and it limits the charging current due to the AC adapter current not to exceed the setting value.
The PWM comparator compares the triangular wave to the smallest terminal voltage among the Error AMP1,
Error AMP2 and Error AMP3. And the triangular wave voltage generated by the triangular wave oscillator. When
the triangular wave voltage is smaller than the error amplifier output voltage, the main side output transistor is
turned on.
28
MB39A125/126
■ SETTING THE CHARGE VOLTAGE
MB39A125
The charging voltage (DC/DC output voltage) can be set by connecting external output voltage setting resistors
(R3, R4) to the −INE3 terminal (pin 16) . Be sure to select a resistor value that allows you to ignore the on-
resistance (35 Ω, 1 mA) of the internal FET connected to the OUTD terminal (pin 11) .
Battery charging voltage : Vo
Vo (V) = (R3 + R4) / R4 × 4.2 (V)
Vo
B
R3
−
INE3
<Error Amp3>
16
11
−
R4
+
4.2 V
OUTD
29
MB39A125/126
MB39A126
The setting of the charge voltage is switched to 3cells or 4cells by the SEL terminal (pin 11) .
Charge voltage is set to 16.8 V when SEL terminal is “H” level, and charge voltage is set to 12.6 V when SEL
terminal is “L” level.
Battery charging voltage : Vo
Vo (V) = (150 kΩ + 50 kΩ) / 50 kΩ × 4.2 (V) = 16.8 (V) (SEL = H)
Vo (V) = (150 kΩ + 50 kΩ) / 50 kΩ × 3.15 (V) = 12.6 (V) (SEL = L)
−INC1
12
16
R3
R4
150 kΩ
−INE3
<Error Amp3>
−
50 k
Ω
+
SEL
11
3.15 V
4.2 V
30
MB39A125/126
■ SETTING THE CHARGE CURRENT
The charge current value can be set at the analog voltage value of the +INE1 terminal (pin 9) .
Charge current formula : Ichg (A) = V+INE1 (V) / (20 × RS1 (Ω) )
Charge current setting voltage : V+INE1 (V) = 20 × Ichg (A) × RS1 (Ω)
■ SETTING THE INPUT CURRENT
The input limit current value can be set at the analog voltage value of the +INE2 terminal (pin 3) .
Input current formula : IIN (A) = V+INE2 (V) / (20 × RS2 (Ω) )
Input current setting voltage : V+INE2 (V) = 20 × IIN (A) × RS2 (Ω)
■ SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected to the RT terminal
(pin 17) .
Triangular wave oscillation frequency fosc
fosc (kHz) =: 14100 / RT (kΩ)
31
MB39A125/126
■ SETTING THE SOFT-START TIME
Soft-start function prevents rush current at start-up of IC when the Soft-start capacitor (Cs) is connected to the
CS terminal (pin 22) . This IC charges external soft-start capacitor (Cs) with 10 µA after CTL terminal (pin 14)
voltage level becomes high and IC starts (when VCC ≥ UVLO threshold voltage) .
Output ON duty depends on PWM comparator, which compares the FB123 terminal (pin 15) voltage with the
triangular wave oscillator output voltage.
During soft start, FB123 terminal (pin 15) voltage increases with sum voltage of CS terminal and diode voltage.
Therefore, the output voltage of the DC/DC converter and current increase can be set by output ON duty in
proportion to rise of CS terminal (pin 22) voltage. The ON Duty is affected by the ramp voltage of FB123 terminal
(pin 15) until an output voltage of one Error Amp reaches the DC/DC converter loop controlled voltage.
Soft-start time is obtained from the following formula :
Soft-start time : ts (time to output on duty 80 %)
ts (s) =: 0.13 × Cs (µF)
• Soft-start timing chart
CS
CT
FB123
CS
FB123
CT
0 V
OUT
OUT
0 V
Error Amp3 threshold voltage
Vo
Vo
0 V
Io
Io
0 A
32
MB39A125/126
■ TRANSIENT RESPONSE AT LOAD-STEP
The constant voltage control loop and the constant current control loop are independent. With the load-step,
these two control loops change.
The battery voltage and current overshoot are generated by the delay time of the control loop when the mode
changes. The delay time is determined by phase compensation constant. When the battery is removed if the
charge control is switched from the constant current control to the constant voltage control, and the charging
voltagedoes overshoot by generatingthe period controlled with high duty by output setting voltage. The excessive
voltage is not applied to the battery because the battery is not connected.
When the battery is connected if the charge control is switched from the constant voltage control to the constant
current control, and the charging current does overshoot by generating the period controlled with high duty by
charge current setting.
The battery pack manufacturer in Japan thinks it is not the problem the current overshoot of 10 ms or less.
• Timing chart at load-step
Error Amp3 Output
Error Amp1 Output
Error Amp1 Output
Constant Current
Error Amp3 Output
Constant Voltage
Constant Current
Battery Voltage
Battery Current
When charge control switches
from the constant current control to
the constant voltage control, the
voltage does overshoot by gener-
ating the period controlled with
high duty by output setting voltage.
The battery pack manufac-
turer in Japan thinks it is
not the problem the current
overshoot of 10 ms or less.
10 ms
33
MB39A125/126
■ AC ADAPTER DETECTION FUNCTION
When ACIN terminal (pin 7) voltage is lower than 1.3 V (Typ) , AC adapter voltage detection block (AC Comp.)
outputs “Hi-Z” level to the ACOK terminal (pin 5) and outputs “L” level to the XACOK terminal (pin 18) . When
CTLterminal(pin14)issetto“L”level, ACOKterminal(pin5)andXACOKterminal(pin18)arefixedto“Hi-Z”level.
(1) AC adapter presence
If you connect as shown in the figure below the presence of AC adapter can be easily detected because the
signal is output from the ACOK terminal (pin 5) to microcomputer etc. In this case, if the CTL terminal is set to
“L” level, IC becomes the standby state (ICC = 0 µA Typ).
• Connection example of detecting AC adapter presence
micon
AC adapter
ACIN
ACOK
XACOK
7
5
18
<AC Comp.>
+
−
34
MB39A125/126
(2) Automatic changing system power supply between AC adapter and battery
The AC adapter voltage is detected and external switch at input side and battery side can be changed automat-
ically with the connection as follows. Connect CTL terminal (pin 14) to VCC terminal (pin 21) for this function.
OFFdutycyclebecomes100% whenCSterminal(pin22)voltageismadetobe0V, ifitisneededafterfullcharge.
• Connection example of automatic changing system power supply between AC adapter and battery
System
AC adapter
Battery
ACIN
ACOK
XACOK
7
5
18
<AC Comp.>
+
−
VCC
CTL
21
14
< SOFT>
VREF
10 µA
CS
22
micon
35
MB39A125/126
(3) Battery selector function
When control signal from microcomputer etc. is input to ACIN terminal (pin 7) as shown in the following diagram,
ACOK terminal (pin 5) output voltage and XACOK terminal (pin 18) output voltage are controlled to select one
of the two batteries for charge. Connect CTL terminal (pin 14) to VCC terminal (pin 21) for this function. OFF
duty cycle becomes 100% when CS terminal (pin 22) voltage is made to be 0 V, if it is needed after full charge.
• Connection example of battery selector function
System
AC adapter
ACIN
ACOK
XACOK
A
B
7
5
18
I
CHG
<AC Comp.>
+
RS1
−
VCC
CTL
21
14
Battery1
Battery2
< SOFT>
VREF
10 µA
CS
micon
22
36
MB39A125/126
(4) When AC Comp. is not used
When AC Comp. (ACIN (pin 7) , ACOK (pin 5) , and XACOK (pin 18) terminals) is not used as follows, connect
the ACIN (pin 7) , ACOK (pin 5) , and XACOK (pin 18) terminals to GND terminal (pin 23) .
And connect VCC terminal (pin 21) to system, as follows, to avoid the reverse current from the battery to the
VCC terminal (pin 21) .
• Connection example when AC Comp. is not used
System
AC adapter
ACIN
ACOK
XACOK
7
5
18
A
B
I
CHG
<AC Comp.>
+
RS1
−
Battery
VCC
21
37
MB39A125/126
■ PHASE COMPENSATION
• Example Circuit
VIN
RS2
15mΩ
VCC
21
<Error Amp 3>
−INE3
<PWM Comp.>
−
16
<OUT>
+
Cc
OUT
VH
+
20
19
Drive
VH
I1
VBATT
Ro
Lo
RL
−
4.2 V
Rc
RS1
33 mΩ
−2.5V
−1.5V
FB123
15
Rin1
(VCC − 6V)
Co
ESR
Bias
Voltage
OSC
Rin2
Lo : Inductance
RL : Equivalent series resistance of inductance
Co : Capacity of condenser
ESR : Equivalent series resistance of condenser
Ro : Load resistance
• Frequency Characteristics of LC filter
Frequency characteristic of power output LC filter
(DC gain is included.)
90
80
180
160
140
120
100
80
Cut-off frequency
gain
phase
70
60
1
f1 (Hz) =
50
Gain
40
+
(Ro ESR)
30
60
×
×
2π Lo Co
20
40
+
(Ro RL)
10
20
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20
−40
−60
−80
−100
−120
−140
−160
−180
Phase
Lo = 15 µH
Co = 14.1 µF
Ro = 4.2 Ω
RL = 30 mΩ
ESR = 100 mΩ
1
10
100
1k
10k 100k
1M
10M
Frequency [Hz]
38
MB39A125/126
• Frequency Characteristics of Error Amp
Total frequency characteristic
90
80
180
160
total gain
70
AMP Open 140
Cut-off frequency
Loop Gain
total phase
60
120
100
80
50
1
40
f2(Hz) =
Gain
30
60
×
×
2π Rc Cc
20
40
10
20
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20
−40
−60
−80
−100
−120
−140
−160
−180
Rc = 150 kΩ
Cc = 3300 pF
Phase
10k
1
10
100
1k
100k
1M
Frequency [Hz]
• Frequency Characteristics of DC/DC converter
Total frequency characteristic
90
The overview of frequency characteristic
for DC/DC converter can be obtained in
combination between “Frequency
Characteristics of LC filter” and
“Frequency Characteristics of Error Amp ”
as mentioned above.
Please note the following point in order to
stabilize the frequency characteristics of
DC/DC converter .
Cut-off frequency of DC/DC converter
should be set to half or less of the
triangular wave oscillator frequency.
180
80
70
total gain
160
140
120
100
80
AMP Open
Loop Gain
total phase
60
50
40
30
60
20
40
Gain
10
20
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20
−40
−60
−80
−100
−120
−140
−160
−180
Phase
1
10
100
1k
10k
100k
1M
Frequency [Hz]
Triangular wave frequency
Notes : 1) Please review the Error Amp frequency characteristics, when LC filter parameter is modified.
2) When the ceramic capacitor is used as smoothing capacitor Co, phase margin is reduced because ESR
of the ceramic capacitor is extremely small as shown in “Frequency Characteristics of LC filter which is
using low ESR”.
Therefore, change phase compensation of Error Amp or create resistance equivalent to ESR using
pattern.
39
MB39A125/126
• Frequency Characteristics of LC filter which is using low ESR
Frequency characteristic of power output LC filter
(DC gain is included.)
90
80
180
160
140
120
100
80
gain
phase
Cut-off frequency
70
60
1
50
f1 (Hz) =
Gain
40
+
(Ro ESR)
30
60
×
×
2π Lo Co
20
40
+
(Ro RL)
10
20
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20
−40
−60
−80
−100
−120
−140
−160
−180
Lo = 15 µH
Co = 14.1 µF
Ro = 4.2 Ω
RL = 30 mΩ
ESR = 100 mΩ
Phase
10
1
100
1k
10k 100k
1M
10M
Frequency [Hz]
<3Pole2Zero>
DC/DC output
< Additional ESR>
−
Board Pattern
or connected
resistor
+
40
MB39A125/126
■ PROCESSING WITHOUT USING OF THE CURRENT AMP1 AND AMP2
When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , −INC1 terminal
(pin 12) , and −INC2 terminal (pin 1) to VREF terminal (pin 6) , and then leave OUTC1 terminal (pin 10) and
OUTC2 terminal (pin 2) open.
• Connection when Current Amp is not used
13
+INC1
+INC2
12
1
−INC1
−INC2
24
10
2
OUTC1
OUTC2
”open”
6
VREF
■ PROCESSING WITHOUT USING OF THE ERROR AMP1 AND AMP2
When Error Amp is not used, leave FB123 terminal (pin 15) open, connect the −INE1 terminal (pin 8) and −INE2
terminal (pin 4) to GND, and connect +INE1 terminal (pin 9) and +INE2 terminal (pin 3) to VREF terminal (pin 6) .
• Connection when Error Amp is not used
23
GND
9
3
+INE1
+INE2
8
4
−INE1
−INE2
”open”
16
6
FB123
VREF
41
MB39A125/126
■ PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 22) open.
• Connection when no soft-start time is specified
”open”
22
CS
42
MB39A125/126
■ I/O EQUIVALENT CIRCUIT
• <Reference voltage block>
• <Power supply control block>
21
VCC
1.235 V
+
−
14
CTL
ESD
protection
element
6
VREF
ESD
37.8
kΩ
33.1
kΩ
51
kΩ
12.35
kΩ
protection
element
GND
23
GND
• <Soft-start block>
• <Triangular wave
• <Error amplifier block (Error Amp1) >
oscillator block>
VREF
(5.0 V)
VCC
VREF
VCC
(5.0 V)
22
CS
+
−
−INE1 8
FB123
17
RT
GND
GND
GND
9
+INE1
• <Error amplifier block (Error Amp2) >
• <Error amplifier block (Error Amp3) >
VCC
VCC
VREF
(5.0 V)
CS
−INE2 4
FB123
16
15
FB123
4.2 V
GND
GND
3
+INE2
• <Current detection amplifier block
(Current Amp1) >
• <Current detection amplifier block
(Current Amp2) >
VCC
VCC
−INC1 12
−INC2
1
10
2
OUTC2
OUTC1
GND
GND
13 +INC1
24 +INC2
(Continued)
43
MB39A125/126
(Continued)
• <PWM comparator block>
• <Output block>
VCC
VCC
20
OUT
FB123
CT
VH
GND
GND
• <AC adapter voltage detection block>
ACIN
7
VCC
VREF
5
18
XACOK
ACOK
(5.0 V)
GND
• <Bias voltage block> • <Invalidity current prevention block> • <Output voltage switching function block>
<MB39A125> <MB39A126>
VCC
11
OUTD
SEL
11
33.1 k
Ω
Ω
19
VH
51 k
GND
GND
GND
44
MB39A125/126
■ APPLICATION EXAMPLE 1
• MB39A125
I
IN
to System
Q2
C15
0.22 µF
R20
56 kΩ
R17
51
RS1
0.015
kΩ
Ω
100 kΩ
R18
R19
24
R14
15 kΩ
kΩ
Q3
R15
68 kΩ
ACOK
XACOK
ACIN
R16
7
5
18
10 kΩ
<AC Comp.>
+
−
−INE1
8
C8
R5
100 kΩ
6800 pF
<Current Amp 1>
VREF
R6
10 kΩ
10
OUTC1
+INC1
13
12
<Error Amp 1>
+
A
0.2 V
<UV Comp.>
×20
−
−
+
+
−
B
−INC1
+INE1
R12
30 kΩ
−INC1
(Vo)
9
4
R11
VCC
21
R13
−INE2
1.1
20
kΩ
V
IN
<PWM Comp.>
R8
100 kΩ
kΩ
C10
C1
10 µF
C12 C7
6800
+
−
0.1
pF
R7
<Current Amp 2>
(8 V to
25 V)
µF
2
<Error Amp 2>
0.1
SW2
<OUT>
OUTC2
µF
A
B
10 kΩ
−
Drive
24
1
Q1
+
20
+INC2
−INC2
×20
+
OUT
−
R9
36 kΩ
I
CHG
L1
15 µH
−2.5 V
−1.5 V
3
VH
+INE2
FB123
Battery
RS2
0.033
R10
20 kΩ
19
15
(VCC −
VH
R3
Ω
D1
6 V)
R21
33
C4
C3
Bias
kΩ
100 kΩ
10 µF
10 µF
C13
22 pF
Voltage
R22
<Error Amp 3>
200 kΩ
−INE3
R23
−
+
16
C6
C14
2200 pF 47 pF
<UVLO>
100 kΩ
11
4.2 V
OUTD
VREF
UVLO
<SOFT>
VREF
4.2 V
Bias
VCC
Slope
Control
10 µF
CTL
<OSC>
500 kHz Max
<REF>
<CTL>
14
CS
22
C11
0.22 µF
VREF
5.0 V
C
T
(45 pF)
17
6
23
RT
R4
47 kΩ
VREF
GND
C9
0.22
µF
45
MB39A125/126
■ PARTS LIST 1
• MB39A125
COMPONENT
ITEM
Pch FET
Diode
SPECIFICATION
VENDOR
NEC
PARTS No.
µPA2714GR
RB053L-30
Q1, Q2, Q3
VDS = −30 V, ID = −7.0 A
VF = 0.42 V (Max) , At IF = 3 A
D1
L1
ROHM
SUMIDA
Inductor
15 µH
3.6 A, 50 mΩ
CDRH104R-150
C1, C3, C4
C6
C7, C12
C8, C10
C9, C11
C13
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
10 µF
2200 pF
0.1 µF
6800 pF
0.22 µF
22 pF
25 V
50 V
50 V
50 V
16 V
50 V
50 V
25 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C3225X5R1E106K
C1608JB1H222K
C1608JB1H104K
C1608JB1H682K
C1608JB1C224K
C1608CH1H220J
C1608CH1H470J
C2012JB1E224K
C14
C15
47 pF
0.22 µF
RS1
RS2
R3
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
15 mΩ
33 mΩ
33 kΩ
47 kΩ
100 kΩ
10 kΩ
36 kΩ
20 kΩ
1.1 kΩ
30 kΩ
20 kΩ
15 kΩ
68 kΩ
10 kΩ
51 kΩ
24 kΩ
100 kΩ
56 kΩ
200 kΩ
1%
KOA
KOA
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
SL1TTE15LOF
SL1TTE33LOF
RR0816P-333-D
RR0816P-473-D
RR0816P-104-D
RR0816P-103-D
RR0816P-363-D
RR0816P-203-D
RR0816P-112-D
RR0816P-303-D
RR0816P-203-D
RR0816P-153-D
RR0816P-683-D
RR0816P-103-D
RR0816P-513-D
RR0816P-243-D
RR0816P-104-D
RR0816P-563-D
RR0816P-204-D
1%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
R4
R5, R8
R6, R7
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19, R21, R23
R20
R22
Note : NEC
ROHM
: NEC Corporation
: ROHM CO., LTD.
SUMIDA : Sumida Corporation
TDK
KOA
ssm
: TDK Corporation
: KOA Corporation
: SUSUMU CO., LTD.
46
MB39A125/126
■ APPLICATION EXAMPLE 2
• MB39A126
I
IN
to System
Q2
R17
C15
RS1
51
0.22 µF
kΩ 0.015
R20
56 kΩ
Ω
R18
100 kΩ
R19
24
R14
kΩ
15 kΩ
Q3
R15
68 kΩ
XACOK
ACOK
ACIN
R16
10 kΩ
7
5
18
<AC Comp.>
+
−
−INE1
8
C8
R5
100 kΩ
6800 pF
<Current Amp 1>
VREF
R6
10
10 kΩ
OUTC1
+INC1
13
12
<Error Amp 1>
A
+
<UV Comp.>
0.2 V
×20
−
−
+
+
−
B
−INC1
+INE1
R12
30 kΩ
−INC1
(Vo)
9
4
R11
VCC
21
R13
1.1
−INE2
20
kΩ
V
IN
<PWM Comp.>
kΩ
C10
C1
10 µF
R8
C12 C7
6800
+
−
100 kΩ
0.1
pF
R7
<Current Amp 2>
(8 V to
25 V)
µF
2
<Error Amp 2>
0.1
SW2
<OUT>
OUTC2
µF
A
B
10 kΩ
−
Drive
24
1
Q1
+
20
+INC2
−INC2
+
×20
OUT
−
R9
36 kΩ
I
CHG
L1
15 µH
−2.5 V
−1.5 V
3
VH
Battery
+INE2
R10
20 kΩ
RS2
19
0.033
15
(VCC −
6 V)
VH
R3
Ω
D1
FB123
C14
33
C3
C4
Bias
Voltage
kΩ
10 µF
10 µF
C13
22 pF
<Error Amp 3>
47 pF
R1
R2
−
+
16
C6
2200 pF
−INE3
<UVLO>
4.2 V/3.15 V
VREF
UVLO
11
22
SEL
Hi : 4 Cells
Lo : 3 Cells
<SOFT>
VREF
4.2 V
Bias
VCC
Slope
Control
10 µF
CTL
<OSC>
500 kHz Max
<REF>
<CTL>
14
CS
VREF
5.0 V
C
T
C11
0.22 µF
(45 pF)
17
6
23
RT
R4
47 kΩ
GND
VREF
C9
0.22
µF
47
MB39A125/126
■ PARTS LIST 2
• MB39A126
COMPONENT
ITEM
Pch FET
Diode
SPECIFICATION
VENDOR
NEC
PARTS No.
µPA2714GR
RB053L-30
Q1, Q2, Q3
VDS = −30 V, ID = -7.0 A
VF = 0.42 V (Max) , At IF = 3 A
D1
L1
ROHM
SUMIDA
Inductor
15 µH
3.6 A, 50 mΩ
CDRH104R-150
C1, C3, C4
C6
C7, C12
C8, C10
C9, C11
C13
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
10 µF
2200 pF
0.1 µF
6800 pF
0.22 µF
22 pF
25 V
50 V
50 V
50 V
16 V
50 V
50 V
25 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C3225X5R1E106K
C1608JB1H222K
C1608JB1H104K
C1608JB1H682K
C1608JB1C224K
C1608CH1H220J
C1608CH1H470J
C2012JB1E224K
C14
C15
47 pF
0.22 µF
RS1
RS2
R3
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
15 mΩ
33 mΩ
33 kΩ
47 kΩ
100 kΩ
10 kΩ
36 kΩ
20 kΩ
1.1 kΩ
30 kΩ
20 kΩ
15 kΩ
68 kΩ
10 kΩ
51 kΩ
24 kΩ
100 kΩ
56 kΩ
1%
KOA
KOA
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
SL1TTE15LOF
SL1TTE33LOF
RR0816P-333-D
RR0816P-473-D
RR0816P-104-D
RR0816P-103-D
RR0816P-363-D
RR0816P-203-D
RR0816P-112-D
RR0816P-303-D
RR0816P-203-D
RR0816P-153-D
RR0816P-683-D
RR0816P-103-D
RR0816P-513-D
RR0816P-243-D
RR0816P-104-D
RR0816P-563-D
1%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
R4
R5, R8
R6, R7
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
Note : NEC
ROHM
: NEC Corporation
: ROHM CO., LTD.
SUMIDA : Sumida Corporation
TDK
KOA
ssm
: TDK Corporation
: KOA Corporation
: SUSUMU CO., LTD.
48
MB39A125/126
■ SELECTION OF COMPONENTS
• Pch MOS FET
The Pch MOS FET for switching use should be rated for at least +20% more than the input voltage. To minimize
continuity loss, use a FET with low RDS (ON) between the drain and source. For high input voltage and high
frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered. In this
application, the NEC µPA2714GR is used. Continuity loss, on/off switching loss, and total loss are determined
by the following formulas. The selection must ensure that peak drain current does not exceed rated values.
Continuity loss : Pc
2
PC
= ID × RDS (ON) × Duty
On-cycle switching loss : PS (ON)
VD (Max) × ID × tr × fosc
PS (ON)
=
6
Off-cycle switching loss : PS (OFF)
VD (Max) × ID (Max) × tf × fosc
PS(OFF)
=
6
Total loss : PT
PT = PC + PS (ON) + PS (OFF)
Example) Using the µPA2714GR
16.8 V setting
Input voltage VIN (Max) = 25 V, output voltage VO = 16.8 V, drain current ID = 3 A, oscillation frequency fosc = 300 kHz,
L = 15 µH, drain-source on resistance RDS (ON) =: 18 mΩ, tr=: 15 ns, tf=: 42 ns
Drain current (Max) : ID (Max)
VIN − Vo
ID (Max)
=
=
Io +
3 +
tON
2L
25 − 16.8
2 × 15 × 10−6
1
×
×
× 0.672
300 × 103
=: 3.6 A
Drain current (Min) : ID (Min)
VIN − Vo
ID (Min)
=
=
Io−
3−
tON
2L
25 − 16.8
2 × 15 × 10−6
1
× 0.672
300 × 103
=: 2.4 A
49
MB39A125/126
2
PC = ID × RDS (ON) × Duty
= 32 × 0.018 × 0.672
=: 0.109 W
VD × ID × tr × fosc
PS (ON)
=
=
6
25 × 3 × 15 × 10−9 × 300 × 103
6
=: 0.056 W
VD × ID (Max) × tf × fosc
PS(OFF)
=
=
6
25 × 3.6 × 42 × 10−9 × 300 × 103
6
=: 0.189 W
PT = PC + PS (ON) + PS (OFF)
=: 0.109 + 0.056 + 0.189
=: 0.354 W
The above power dissipation figures for the µPA2714GR are satisfied with ample margin at 2.0 W.
12.6 V setting
Input voltage VIN (Max) = 22 V, output voltage VO = 12.6 V, drain current ID = 3 A, oscillation frequency fosc = 300 kHz,
L = 15 µH, drain-source on resistance RDS (ON) =: 18 mΩ, tr=: 15 ns, tf=: 42 ns
Drain current (Max) : ID (Max)
VIN − Vo
ID (Max)
=
=
Io +
3 +
tON
2L
22 − 12.6
2 × 15 × 10−6
1
×
×
× 0.572
300 × 103
=: 3.6 A
Drain current (Min) : ID (Min)
VIN − Vo
ID (Min)
=
=
Io −
3 −
tON
2L
22 − 12.6
2 × 15 × 10−6
1
× 0.572
300 × 103
=: 2.4 A
50
MB39A125/126
2
PC = ID × RDS (ON) × Duty
= 32 × 0.018 × 0.572
=: 0.093 W
VD × ID × tr × fosc
PS (ON)
=
=
6
22 × 3 × 15 × 10−9 × 300 × 103
6
=: 0.050 W
VD × ID (Max) × tf × fosc
PS(OFF)
=
=
6
22 × 3.6 × 42 × 10−9 × 300 × 103
6
=: 0.166 W
PT
= PC + PS (ON) + PS (OFF)
=: 0.093 + 0.050 + 0.166
=: 0.309 W
The above power dissipation figures for the µPA2714GR are satisfied with ample margin at 2.0 W.
The Pch MOS FET for switching use must use the one of more than input voltage +20%.
FET which operates when the AC adapter is connected should select FET which satisfies the current decided
by sense resistance R1 enough. Because FET which operates when the AC adapter is not connected becomes
a supply by the battery, it is necessary to select FET which satisfies the current of the system enough.
In this application, the NEC µPA2714GR is used.
• Inductor
In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor,
but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous
operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value,
which will enable continuous operation under light-loads.
Note that if the inductance value is too high, however, direct current resistance (DCR) is increased and this will
also reduce efficiency. The inductance must be set at the point where efficiency is greatest.
Note also that the DC superimposition characteristic becomes worse as the load current value approaches the
rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing
loss of efficiency.
Theselectionofratedcurrentvalueandinductancevaluewillvarydependingonwherethepointofpeakefficiency
lies with respect to load current.
Inductance values are determined by the following formulas.
The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the
load current or less.
51
MB39A125/126
Inductance value : L
2 (VIN − Vo)
L
≥
tON
Io
16.8 V output
Example)
2 (VIN (Max) − Vo)
L
≥
≥
tON
Io
2 × (25 − 16.8)
1
×
× 0.672
3
300 × 103
≥ 12.2 µH
12.6 V output
Example)
2 (VIN (Max) − Vo)
L
≥
≥
tON
Io
2 × (22 − 12.6)
1
×
× 0.572
3
300 × 103
≥ 12.0 µH
Inductance values derived from the above formulas are values that provide sufficient margin for continuous
operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore
necessary to determine the load level at which continuous operation becomes possible. In this application, the
SUMIDA CDRH104R-150 is used. The following formula is available to obtain the load current as a continuous
current condition when 15 µH is used.
The value of the load current satisfying the continuous current condition : Io
Vo
Io
≥
tOFF
2L
Example) Using the CDRH104R-150
15 µH (tolerance 30%) , rated current = 3.6 A
16.8 V output
Vo
Io
≥
≥
tOFF
2L
16.8
1
×
×
(1 − 0.672)
2 × 15 × 10−6
300 × 103
≥ 0.61 A
52
MB39A125/126
12.6 V output
Vo
Io
≥
tOFF
2L
12.6
1
≥
×
×
(1 − 0.572)
2 × 15 × 10−6
300 × 103
≥ 0.60 A
To determine whether the current through the inductor is within rated values, it is necessary to determine the
peak value of the ripple current as well as the peak-to-peak values of the ripple current that affects the output
ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following
formulas.
Peak Value : IL
VIN − Vo
IL
≥
Io +
tON
2L
Peak-to-peak Value : ∆IL
VIN − Vo
∆IL
=
tON
L
Example) Using the CDRH104R-150
15 µH (tolerance 30%) , rated current = 3.6 A
Peak Value
16.8 V output
VIN − Vo
IL
≥
≥
Io +
3 +
tON
2L
25−16.8
2 × 15 × 10−6
1
×
×
× 0.672
300 × 103
≥ 3.6 A
12.6 V output
VIN − Vo
tON
IL
≥
≥
Io +
3 +
2L
22 − 12.6
2 × 15 × 10−6
1
× 0.572
300 × 103
≥ 3.6 A
53
MB39A125/126
Peak-to-peak Value
16.8 V output
VIN − Vo
∆IL
=
=
tON
L
25 − 16.8
15 × 10−6
1
×
× 0.672
300 × 103
=: 1.22 A
12.6 V output
VIN − Vo
L
∆IL
=
=
tON
22 − 12.6
15 × 10−6
1
×
× 0.572
300 × 103
=: 1.2 A
• Flyback diode
Shottky barrier diode (SBD) is generally used for the flyback diode when the reverse voltage to the diode is less
than 40V. The SBD has the characteristics of higher speed in terms of faster reverse recovery time, and lower
forward voltage, and is ideal for achieving high efficiency. As long as the DC reverse voltage is sufficiently higher
than the input voltage, and the mean current flowing during the diode conduction time is within the mean output
current level, and as the peak current is within the peak surge current limits, there is no problem. In this application
the ROHM RB053L-30 are used. The diode mean current and diode peak current can be obtained by the following
formulas.
Diode mean current : IDi
Vo
IDi
≥
Io × (1 −
)
VIN
Diode peak current : IDip
Vo
IDip
≥
(Io +
tOFF)
2L
Example) Using the RB053L-30
VR (DC reverse voltage) = 30 V, mean output current = 3.0 A, peak surge current = 70 A,
VF (forward voltage) = 0.42 V, at IF = 3.0 A
16.8 V output
Vo
IDi
≥
Io × (1 −
)
VIN
3 × (1 − 0.672)
≥
≥ 0.984 A
54
MB39A125/126
12.6 V output
Vo
VIN
IDi
≥
Io × (1 −
)
≥
3 × (1 − 0.572)
≥ 1.284 A
16.8 V output
IDip (Io +
≥ 3.6 A
12.6 V output
IDip (Io +
≥ 3.6 A
Vo
2L
≥
tOFF)
Vo
2L
≥
tOFF)
• Charge current sense resistor
Please note the following in selecting the charge current sense resistance. First of all, meet the electric power
to the flowing current. However, the conversion efficiency deteriorates because the loss in the sense resistance
grows when resistance is adjusted to a too big value. The accuracy of the charge current deteriorates because
the voltage difference of both ends of the sense resistance becomes small when resistance is adjusted to a too
small value oppositely. 33 mΩ of the KOA SL1TTE33LOF is used in this application. The sense resistance value
can be determined by the following formulas.
In this application, 33 mΩ of the KOA SL1TTE33LOF is used.
Sense resistor : RS2
+INE1
RS2
=
20 × Io
Example) When the +INE1 terminal (pin 9) voltage is 2 V and the charge current (Io) is 3.0 A
+INE1
RS2
=
20 × Io
2
=
20 × 3.0
= 33.3 mΩ
55
MB39A125/126
• Input current sense resistor
Please note the following in selecting the input current sense resistance. First of all, meet the electric power to
the flowing current. However, the conversion efficiency deteriorates because the loss in the sense resistance
grows when resistance is adjusted to a too big value. The accuracy of the input current deteriorates because
the voltage difference of both ends of the sense resistance becomes small when resistance is adjusted to a too
small value oppositely. 33 mΩ of the KOA SL1TTE33LOF is used in this application. The sense resistance value
can be determined by the following formulas.
In this application, 15 mΩ of the KOA SL1TTE15LOF is used.
Sense resistor : RS1
+INE2
RS1
=
20 × IIN
Example) When the +INE2 terminal (pin 3) voltage is 1.79 V and the input current (IIN) is 6.0 A
+INE2
RS1
=
=
20 × IIN
1.79
20 × 6.0
= 14.9 mΩ
56
MB39A125/126
■ REFERENCE DATA
Conversion efficiency vs. Charging current
Conversion efficiency vs. Charging current
(Constant Voltage mode)
(Constant Voltage mode)
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
VIN = 19 V
Vo = 12.6 V setting
VIN = 19 V
Vo = 16.8 V setting
0.01
0.1
1
10
0.01
0.1
1
10
Charging current IO (A)
Charging current IO (A)
Conversion efficiency vs. Charging voltage
(Constant Current mode)
Conversion efficiency vs. Charging voltage
(Constant Current mode)
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
VIN = 19 V
VIN = 19 V
Io = 3 A setting
Io = 3 A setting
0
2
4
6
8
10 12 14
16 18
0
2
4
6
8
10 12 14
16 18
Charging voltage VO (V)
Charging voltage VO (V)
Charging voltage vs. Charging current
Charging voltage vs. Charging current
20
18
16
14
12
10
8
20
VIN = 19 V
18
16
14
12
10
8
Vo = 12.6 V setting
SW2 = OFF
SW2 = ON
SW2 = OFF
SW2 = ON
6
6
VIN = 19 V
Vo = 16.8 V setting
4
4
2
2
0
0
0.0
0.5 1.0
1.5
2.0
2.5
3.0
3.5 4.0
0.0
0.5 1.0
1.5
2.0
2.5
3.0
3.5 4.0
Charging current IO (A)
Charging current IO (A)
(Continued)
57
MB39A125/126
Switching waveform (Constant Voltage Mode)
VO = 12.6 V setting
VO = 16.8 V setting
OUT
OUT
(V)
15
(V)
15
OUT
OUT
10
5
10
5
0
0
V
=
19 V
16.8 V setting
V
= 19 V
IN
IN
Pch
Pch
Vo
Io
SW2
=
Vo = 12.6 V setting
Drain
(V)
10
Drain
(V)
10
=
1.5 A
OFF
Io = 1.5 A
Pch
Drain
Pch
Drain
=
SW2 = OFF
5
5
0
0
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 (µs)
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 (µs)
Switching waveform (Constant Current Mode)
VO = 12.6 V setting
VO = 16.8 V setting
OUT
OUT
(V)
15
(V)
15
OUT
OUT
10
5
10
5
0
0
Pch
Pch
Drain
(V)
Drain
(V)
V
=
=
19 V
10.0 V
V
=
IN
19 V
IN
Vo
Io
SW2
Vo
Io
SW2
=
10.0 V
Pch
Drain
Pch
Drain
10
10
=
3.0 A setting
OFF
=
3.0 A setting
OFF
=
=
5
5
0
0
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 (µs)
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 (µs)
(Continued)
58
MB39A125/126
Soft-start operating waveform (Constant Current Mode)
Vo
(V)
Vo
(V)
VIN = 19 V
VIN = 19 V
lo
(A)
lo
18
16
14
12
10
18
16
14
12
10
Io = 3 A setting
SW2 = OFF
Io = 3 A setting
SW2 = OFF
(A)
5
5
4
3
2
1
0
4
3
2
1
0
Vo
lo
Vo
lo
CTL
(V)
10
CTL
(V)
10
CTL
5
CTL
5
0
0
0
10 15 20 25 30 35 40 45 50 (ms)
0
10 15 20 25 30 35 40 45 50 (ms)
Soft-start operating waveform (Constant Voltage Mode)
Vo
(V)
Vo
(V)
lo
(A)
lo
(A)
18
16
14
12
10
18
16
14
12
Vo
Vo
5
5
4
3
2
1
0
4
3
2
1
0
VIN = 19 V
VIN = 19 V
Vo = 16.8 V setting
SW2 = OFF
Vo = 16.8 V setting
SW2 = OFF
10
CTL
(V)
10
CTL
(V)
10
lo
lo
CTL
CTL
0
0
0
5
10 15 20 25 30 35 40 45 50 (ms)
0
5
10 15 20 25 30 35 40 45 50 (ms)
(Continued)
59
MB39A125/126
(Continued)
Load-step response operation waveform
Load-step response operation waveform
(C.V mode → C.C mode)
(C.C mode → C.V mode)
Io (A)
6
Vo (V)
18
Io (A)
Vo (V)
18
Vo
6
5
4
16
14
16
14
5
Vo
4
Vo
Io
Vo
12
10
12
10
3
2
1
0
3
2
1
0
Io
VIN = 19 V
Io = 3.0 A setting
SW2 = OFF
CC to CV
VIN = 19 V
Io = 3.0 A setting
SW2 = OFF
CV to CC
Io
Io
(ms)
(ms)
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18 20
Load-step response operation waveform
Load-step response operation waveform
(C.V mode → C.V mode)
(C.V mode → C.V mode)
Io (A)
Io (A)
Vo (V)
18
Vo (V)
18
16
14
6
6
Vo
Vo
16
14
Vo
VIN = 19 V
5
4
5
4
Vo
Io
VIN = 19 V
Vo = 16.8 V setting
SW2 = OFF
Vo = 16.8 V setting
SW2 = OFF
CV to CV
CV to CV
12
10
12
10
3
2
1
0
3
2
1
0
Io
Io
Io
(ms)
0
2
4
6
8
10 12 14 16 18 20
(ms)
0
2
4
6
8
10 12 14 16 18 20
60
MB39A125/126
■ USAGE PRECAUTIONS
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
• The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ ORDERING INFORMATION
Part number
MB39A125PFV
Package
Remarks
24-pin plastic SSOP
(FPT-24P-M03)
28-pin plastic QFN
(LCC-28P-M11)
MB39A125WQN
MB39A126PFV
MB39A126WQN
24-pin plastic SSOP
(FPT-24P-M03)
28-pin plastic QFN
(LCC-28P-M11)
61
MB39A125/126
■ PACKAGE DIMENSIONS
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max).
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
24-pin plastic SSOP
(FPT-24P-M03)
1
0.17±0.03
(.007±.001)
*
7.75±0.10(.305±.004)
24
13
*25.60±0.10 7.60±0.20
(.220±.004) (.299±.008)
INDEX
Details of "A" part
1.25 +–00..1200
(Mounting height)
.049 –+..000048
0.25(.010)
0~8˚
"A"
1
12
0.24 –+00..0078
0.65(.026)
M
0.13(.005)
.009 +–..000033
0.50±0.20
(.020±.008)
0.10±0.10
(.004±.004)
(Stand off)
0.60±0.15
(.024±.006)
0.10(.004)
C
2003 FUJITSU LIMITED F24018S-c-4-5
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
(Continued)
62
MB39A125/126
(Continued)
28-pin plastic QFN
(LCC-28P-M11)
3.50±0.10
(.138±.004)
5.00±0.10
(.197±.004)
3.50±0.10
(.138±.004)
5.00±0.10
(.197±.004)
0.25±0.10
INDEX AREA
(.010±.004)
3-R0.20
(3-R.008)
0.40±0.10
(.016±.004)
0.50(.020)
TYP
1PIN CORNER
(C0.30(C.012))
0.08(.003)
0.80(.032)
MAX
0.20(.008)
0.02+–00..0025
+.002
.0008
–.0008
C
2004 FUJITSU LIMITED C28068Sc-2-1
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
63
MB39A125/126
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information, such as descriptions of function and application
circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
information. When you develop equipment incorporating the
device based on such information, you must assume any
responsibility arising out of such use of the information. Fujitsu
assumes no liability for any damages whatsoever arising out of
the use of the information.
Any information in this document, including descriptions of
function and schematic diagrams, shall not be construed as license
of the use or exercise of any intellectual property right, such as
patent right or copyright, or any other right of Fujitsu or any third
party or does Fujitsu warrant non-infringement of any third-party’s
intellectual property right or other right by using such information.
Fujitsu assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result
from the use of information contained herein.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0511
© 2004 FUJITSU LIMITED Printed in Japan
相关型号:
MB39A132QN
Battery Charge Controller, Voltage-mode, 0.06A, 2000kHz Switching Freq-Max, 0.50 MM PITCH, PLASTIC, QFN-32
FUJITSU
MB39A132QN-E1
Switching Regulator/Controller, Current/voltage-mode, 1.2A, 2000kHz Switching Freq-Max, PQCC32
FUJITSU
MB39A132QN-G-ERE1
ASSP For Power Management Applications (Rechargeable Battery) Synchronous Rectification DC/DC Converter IC for Charging Li-ion Battery
FUJITSU
©2020 ICPDF网 联系我们和版权申明