MB40166-PF [FUJITSU]
暂无描述;型号: | MB40166-PF |
厂家: | FUJITSU |
描述: | 暂无描述 转换器 |
文件: | 总20页 (文件大小:685K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-28500-5E
ASSP
AD/DA CONVERTER
MB40166/MB40176
1-CHANNEL 6-BIT AD/DA CONVERTER WITH CLAMP
CIRCUIT
The Fujitsu MB40166 and MB40176 are low power 6-bit AD/DA converter which
is fabricated with Fujitsu Advanced Bipolar Technology. MB40166 and MB40176
have the same basic circuits and functions, with the only difference being that
MB40166 has an independent analog input terminal for the A/D section and a
clamp voltage output terminal, while MB40176 has an analog input in the A/D
section internally connected with the clamp circuit.
Since both models contain a single-chip clamp circuit and a reference voltage
circuit, they are ideal for video signal processing.
• Resolution
:6 bits
• Linearity Error
:±0.8% max.
• Maximum Conversion Rate
• Analog Input Voltage Range
0 to 1.0 V (MB40176)
• Analog Output Voltage Range
• Digital I/O Level
• Power Supply Voltage
• Power Dissipation:300 mW typ.
• Package
:20 MSPS min.
:VREF to VCCA (MB40166)
PLASTIC PACKAGE
FPT-28P-M01
:VCC to VCC -1 V
:TTL Level
:+5 V
28pin Plastic FLAT Package (Suffix : -PF)
28pin Plastic DIP Package (Suffix : -P)
ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating
Symbol
VCCA, VCCD
VIND
Value
-0.5 to +7.0
Unit
V
Power Supply Voltage
Digital Input Voltage
Analog Input Voltage
Storage Temperature
PLASTIC PACKAGE
DIP-28P-M03
-0.5 to +7.0
V
VINA
-0.5 to VCCA +0.5
-55 to +125
V
TSTG
°C
NOTE: Permanent device damage may occur if the aboveAbsolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet.
Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However,
it is advised that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages
to this high impedance circuit.
1
MB40166/MB40176
■ PIN ASSIGNMENT
(TOP VIEW)
(TOP VIEW)
1
DACK
DD1
DD2
DD3
DD4
DD5
DD6
DA6
D.GND
VCCD
A.GND
VCCA
VOUT
COMP
VREF
C2
DACK
DD1
DD2
DD3
DD4
DD5
DD6
DA6
DA5
DA4
DA3
DA2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
D.GND
VCCD
(MSB)
2
2
(MSB)
3
3
A.GND
VCCA
4
4
5
5
VOUT
6
6
COMP
VREF
(LSB)
(LSB)
7
(LSB)
(LSB)
7
MB40166
MB40176
8
8
VINA
9
DA5
C1
9
VCLMP
(N.C.)
VCCA
10
11
12
13
14
DA4
VIN
10
11
12
13
14
DA3
VCCA
A.GND
VCCD
D.GND
DA2
A.GND
VCCD
(MSB)
DA1
(MSB) DA1
ADCK
ADCK
D.GND
(FPT-28P-M01)
(DIP-28P-M03)
(FPT-28P-M01)
(DIP-28P-M03)
Note : The functions of the terminals within the dotted lines above are different for MB40166 and MB40176.
2
MB40166/MB40176
■ BLOCK DIAGRAM
• MB40166
REFERENCE
VOLTAGE
0.8VCCA
20
CLAMP
VCLMP
GENERATOR
VINA
21
14
ADCK
VCCA
0.8VCCA
R1
0.8VCCA
(MSB)
1
2
13
DA1
R
R
63 to 6
ENCODER
LATCH
&
BUFFER
12 DA2
11 DA3
10
DA4
62
63
9
DA5
8
DA6
R
(LSB)
R2
22
VREF
1
DACK
DD1
(MSB)
to
R-2R
6
2
MASTER
SLAVE
REGISTER
6
6
6
6
CURRENT
SWITCH
RESISTOR
NETWORK
24
VOUT
BUFFER
7
DD6
(LSB)
15
28
17
26
16
27
18
25
23
D.GND
A.GND
VCCD
VCCA
COMP
Note : The circuits within the dotted lines above are different for MB40166 and MB40176.
3
MB40166/MB40176
■ BLOCK DIAGRAM (Continued)
• MB40176
19
VIN
0.8VCCA
REFERENCE
VOLTAGE
GENERATOR
20
C1
CLAMP
21
C2
14
ADCK
VCCA
0.8VCCA
R1
0.8VCCA
1
(MSB)
DA1
13
12
R
63 to 6
ENCODER
LATCH
&
BUFFER
DA2
DA3
2
11
10
9
DA4
DA5
R
62
8
DA6
R
63
(LSB)
R2
22
VREF
1
DACK
DD1
(MSB)
to
DD6
(LSB)
2
R-2R
RESISTOR
NETWORK
MASTER
SLAVE
REGISTER
6
6
6
6
6
CURRENT
SWITCH
24
BUFFER
VOUT
7
18
15
28
17
26
16
27
25
23
VCCA
COMP
D.GND
A.GND
VCCD
Note : The circuits within the dotted lines above are different for MB40166 and MB40176.
4
MB40166/MB40176
■ PIN DESCRIPTIONS
Pin No.
Section
Symbol
I/O
Function
40166
40176
21
–
VINA
VIN
I
I
Analog signal input.
–
19
Reference voltage output.
Reference voltage divided by the resistors, with the
output
22
VREF
O
voltage set to 0.8 x VCCA (V).
A/D
8 to 13
20
DA1 to DA6
VCLMP
C1
O
O
–
–
I
Digital signal outputs. (DA1: MSB, DA6: LSB)
Clamp voltage output.
–
–
–
20
21
Clamp capacitor is connected between these pins.
C2
14
24
ADCK
VOUT
A/D conversion clock input.
O
I
Analog signal output.
2 to 7
DD1 to DD6
Digital signal input. (DD1: MSB, DD6: LSB)
Phase compensation capacitor is connected.
Insert a capacitor of 1 µF or more between this pin and
A.GND.
D/A
23
COMP
–
1
DACK
VCCA
I
D/A conversion clock input.
18, 25
16, 27
17, 26
15, 28
–
–
–
–
–
Power supply for analog circuit. (+5 V)
Power supply for digital circuit. (+5 V)
Ground for analog circuit. (0 V)
Ground for digital circuit. (0 V)
No connection.
VCCD
Common
Other
A.GND
D.GND
(N.C.)
19
–
5
MB40166/MB40176
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Power Supply Voltage
Symbol
Unit
Remarks
Min
4.75
VREF
0
Typ
5.00
–
Max
5.25
VCCA
1
VCCA, VCCD
VINA
V
V
MB40166
MB40176
Analog Input Voltage
VIN
–
V
Digital High-level Input Voltage
Digital Low-level Input Voltage
Clock Frequency
VIHD
2.0
–
–
V
VILD
–
0.8
20
–
V
fCLK
–
–
MHz
ns
ns
ns
ns
µF
µF
µF
°C
+
Clock Pulse Width at High Level
Clock Pulse Width at Low Level
Set-up Time
tW
20
–
tW-
tS
20
–
–
12.5
7.5
1.0
1.0
1.0
0
–
–
Hold Time
tH
–
–
Phase Compensation Capacitance
Clamp Capacitance
CCOMP
CCLAMP
CVREF
Ta
–
–
–
–
Reference Voltage Capacitance
Operating Temperature
–
–
–
70
■ ELECTRICAL CHARACTERISTICS
ANALOG CIRCUIT DC CHARACTERISTICS
(VCCA=VCCD=5V±5%, Ta=0 to 70°C)
Value
Parameter
Symbol
Condition
Unit
Remarks
Min
–
Typ
–
Max
6
Resolution
–
Bits
%
Linearity Error
LE
DC
–
–
±0.8
25
Analog High Level Input Current
Analog Low Level Input Current
IIHA
IILA
VINA = VCCA
VINA = VREF
–
8.5
7.5
µA
µA
MB40166
MB40166
–
23
VCCA - VREF
IIHA - IILA
Equivalent resistance for Analog Input
RINA
400
–
–
kΩ
MB40166
MB40176
Analog Input Current
Reference Voltage
IIN
VREF*
VCLMP
VOFS
VOZS
RO
-400
3.9
–
–
–
4.1
–
µA
V
4.0
Clamp Voltage
VREF
VCCA
VREF
240
V
Full-Scale Output Voltage
Zero-Scale Output Voltage
Output Resistance
–
–
V
–
–
V
–
–
Ω
Power Supply Current
ICC
–
60*
90
mA
Note : *VCCA=VCCD=5.0V
6
MB40166/MB40176
■ ELECTRICAL CHARACTERISTICS (Continued)
DIGITAL CIRCUIT DC CHARACTERISTICS
(VCCA=VCCD=5V±5%, Ta=0°C to 70°C)
Value
Unit
Parameter
Symbol
Condition
Min
2.7
–
Typ
Max
Digital High-level Output Voltage
Digital Low-level Output Voltage
Digital High-level Input Voltage
Digital Low-level Input Voltage
Digital High-level Input Current
Digital Low-level Input Current
VOHD
VOLD
VIHD
VILD
IIHD
IOH=-400 µA
–
–
V
V
IOL=1.6mA
–
0.4
–
2.0
–
–
V
–
0.8
20
–
V
–
–
µA
µA
IILD
-100
–
SWITCHING CHARACTERISTICS
Parameter
(VCCA=VCCD=5V±5%, Ta=0°C to 70°C)
Value
Unit
Symbol
Condition
Min
20
8
Typ
Max
Maximum Conversion Rate
Digital Output Delay Time
Analog Output Delay Time
Analog Output Rise Time
Analog Output Fall Time
FS
tPDD
tPDA
tr
–
–
MSPS
ns
15
13
15
15
30
–
–
ns
–
–
ns
tf
–
–
ns
7
MB40166/MB40176
■ TIMING CHART
1. Timing Chart for A/D Conversion
+
-
tW
tW
3 V
0 V
1.5 V
A/D conversion clock input
(ADCK)
Sample N
Sample N+1
tpdD
Sample N+2
Analog signal input
(VIN)
VOHD
Digital signal output
(DA1 to DA6)
DATA N-1
DATA N
DATA N+1
1.5 V
VOLD
2. Timing Chart for D/A Conversion
tS
th
3 V
0 V
Digital signal input
(DD1 to DD6)
1.5 V
+
-
tW
tW
3 V
0 V
1.5 V
D/A conversion clock input
(DACK)
tr
tf
VOFS
90% 90%
50%
50%
10%
Analog signal output
(VOUT)
10%
VOZS
tPLHA
tPHLA
8
MB40166/MB40176
■ A/D CONVERSION CHARACTERISTICS
Ideal conversion characteristics (1LSB=16 mV)
STEP, OUTPUT CODE
Actual conversion characteristics
STEP, OUTPUT CODE
63 111111
62 111110
61 111101
63 111111
62 111110
61 111101
LE61
33 100001
33 100001
32 100000
31 011111
LE33
LE32
32 100000
31 011111
LE31
02 000010
01 000001
00 000000
02 000010
01 000001
00 000000
LE2
LE1
VINA, VIN
= Linearity Error
VFT
VZT
LEn max
FS
4.000 V
4.992 V
VINA, VIN
■ D/A CONVERSION CHARACTERISTICS
Ideal conversion characteristics (1LSB=16 mV)
A.OUT
Actual conversion characteristics
A.OUT
5.000 V
4.984 V
VOFS
LE62
LE33
4.520 V
4.504 V
4.488 V
LE32
LE31
LE2
4.024 V
4.008 V
LE1
3.992 V
LSB
VOZS
MSB
Input Code
Step
Input Code
Step
9
MB40166/MB40176
■ FUNCTIONAL DESCRIPTIONS CLAMP CIRCUIT
The clamp circuit contained in MB40166/MB40176 is a peak detector type, in which the top of the sync of the composite sync
signal is clamped.
Clamp voltage is common to the reference voltage (0.8 x VCC) of A/D and D/A circuits.
• MB40166
(1) Providing a clamp circuit
20
Clamp
VCLMP
-
+
21
24
VOUT
A/D
D/A
A
VINA
8
2
7
13
(DA6 to DA1)
(DD1 to DD6)
VCCA
VCCA
1 V
VREF
VREF
Given voltage
Input level at A
Input level at VINA pin
Output level of Vout
(2) Directly feeding the signal at the VINA pin
21
24
VINA
A/D
D/A
VOUT
8
2
7
13
(DA6 to DA1)
(DD1 to DD6)
VCCA
VREF
VCCA
VREF
Input level at VINA pin
Output level of Vout
10
MB40166/MB40176
• MB40176
VIN
19
20
21
CLAMP
C1
C2
-
+
24
VOUT
A/D
D/A
8
2
7
13
(DA6 to DA1)
(DD1 to DD6)
VCCA
VCCA
VREF
1 V
A. GND
VREF
Input level at VIN pin
Input level of C2
Output level of Vout
11
MB40166/MB40176
■ ANALOG INPUT EQUIVALENT CIRCUIT
• MB40166
VCCA
~
100 Ω
~
0.8 x VCC + VBE
~
400 kΩ
x 63 Circuits
A.GND
21
20
VCLMP
VINA
ADC analog input equivalent circuit
Equivalent circuit of
clamp circuit block
• MB40176
VCCA
~
100 Ω
~
4 kΩ
~
0.8 x VCC + VBE
~
400 kΩ
VIN
19
x 63 Circuits
A.GND
21
20
-
+
C1
C2
Equivalent circuit of
clamp circuit block
ADC analog input equivalent circuit
12
MB40166/MB40176
■ DIGITAL INPUT EQUIVALENT CIRCUITS
• MB40166/MB40176
Digital input equivalent circuit of A/D converter block
VCCD
50 kΩ
3.2 kΩ
50 kΩ
1.6 kΩ
1.6 kΩ
ADCK
VT~ 1.4 V
D.GND
Digital input equivalent circuit of D/A converter block
VCCD
50 kΩ
50 kΩ
DA1
to
DA6
~
VT 1.4 V
DACK
D.GND
13
MB40166/MB40176
■ TYPICAL CONNECTION EXAMPLE
• MB40166
VCC
VCCA
VCCD
6
6
VCLMP
VINA
DA
CONTROLLER
MB87045
MEMORY
MB81464
ADCK
DACK
DD
MB40166
VOUT
COMP
D.GND
A.GND
10 µH
10 µH
+
+
-
3.3 µF
3.3 µF
0.33 µF
0.33 µF
-
18
27
25
16
VCCA
VCCA
VCCD
VCCD
ADC clock
20
21
19
24
14
13
Clamp voltage output
VCLMP
VINA
ADCK
(MSB)
(LSB)
(LSB)
(MSB)
Video signal
ADC input
DA1
ADC digital outputs
(to controller)
8
N.C.
DA6
MB40166
Video signal
DAC output
7
2
1
VOUT
VREF
DD6
DAC digital inputs
(from controller)
22
23
DD1
COMP
DACK
DAC clock
+
1 µF
-
+
1 µF
A.GND
A.GND D.GND D.GND
-
17
26
15
28
Note : If the clamp circuit is used, connect VINA with VCLMP.
If the clamp circuit is not used, do not connect VINA with VCLMP.
14
MB40166/MB40176
■ TYPICAL CONNECTION EXAMPLE (continued)
(1) Internal clamp circuit is used.
+9 V
+5 V +5 V
External
component
VCCA
VCLMP
VCCD
2.2 kΩ
-
+
20
21
1 µF
MB40166
Analog input pin
2SA933
VINA
A.GND D.GND
(2)Internal clamp circuit is not used.
+5 V +5 V
VCCA
VCCD
20
21
OPEN
VCLMP
MB40166
Analog input pin *
VINA
A.GND D.GND
*: Input voltage range for the analog input pin is VREF up to VCCA.
15
MB40166/MB40176
■ TYPICAL CONNECTION EXAMPLE (continued)
• MB40176
VCC
VCCA
VCCD
VIN
C1
6
6
DA
CONTROLLER
MB87045
MEMORY
MB81464
ADCK
DACK
DD
MB40176
C2
VOUT
COMP
A.GND
D.GND
10 µF
10 µF
+
+
-
0.33 µF
0.33 µF
3.3 µF
3.3 µF
-
25
27
18
16
VCCA
VCCA
VCCD
VCCD
ADCK
ADC clock
Video signal
ADC input
19
20
14
13
VIN
C1
C2
(MSB) DA1
(LSB) DA6
(LSB) DD6
(MSB) DD1
-
ADC digital outputs
(to controller)
1 µF
+
8
21
24
MB40176
Video signal
DAC output
7
2
1
VOUT
DAC digital inputs
(from controller)
22
23
VREF
DACK
DAC clock
COMP
+
+
1 µF
A.GND
A.GND D.GND D.GND
1 µF
-
-
26
15
17
28
16
MB40166/MB40176
■ TYPICAL CONNECTION EXAMPLE (continued)
1.ON-CHIP Input PNP Transistor is utilized.
+5 V +5 V
VCCA
VCCD
VIN
19
20
Video signal input
C1
MB40176
-
1 µF
+
21
C
2
A.GND D.GND
Note : Input impedance of VIN input pin (19) is about 20 kΩ, please pay attention to output impedance of signal source.
2. Input PNP Transistor of Clamp Circuit is put externally.
+9 V
+5 V +5 V
External circuit
VCCA
VCCD
2.2 kΩ
-
21
C2
+
1 µF
2SA933
Video signal input
A.GND D.GND
Note : Both VIN (19) and C (20) are connected with VCCA.
17
MB40166/MB40176
28-LEAD PLASTIC FLAT PACKAGE
(CASE No.: FPT-28P-M01)
.110(2.80) MAX
+.010
-.008
+0.25
(MOUNTING HEIGHT)
.699
(17.75
)
-0.20
.002(0.05) MIN
(STAND OFF HEIGHT)
.402±.016
(10.20±0.40)
.299±.012
(7.60±0.30)
.362±.012
(9.20±0.30)
INDEX
.020±.008
(0.50±0.20)
.050(1.27)
TYP
.018±.004
+.002
-.001
+0.05
)
-0.02
.005(0.13)
“A”
M
.006
(0.15
(0.45±0.10)
Details of “A” part
.008(0.20)
.024(0.60)
.007(0.18)
MAX
.004(0.10)
.027(0.68)
MAX
.650(16.51) REF
1994 FUJITSU LIMITED F28005S-5C
Dimensions in
inches (millimeters)
18
MB40166/MB40176
28-LEAD PLASTIC DUAL IN-LINE PACKAGE
(CASE No.: DIP-28P-M03)
15°MAX
INDEX-1
INDEX-2
.358±.010
(9.10±0.25)
.400(10.16)
TYP
+.008
-.012
+0.20
(26.00
)
.010±.002
(0.25±0.05)
1.024
.070(1.778)MAX
-0.30
.191(4.85)MAX
.118(3.00)MIN
+.020
-0
.070±.007
(1.778±0.18)
.039
.018±.004
(0.45±0.10)
.020(0.51)MIN
+0.50
-0
(1.00
)
.910(23.114)REF
Dimensions in
inches (millimeters)
1994 FUJITSU LIMITED D28012S-3C
19
MB40166/MB40176
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 1015, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211, Japan
Tel: (044) 754-3753
Fax: (044) 754-3329
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, U.S.A.
Tel: (408) 922-9000
Fax: (408) 432-9044/9045
All Rights Reserved.
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
63303 Dreieich-Buchschlag
Germany
Circuit diagrams utilizing Fujitsu products are included as a
means of illustrating typical semiconductor applications. Com-
plete information sufficient for construction purposes is not nec-
essarily given.
Tel: (06103) 690-0
Fax: (06103) 690-122
The information contained in this document has been carefully
checked and is believed to be reliable. However, Fujitsu as-
sumes no responsibility for inaccuracies.
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LIMITED
No. 51 Bras Basah Road,
Plaza By The Park,
The information contained in this document does not convey any
license under the copyrights, patent rights or trademarks claimed
and owned by Fujitsu.
#06-04 to #06-07
Singapore 189554
Tel: 336-1600
Fujitsu reserves the right to change products or specifications
without notice.
Fax: 336-1609
No part of this publication may be copied or reproduced in any
form or by any means, or transferred to any third party without
prior written consent of Fujitsu.
The information contained in this document are not intended for
use with equipments which require extremely high reliability
such as aerospace equipments, undersea repeaters, nuclear con-
trol systems or medical equipments for life support.
F9601
FUJITSU LIMITED Printed in Japan
20
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SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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