MB88154APNF-G-112-JNE1 [FUJITSU]
Clock Generator, 67MHz, CMOS, PDSO8, 3.90 X 5.05 MM, 1.75 MM HEIGHT, 1.27 MM PITCH, PLASTIC, SOP-8;
| 型号： | MB88154APNF-G-112-JNE1 |
| 厂家： | 
FUJITSU |
| 描述： | Clock Generator, 67MHz, CMOS, PDSO8, 3.90 X 5.05 MM, 1.75 MM HEIGHT, 1.27 MM PITCH, PLASTIC, SOP-8 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总20页 (文件大小：548K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU MICROELECTRONICS
DATA SHEET
DS04-29129-2E
Spread Spectrum Clock Generator
MB88154A
MB88154A-101/102/103/111/112/113
■ DESCRIPTION
MB88154A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary
radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with
the internal modulator. It corresponds to both of the center spread which modulates input frequency as Middle
Centered and down spread which modulates so as not to exceed input frequency.
■ FEATURE
• Input frequency : 16.6 MHz to 80 MHz
• Output frequency: 16.6 MHz to 80 MHz (One time input frequency)
• Modulation rate can select from 0.5%, 1.0%, 1.5% or − 1.0%, − 2.0%, − 3.0%. (For center spread / down
spread.)
• Equipped with crystal oscillation circuit: Range of oscillation 16.6 MHz to 48 MHz
• The external clock can be input: 16.6 MHz to 80 MHz
• Modulation clock output duty : 40% to 60%
• Modulation clock cycle-cycle jitter : Less than 100 ps
• Low current consumption by CMOS process : 5.0 mA (24 MHz : Typ-sample, no load)
• Power supply voltage : 3.3 V 0.3 V
• Operating temperature : − 40 °C to +85 °C
• Package : SOP 8-pin
Copyright©2007-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.6
MB88154A
■ PRODUCT LINEUP
MB88154A has two kinds of input frequency, and three kinds of modulation type (center/down spread), total six
line-ups.
Product
MB88154A-101
Input/Output frequency
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
Modulation type
MB88154A-102
MB88154A-103
MB88154A-111
MB88154A-112
MB88154A-113
Down spread
Center spread
■ PIN ASSIGNMENT
TOP VIEW
CKOUT
VDD
1
2
3
4
8
7
6
5
SEL1
REFOUT
SEL0
MB88154A
VSS
XIN
XOUT
FPT-8P-M02
■ PIN DESCRIPTION
Pin name
CKOUT
VDD
I/O
O
⎯
⎯
I
Pin no.
Description
1
2
3
4
5
6
7
8
Modulated clock output pin
Power supply voltage pin
GND pin
VSS
XIN
Crystal resonator connection pin/clock input pin
Crystal resonator connection pin
Modulation rate setting pin
XOUT
SEL0
O
I
REFOUT
SEL1
O
I
Non-modulated clock output pin
Modulation rate setting pin
2
DS04-29129-2E
MB88154A
■ I/O CIRCUIT TYPE
Pin
Circuit type
Remarks
SEL0
SEL1
CMOS hysteresis input
CKOUT
• CMOS output
REFOUT
• IOL = 3 mA
Note : For XIN and XOUT pins, refer to “■ OSCILLATION CIRCUIT”
DS04-29129-2E
3
MB88154A
■ HANDLING DEVICES
Preventing Latch-up
A latch-up can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an
input or output pin or (b) a voltage higher than the rating is applied between VDD pin and VSS pin. The latch-up,
if it occurs, significantly increases the power supply current and may cause thermal destruction of an element.
When you use this device, be very careful not to exceed the maximum rating.
Handling unused pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or
pull-down resistor.
Unused output pin should be opened.
The attention when the external clock is used
Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.
Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.
Power supply pins
Please design connecting the power supply pin of this device by as low impedance as possible from the current
supply source.
We recommend connecting electrolytic capacitor (about 10 μF) and the ceramic capacitor (about 0.01 μF) in
parallel between VSS pin and VDD pin near the device, as a bypass capacitor.
Oscillation circuit
Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that
electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring.
Design the printed circuit board that surrounds the XIN and XOUT pins with ground.
4
DS04-29129-2E
MB88154A
■ BLOCK DIAGRAM
VDD
2
8
1
SEL1
CKOUT
Modulation rate
setting
Modulation
clock output
6
SEL0
PLL block
Reference
clock
XOUT
5
4
Reference clock output
7
REFOUT
XIN
Rf = 1 MΩ
3
VSS
1
−
M
V/I
conversion
Charge
pump
Phase
compare
IDAC
ICO
Modulation
Clock
output
1
−
N
Reference
clock
Loop filter
Modulation
rate setting/
Modulation
enable setting
1
−
L
Modulation
logic
MB88154A PLL block
A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically
reducing EMI.
DS04-29129-2E
5
MB88154A
■ PIN SETTING
SEL 0, SEL 1 Modulation rate setting
Modulation rate
MB88154A-101,MB88154A-102, MB88154A-111,MB88154A-112,
SEL1
SEL0
MB88154A-103
Down spread
− 1.0%
MB88154A-113
Center spread
0.5%
L
L
L
H
L
− 2.0%
1.0%
H
H
− 3.0%
1.5%
H
No spread
No spread
Notes : • The modulation rate can be changed at the level of the pin. Spectrum does not spread when “H” level
is set to SEL0 and SEL1 pins. The clock with low jitter can be obtained.
• When changing the modulation rate setting, the stabilization wait time for the modulation clock is
required. Thestabilizationwaittimeforthemodulationclocktakethemaximumvalueof“■ELECTRICAL
CHARACTERISTICS • AC Characteristics Lock-Up time”.
• Center spread
Spectrum is spread (modulated) by centering on the input frequency.
Modulation width 3.0%
Radiation level
−1.5%
+1.5%
Frequency
Input frequency
Modulation rate center spread example of 1.5%
• Down spread
Spectrum is spread (modulated) below the input frequency.
Modulation width 3.0%
Radiation level
−3.0%
Frequency
Frequency in modulation off
Modulation width down spread example of − 3.0%
6
DS04-29129-2E
MB88154A
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Unit
Min
− 0.5
Max
+ 4.0
Power supply voltage*
Input voltage*
VDD
VI
V
V
VSS − 0.5
VSS − 0.5
− 55
VDD + 0.5
VDD + 0.5
+ 125
Output voltage*
VO
TST
V
Storage temperature
°C
Operation junction
temperature
TJ
− 40
+ 125
+ 14
°C
Output current
Overshoot
IO
− 14
mA
VIOVER
VIUNDER
⎯
VDD + 1.0 (tOVER ≤ 50 ns)
V
V
Undershoot
VSS − 1.0 (tUNDER ≤ 50 ns)
⎯
* : The parameter is based on VSS = 0.0 V.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Overshoot/Undershoot
tUNDER ≤ 50 ns
VIOVER ≤ VDD + 1.0 V
VDD
Input pin
VSS
VIUNDER ≤ VSS − 1.0 V
tOVER ≤ 50 ns
DS04-29129-2E
7
MB88154A
■ RECOMMENDED OPERATING CONDITIONS
(VSS = 0.0 V)
Value
Typ
3.3
Parameter
Symbol
Pin
Conditions
Unit
Min
3.0
Max
Power supply voltage
“H” level input voltage
VDD
VIH
VDD
⎯
⎯
3.6
V
V
XIN,
SEL0,
SEL1
VDD × 0.80
⎯
VDD + 0.3
“L” level input voltage
Input clock duty cycle
VIL
⎯
VSS
⎯
VDD × 0.20
V
tDCI
XIN
XIN
⎯
16.6 MHz to 80 MHz
40
50
60
%
Input frequency
40 MHz to 80 MHz
0.0475 ×
fin − 1.75
Input clock through rate
Operating temperature
SRIN
Ta
⎯
⎯
⎯
V/ns
⎯
− 40
+ 85
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
Input clock duty cycle (tDCI = tb/ta)
t
a
t
b
1.5 V
XIN
Input clock through rate (SRIN)
VDD × 0.80
VDD × 0.20
XIN
trin
tfin
Note : SRIN = (VDD × 0.80 − VDD × 0.20) /trin, SRIN = (VDD × 0.80 − VDD × 0.20) /tfin
8
DS04-29129-2E
MB88154A
■ ELECTRICAL CHARACTERISTICS
• DC Characteristics
(Ta = −40 °C to + 85 °C, VDD = 3.3 V 0.3 V, VSS = 0.0 V)
Value
Parameter
Symbol
Pin
Conditions
Unit
Min
Typ
Max
no load capacitance at
24 MHz output
Power supply current
ICC
VOH
VOL
ZO
VDD
⎯
5.0
7.0
mA
V
“H” level output
IOH = − 3 mA
VDD − 0.5
VSS
⎯
⎯
70
VDD
0.4
⎯
CKOUT,
REFOUT
Output voltage
“L” level output
V
IOL = 3 mA
CKOUT,
REFOUT
Output impedance
Input capacitance
16.6 MHz to 80 MHz
⎯
Ω
XIN,
SEL0,
SEL1
Ta = + 25 °C,
VDD = VI = 0.0 V,
f = 1 MHz
CIN
⎯
⎯
16
pF
DS04-29129-2E
9
MB88154A
• AC Characteristics
(Ta = −40 °C to + 85 °C, VDD = 3.3 V 0.3 V, VSS = 0.0 V)
Value
Parameter
Symbol
Pin
Conditions
Unit
Min
16.6
40
Typ
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Max
40
48
40
67
80
40
67
80
Fundamental oscillation
3rd over-tone oscillation
MB88154A-103/113
MB88154A-102/112
MB88154A-101/111
MB88154A-103/113
MB88154A-102/112
MB88154A-101/111
0.4 V to 2.4 V
XIN,
XOUT
Oscillation frequency
fx
MHz
16.6
33
Input frequency
fin
XIN
MHz
50
16.6
33
CKOUT,
REFOUT
Output frequency
fOUT
SR
MHz
V/ns
50
CKOUT,
Output slew rate
0.3
⎯
2.0
REFOUT load capacitance 15 pF
tDCC
tDCR
CKOUT
1.5 V
1.5 V
40
⎯
⎯
60
%
%
Output clock duty cycle
REFOUT
tDCI − 10*
tDCI + 10*
fin/2640 fin/2280 fin/1920
(2640) (2280) (1920)
MB88154A-103/113
MB88154A-102/112
Modulation frequency
(Number of input clocks
per modulation)
fMOD
(nMOD)
fin/4400 fin/3800 fin/3200
(4400) (3800) (3200)
kHz
(clks)
CKOUT
fin/5280 fin/4560 fin/3840
MB88154A-101/111
(5280)
(4560)
(3840)
Lock-Up time
tLK
tJC
CKOUT
CKOUT
⎯
⎯
2
5
ms
No load capacitance,
Ta = +25 °C,
Cycle-cycle jitter
⎯
⎯
100
ps-rms
VDD = 3.3 V
* : Duty of the REFOUT output is guaranteed only for the following A and B because it depends on tDCI of input
clock duty.
A. Resonator : When resonator is connected with XIN and XOUT and oscillates normally.
B. External clock input : The input level is Full - swing (VSS − VDD).
10
DS04-29129-2E
MB88154A
<Definition of modulation frequency and number of input clocks per modulation>
fout (Output frequency)
Modulation wave form
t
f
MOD (Min)
fMOD (Max)
t
Clock count
nMOD (Max)
Clock count
nMOD (Min)
MB88154A contains the modulation period to realize the efficient EMI reduction.
The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) .
Furthermore, the average value of fMOD equals the typical value of the electrical characteristics.
DS04-29129-2E
11
MB88154A
■ OUTPUT CLOCK DUTY CYCLE (tDCC, tDCR = tb/ta)
t
a
t
b
1.5 V
CKOUT,
REFOUT
■ INPUT FREQUENCY (fin = 1/tin)
t
in
0.8 VDD
XIN
■ OUTPUT SLEW RATE (SR)
2.4 V
0.4 V
CKOUT,
REFOUT
tr
t
f
Note : SR = (2.4−0.4) /tr, SR = (2.4−0.4) /tf
■ CYCLE-CYCLE JITTER (tJC = | tn − tn + 1 |)
CKOUT
tn
tn+1
Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after
(or, immediately before) .
12
DS04-29129-2E
MB88154A
■ MODULATION WAVEFORM
• 1.5% modulation rate, Example of center spread
CKOUT
output frequency
+ 1.5 %
Frequency at modulation OFF
Time
− 1.5 %
fMOD
• −1.0% modulation rate, Example of down spread
CKOUT
output frequency
Frequency at modulation OFF
Time
− 0.5 %
− 1.0 %
fMOD
DS04-29129-2E
13
MB88154A
■ LOCK-UP TIME
3.0 V
Internal clock
stabilization wait time
VDD
XIN
VIH
Setting pin
tLK
SEL0,
SEL1
(lock-up time )
CKOUT
If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock
signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”).
For the input clock stabilization time, check the characteristics of the resonator or oscillator used.
Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output
clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-
cycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset
of the device at the succeeding stage after the lock-up time.
14
DS04-29129-2E
MB88154A
■ OSCILLATION CIRCUIT
The left side of figures below shows the connection example about general resonator. The oscillation circuit has
the built-in feedback resistance (Rf) . The value of capacity (C1 and C2) is required adjusting to the most suitable
value of an individual resonator.
The right side of figures below shows the example of connecting for the 3rd over-tone resonator. The value of
capacity (C1, C2 and C3) and inductance (L1) is needed adjusting to the most suitable value of an individual
resonator. The most suitable value is different by individual resonator. Please refer to the resonator manufacturer
which use for the most suitable value. When an external clock is used (the resonator is not used) , input the
clock to XIN pin and do not connect anything with XOUT.
• When using a resonator
MB88154A LSI Internal
Rf
(1 MΩ)
Rf (1 MΩ)
XIN Pin
XIN Pin
XOUT Pin
XOUT Pin
MB88154A LSI External
L1
C1
C2
C1
C2
C3
Normal resonator
3rd over-tone resonator
• When using an external clock
MB88154A LSI Internal
XOUT Pin
Rf (1 MΩ)
XIN Pin
MB88154A LSI External
External clock
OPEN
Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter
characteristic.
DS04-29129-2E
15
MB88154A
■ INTERCONNECTION CIRCUIT EXAMPLE
SEL1
R2
1
8
7
6
5
2
MB88154A
R1
3
+
SEL0
ENS
4
C4
C3
Xtal
C1
C2
C1, C2
C3
: Oscillation stabilization capacitance (refer to “■ OSCILLATION CIRCUIT”.)
: Capacitor of 10 μF or higher
C4
: Capacitor about 0.01 μF (connect a capacitor of good high frequency property
(ex. laminated ceramic capacitor) to close to this device.)
R1, R2
: Impedance matching resistor for board pattern
16
DS04-29129-2E
MB88154A
■ EXAMPLE CHARACTERISTICS
The condition of the examples of the characteristic is shown as follows: Input frequency = 20 MHz (Output
frequency = 20 MHz : Using MB88154A-113), Power - supply voltage = 3.3 V, None load capacity.
Modulation rate = 1.5% (center spread)
Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz (ATT
use for − 6dB).
CH B Spectrum
10 dB /REF 0 dBm
No modulation
−6.18 dBm
Avg
4
modulation 1.5 %
−26.03 dBm
SWP 2.505 s
SPAN 4 MHZ
RBW# 1 kHZ
CENTER 20 MHZ
VBW 1 kHZ
ATT 6 dB
DS04-29129-2E
17
MB88154A
■ ORDERING INFORMATION
Modulation
type
Part number
Input/Output frequency
Package
Remarks
MB88154APNF-G-101-JNE1
MB88154APNF-G-102-JNE1
MB88154APNF-G-103-JNE1
MB88154APNF-G-111-JNE1
MB88154APNF-G-112-JNE1
MB88154APNF-G-113-JNE1
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
Down
Down
Down
Center
Center
Center
8-pin plastic SOP
(FPT-8P-M02)
MB88154APNF-G-101-JNEFE1
MB88154APNF-G-102-JNEFE1
MB88154APNF-G-103-JNEFE1
MB88154APNF-G-111-JNEFE1
MB88154APNF-G-112-JNEFE1
MB88154APNF-G-113-JNEFE1
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
Down
Down
Down
Center
Center
Center
8-pin plastic SOP Emboss taping
(FPT-8P-M02) (EF type)
MB88154APNF-G-101-JNERE1
MB88154APNF-G-102-JNERE1
MB88154APNF-G-103-JNERE1
MB88154APNF-G-111-JNERE1
MB88154APNF-G-112-JNERE1
MB88154APNF-G-113-JNERE1
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
50 MHz to 80 MHz
33 MHz to 67 MHz
16.6 MHz to 40 MHz
Down
Down
Down
Center
Center
Center
8-pin plastic SOP Emboss taping
(FPT-8P-M02)
(ER type)
18
DS04-29129-2E
MB88154A
■ PACKAGE DIMENSION
8-pin plastic SOP
Lead pitch
1.27 mm
3.9 × 5.05 mm
Gullwing
Package width
package length
×
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.75 mm MAX
0.06 g
(FPT-8P-M02)
8-pin plastic SOP
(FPT-8P-M02)
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
+0.25
1 5.05 –0.20 .199 +–..000180
0.22 –+00..0073
.009 +–..000031
*
8
5
*
2 3.90±0.30 6.00±0.40
(.154±.012) (.236±.016)
Details of "A" part
45˚
1.55±0.20
(Mounting height)
(.061±.008)
0.25(.010)
0.40(.016)
0~8
˚
"A"
1
4
1.27(.050)
0.44±0.08
(.017±.003)
M
0.13(.005)
0.50±0.20
(.020±.008)
0.15±0.10
(.006±.004)
(Stand off)
0.60±0.15
(.024±.006)
0.10(.004)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
©2002-2008 FUJITSU MICROELECTRONICS LIMITED F08004S-c-4-8
2002 FUJITSU LIMITED F08004S-c-4-7
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
DS04-29129-2E
19
MB88154A
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3329
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
Asia Pacific
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151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
Europe
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Shanghai 200002, China
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Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
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10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
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Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department
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