MB90M407A [FUJITSU]

Microcontroller,;


型号：	MB90M407A
厂家：	FUJITSU
描述：	Microcontroller, 微控制器和处理器
文件：	总28页 (文件大小：213K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FUJITSU SEMICONDUCTOR

MICROCONTROLLER

MB90M405

F²MC-16LX FAMILY

16-BIT MICROCONTROLLERS

HARDWARE MANUAL ABSTRACTS

MB90M405

F²MC-16LX FAMILY

16-BIT MICROCONTROLLERS

HARDWARE MANUAL ABSTRACTS

1. Circuit diagrams utilizing Fujitsu products are included as a mean of illustrating typical

semiconductor applications. Complete information sufficient for construction proposes is

not necessarily given.

2. The information contained in this document has been carefully checked and is believed to

be reliable. However, Fujitsu assumes no responsibility for inaccuracies.

3. The information contained in this document does not convey any license under the copy

right, patent right to trademarks claimed and owned by Fujitsu.

4. Fujitsu reserved the right to change products or specifications without notice.

5. No part of this publication may be copied or reproduced in any form or by any means, or

transferred to any third party without prior written consent of Fujitsu.

6. The products described in this document are not intended for use in equipment requiring

high reliability, such as marine relays and medical life-support systems. For such

applications, contact your Fujitsu sales representative.

7. If the products and technologies described in this document are controlled by the Foreign

Exchange and Foreign Trade Control Act established in Japan, their export is subject to

prior approval based on the said act.

iii

Preface

Objective of Manual and Target Audience

The MB90M405 Series is a general-purpose semiconductor device in the F²MC-16LX family. It is a 16-bit

single-chip microcontroller ASIC (Application Specific IC). This manual explains the functions and

operations of the MB90M405 Series for engineers who design products using this device.

How to Read This Manual

Page Organization

A summary is given below the title of each section. A title of the main section is noted in the sub-section to

recognize a current-reading section.

Index Organization

(1) Register map index

The register map index format is similar to the I/O map and it allows search for the page explaining the

bits of each register from the address, register abbreviation, register name, and resource macro name.

Use the register map index at searching for the register function when designing a resource macro.

(2) Pin function index

The pin function index is similar to the explanation of the pin function and it allows serch for the block

diagram of each resource macro, the explanation of the pin function, and notes from the package pin

number, pin name, circuit type, and resource macro name. Use the pin function index when creating

the system board, etc. (The pin function index will be provided in the next revision of this manual).

Organization of Notes and Checks

Notes

Reference information is given here. Use this as a hint or note when using the MB90M405.

This also gives a section(s) to refer.

Check

Precautions when using the MB90M405 are given here. Specification restrictions, etc., are

included.

1. GENERAL

1.1 Features............................................................................ 1-3

1.2 Resources......................................................................... 1-4

1.3 Product Lineup.................................................................. 1-5

1.4 Block Diagram................................................................... 1-6

1.5 Pin Assignment ................................................................. 1-7

1.6 Pin Description.................................................................. 1-8

1.7 I/O Circuit Type ............................................................... 1-11

1.8 Notes on Handling Devices............................................. 1-13

1.9 Clock Supply Map ........................................................... 1-15

1.10 Low Power Consumption Mode....................................... 1-16

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

1-2

GENERAL

This chapter explains the features and basic specifications of the Monolith (MB90M405).

The MB90M405 Series is a general-purpose 16-bit microcontroller developed for applications requiring

fluorescent lamp panel control and contains 60 high-voltage withstand output pins required for a fluorescent

lamp.

As with the original F²MC-8L and F²MC-16L families, the instruction system inherits the AT architecture, and

has extended high-level language interface instructions and the extended addressing modes, enhanced

multiplication/division instructions (signed), and enhanced bit processing. In addition, a 32-bit accumulator

enables handle long word processing.

1.1 Features

Clock:

· PLL Clock multiplication circuit built-in

· Operating clock (PLL clock) generated by dividing original oscillation by 2 or by multiplying original

oscillation by 1 to 4 (2.1 MHz to 16.8 MHz at original oscillation of 4.2 MHz). Can be selected.

· Minimum instruction execution time is 59.5 ns (when the original oscillation is 4.2 MHz, the PLL clock is

generated by multiplying the original oscillation by 4, and Vcc = 3 V).

· It is possible to generate an external output as a clock output by dividing the original oscillation by 16, 32,

64, or 128.

· Maximum memory space: 16 Mbytes

· 24-bit addressing in memory space

Instruction system suited for controller

· Applicable data types (bit, byte, word, long-word)

· Various addressing modes: 23 types

· High code efficiency

· High-precision operation with 32-bit accumulator

· Signed multiplication and division instructions and enhanced RETI instruction

Powerful instruction system applicable to high-level language (C) or multitasking

· System stack pointer

· Symmetric instruction set and barrel shift instruction

Program patch function (2-address pointer)

Shortened execution time: 4-byte instruction queue

Powerful interrupt function (eight programmable priority levels)

· Powerful interrupt function for 32 interrupt factors

· Data transfer function (extended intelligent I/O service function: 16 channels maximum)

Low-power consumption (standby mode)

· Sleep mode (stops CPU operating clock)

· Pseudo-timer mode (stops everything except original oscillation and time-base timer)

· Stop mode (stops original oscillation)

· CPU Intermittent operation mode

· Package

· QFP-100 (FPT-100P-M06: 0.65 mm pin pitch)

Process

· CMOS technology

1-3

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

1.2 Resources

I/O port: 26 pins maximum (All 26 pins can also serve as resource pins).

18-bit time-base timer: 1 channel

Watchdog timer: 1 channel

16-bit reload timer: 3 channels

16-bit free-run timer: 1 channel

16-bit output compare: 1 channel

16-bit input capture: 2 channels

· When the count value of the 16-bit free-run timer matches the setting value of the output compare, the

timer is cleared and an interrupt request is issued.

Serial I/O: 2 channels

UART: 2 channels

· Clock-synchronous serial transfer (I/O extended serial) can be used.

· The direction of the shift clock level can be selected arbitrarily (MSB or LSB).

DTP/external interrupt (4 channels)

· Start extended intelligent I/O services by an external input, and generate an external interrupt.

Delayed interrupt generation module

· A task-switching interrupt request is generated.

8-/10-bit A/D converter (16 channel)

· 8- or 10-bit resolution can be selected.

FL controller

· Enables FL driver control. (The auto display control is performed for 32 digits max. and 59 segments

max.)

1 to 32 digits can be set (can be set on a digit-by-digit basis).

The dimmer can be set.

· Enables LED driver control (Auto display control is performed for 16 segments maximum).

The auto display control can be performed for 16 segments max. at 1/2 duty.

Timer clock divider

· The original oscillation can be divided by 32, 64, 128, or 256.

1-4

GENERAL

1.3 Product Lineup

Table 1-1 lists the Monolith (MB90M405) series product lineup. Functions other than the ROM/RAM capacity

are shared.

Table 1-1 MB90M405 Series Product Lineup

Product name

Classification

ROM capacity

RAM capacity

MB90MV405

Evaluate

MB90MF408

MB90M408

MB90M407

Flash Type ROM

Mass-produced product (mask ROM)

Not provided

4 Kbytes

128 Kbytes

4 Kbytes

96 Kbytes

4 Kbytes

Count of basic instructions: 351

Minimum instruction execution time:

59.5 ns (at original oscillation of 4.2 MHz, with

PLL clock generated by multiplying original

oscillation by 4)

CPU Function

Addressing types: 23

Program patch function: 2-address pointer

Maximum memory space: 16 Mbytes

Port

I/O port (CMOS)

26 pins (all of 26 pins also serve as resource pins)

60 FL output pins can be used (Under LED control, 43 FL output pins and 17 LED

control pins are required).

Enables FL driver control and LED driver control can be performed.

Under FL driver control, the dimmer can be set for both digits and segments.

Can also be used as the clock-synchronous method extended I/O serial.

FL Controller

Serial I/O (UART) A dedicated baud rate generator is built-in.

Four channels are built-in (two channels also serve as UART channels).

16-bit reload timer 16-bit reload timer operation (Toggle output or one-shot output can be selected.)

An event count function can be selected. Three channels are built-in.

16-bit free-run timer 16-bit output compare x 1 channel (for clearing free-run timer)

16-bit input capture x 2 channels

8-/10-bit A/D

converter

8-/10-bit resolution x 16 channels (input multiplex)

Minimum conversion time: 6.2 µs (at internal operation of 16 MHz)

Timer clock divider The external input clock can be divided and output to the outside.

Clock division rates: 16, 32, 64, or 128 (programmable)

External interrupt

Four independent channels (also serve for A/D input)

Interrupt factor: L ® H edge, H ® L edge, L level, or H level

Sleep mode, stop mode, CPU intermittent mode, or pseudo-timer mode

Low power

consumption mode

Process

Package

CMOS

PGA256

QFP-100 (0.65 mm pitch)

Operating voltage

3.3 V ±0.3 V(16.8 MHz: 4.2 MHz multiplied by 4)

1-5

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

1.4 Block Diagram

CPU

PA0/AN0/TMCK

PA1/AN1

PA2/AN2

PA3/AN3

PA4/AN4

PA5/AN5

PA6/AN6

PA7/AN7

Timer clock

divider

Controller

X0,X1

RSTX

MD2,1,0

Clock

controller

8-/10-bit A/D

Converter

ROM

(96/128 KB)

Serial I/O

(ch 2)

RAM

(4 KB)

External interrupt

input controller

FIP0/LED0

FIP16/LED16

PB0/AN8

PB1/AN9

PB2/AN10

PB3/AN11/SI2

PB4/AN12/SC2/TIN

PB5/AN13/SO2/TO

PB6/AN14/INT3

PB7/AN15/INT2

FL Controller

V-RAM

16-bit free-run timer

FIP17 to FIP59

16-bit input capture

(ch 0, 1)

16-bit output

compare

P80/IC0/INT0

P81/IC1/INT1

P82/SI0

P83/SC0

P84/SO0

P85/SI1

16-bit reload timer

(ch 0, 1, 2)

Serial I/O

(ch 3)

P90/SDA/SO3

P91/SCL/SC3

P86/SI2

P87/SI3

UART

(ch.0,1)

I²C Interface

Fig. 1.1 Block Diagram (MB90M405)

1-6

GENERAL

1.5 Pin Assignment

FPT-100P-M06 Pin Assignment

PB7/AN15/INT3

PB6/AN14/INT2

PB5/AN13/SO2/TO0

RSTX

FIP16/LED16

FIP17

FIP18

FIP19

FIP20

FIP21

FIP22

FIP23

FIP24

FIP25

VSS-IO

FIP26

FIP27

FIP28

FIP29

FIP30

FIP31

FIP32

FIP33

FIP34

FIP35

FIP36

VDD-FIP

FIP37

FIP38

FIP39

FIP40

FIP41

FIP42

FIP43

PB4/AN12/SC2/TIN0

PB3/AN11/SI2

PB2/AN10

PB1/AN9

PB0/AN8

PA7/AN7

PA6/AN6

PA5/AN5

PA4/AN4

PA3/AN3

PA2/AN2

PA1/AN1

PA0/AN0/TMCK

AVSS

AVCC

P91/SCL/SC3

P90/SDA/SO3

P87/SO1

P86/SC1

P85/SI1

P84/SO0

P83/SC0

P82/SI0

P81/IC1/INT1

P80/IC0/INT0

MD2

1-7

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

1.6 Pin Description

Tables 1-2, 1-3 and 1-4 list the pin name, function, circuit type, and reset-time state/function.

Table 1-2 Pin Description

Pin No.

Circuit State/function at

Pin Name

Function

Type

reset

QFP-100M06

82, 83

X0, X1

RSTX

Oscillation state

Reset input

Oscillation input pins.

External reset input pin

FIP0 to FIP15

LED0 to LED15

This function is selected when the FL driver is enabled.

This function is selected when the LED driver is enabled.

85 to 100

FIP16

LED16

This function is selected when the FL driver is enabled.

This function is selected when the LED driver is enabled.

VKK Pull-down

output

2 to 10

12 to 19

FIP17 to FIP33

Dedicated pins for the FL driver output.

20 to 22

24 to 41

43 to 47

FIP34 to FIP59

P80

IC0

General-purpose I/O port

External trigger input pin for input capture 0

External factor input pin for external interrupt input 0

This pin is only accepted when it is enabled by the EN0 bit.

General-purpose I/O port

INT0

P81

IC1

External trigger input pin for input capture 1

External factor input pin for external interrupt input 1

This pin is only accepted when it is enabled by the EN1 bit.

INT1

P82

SI0

General-purpose I/O port

Serial data input pin for serial I/O channel 0

This pin is always effective when channel 0 is under input operation.

P83

General-purpose I/O port

Serial clock I/O pin for serial I/O channel 0

This pin is effective when the channel-0 clock output is enabled.

SC0

P84

General-purpose I/O port

Serial data output pin for serial I/O channel 0

This pin is effective when the channel-0 serial data output is

enabled.

General-purpose I/O port

Serial data input pin for serial I/O channel 1

This pin is always effective when channel 0 is under input operation.

SO0

Hi-Z

P85

SI1

P86

SC1

P87

General-purpose I/O port

Serial clock I/O pin for serial I/O channel 1

This pin is effective when the channel-0 clock output is enabled.

This pin is a general-purpose I/O port.

Serial data output pin for serial I/O channel 1

This pin is effective when the channel-0 serial data output is

enabled.

SO1

P90

General-purpose I/O port (However, the N ch is open drain.)

Data I/O pin for the I²C interface. This function is effective when

operation of the I²C interface is enabled.

SDA

Also, set the port output to the Hi-Z state when operating the I²C

interface.

Serial data output pin for serial I/O channel 3

This pin is effective when the channel-3 serial data output is

enabled.

SO3

1-8

GENERAL

Table 1-3 Pin Description

Pin No.

Circuit State/function at

Pin Name

Function

Type

reset

QFP-100M06

P91

General-purpose I/O port (However, the N ch is open drain.)

Clock I/O pin for the I²C interface

This function is effective when operation of the I²C interface is

enabled.

SCL

Hi-Z

Also, set the port output to the Hi-Z state when operating the I²C

interface.

Serial clock I/O pin for serial I/O channel 3

This pin is effective when the channel-3 clock output is enabled.

General-purpose I/O port

SC3

PA0

Analog input pin 0 for the A/D converter

This function is effective when the analog input specification is

enabled (using ADER).

AN0

Timer clock output pin

TMCK

This pin is only effective when output is enabled. This pin is null

when analog input is enabled using ADER.

PA1 to PB2

AN1 to AN10

General-purpose I/O port

Analog input pins (1 to 10) for the A/D converter

This function is effective when the analog input specification is

enabled (using ADER).

65 to 74

PB3

General-purpose I/O port

Analog input pin (11) for the A/D converter

This function is effective when the analog input specification is

enabled (using ADER).

AN11

Serial data input pin for serial I/O channel 2

This pin is always effective when channel 2 is under input

operation.

SI2

PB4

General-purpose I/O port

Analog input pin (12) for the A/D converter

This function is effective when the analog input specification is

enabled (using ADER).

Serial clock I/O pin for serial I/O channel 2

This pin is effective when the channel-2 clock output is enabled.

External clock input pin for reload timer channel 0

This pin is enabled when the external clock input is effective

(ADER takes precedence).

AN12

Analog input

SC2

TIN0

PB5

General-purpose I/O port

Analog input pin (13) for the A/D converter

This function is effective when the analog input specification is

enabled (using ADER).

AN13

Serial data output pin for serial I/O channel 2

This pin is effective when the channel-2 serial data output is

enabled.

SO2

TO0

External event output pin for reload timer channel 0

This pin is effective when the external event output is enabled

(ADER takes precedence).

PB6 and PB7

General-purpose I/O port

Analog input pins (14, 15) for the A/D converter

This function is effective when the analog input specification is

enabled (using ADER).

AN14 and AN15

79, 80

External factor input pins for external interrupt inputs 2 and 3

These pins are accepted only when they are enabled using the

EN2 bit and the EN3 bit.

INT2 and INT3

AVCC

Vcc power input pin for the analog macro

Power input

AVSS

VKK

Vss power input pin for the analog macro

—

Power pin on the pull-down side at high-voltage withstand output.

1-9

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

Table 1-4 Pin Description

Pin No.

Circuit State/function at

Pin Name

Function

Type

reset

QFP-100M06

Input pin for specifying the operating mode

MD0

MD1/VDD-VFT

MD2

Connect this pin to Vcc. Also, always switch this pin to Vss at boot

programming to flash memory.

Input pin for specifying the operating mode

Connect this pin to Vcc. This pin also serves as the VDD-VFT pin.

Input pin for specifying the operating mode

Connect this pin to Vss. Also, always switch this pin to Vcc at boot

programming to flash memory.

Mode pin

11, 42

VSS-IO

VDD-FIP

VSS-CPU

VCC-CPU

Power (0 V: GND) input pins for I/O

Power (3 V: Vcc) input pin for the FIP

—

Power input

Power (0 V: GND) input pin for the controller

Power (3 V: Vcc) input pin for the controller

1-10

GENERAL

1.7 I/O Circuit Type

Tables 1-5 and 1-6 show the circuit type for each pin.

Table 1-5 I/O Circuits

Classification

Circuit

Remarks

Oscillator

Oscillation feedback resistor:

about 1 MW

Xout

Standby control signal

Hysteresis input pin

Resistor value: about 50 kW (TYP)

P-ch open-drain output

- High-voltage withstand port output

IOL = -25 mA

Pout

When using the pin as a normal port,

connect

a diode clamp, etc., to

prevent application of VKK voltage to

the pin at output of the L level (see

Handling notes).

RKK

VKK

P-ch open-drain output

- High-voltage withstand port output

IOL = -12 mA

Pout

When using the pin as a normal port,

connect

a diode clamp, etc., to

prevent application of VKK voltage to

the pin at output of the L level (see

Handling notes).

RKK

VKK

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

Table 1-6 I/O Circuits

Classification

Circuit

Remarks

CMOS hysteresis I/O pin

CMOS-level output

CMOS Hysteresis input

(The input cutoff function is

provided in the standby mode.)

IOL = 4 mA

Pout

Nout

Hysteresis input

Standby control

Analog/CMOS hysteresis I/O pin

CMOS-level output

CMOS hysteresis input

(The input cutoff function is provided

in the standby mode.)

Pout

Analog input

Nout

(Analog input is effective when the

corresponding bit of ADER is 1.)

IOL = 4 mA

Hysteresis input

Standby control

Analog input

N-ch open drain output

CMOS Level hysteresis input

(The input cutoff function is

provided in the standby mode.)

Nout

Unlike the CMOS I/O pin, there is no

P-ch transistor at this pin.

Consequently, even when an

external voltage is applied to this pin

with the power to the device set to

OFF, no current flows to the device

power (Vcc-IO/Vcc-CPU).

Hysteresis input

Standby control

Analog power input protector

1-12

GENERAL

1.8 Notes on Handling Devices

(1) Be careful not to exceed the maximum rated voltage (Prevention of latch up).

For a CMOS IC, latch-up may occurif a voltage higher than Vcc or a voltage lower than Vss is applied to the

I/O pin other than medium-/high-voltage withstand I/O pins, or when a voltage that exceeds the rated

voltage is applied between Vcc and Vss.

Latch up rapidly increases the power current, and the device may be destroyed by heat.

When using the device, take care not to exceed the maximum rating. Also, take care that the analog power

(AVcc) and the analog input do not exceed the digital power (Vcc) when turning the AC/DC power on or off.

(2) Design the device so the supply voltage is as stable as possible.

A sudden change in the power voltage may cause a malfunction even within the operating assurance range

of the VCC power supply voltage. For safety, the VCC ripple (p-p) of the commercial frequency (50/60

MHz) must be 10% or less of the standard VCC value, and the transient fluctuation at instantaneous power

switching must be 0.1 V/ms or less. Also, take countermeasures to power noise, etc.

(3) Notes at power-on

The voltage rise time at power-on must be 50 µs or more (0.2 to 2.7 V).

(4) Setting unused input pins

Leaving unused input pins open may cause a malfunction. Therefore, these pins must be set to the pull-

up or pull-down state.

(5) Handling of power pins for A/D converter

Even when the A/D converter is not used, connect the pins so that the following relationships are

established: AVCC = VCC, AVSS = VSS.

(6) Notes on using external clock

Even when an external clock is used, the oscillation stabilization wait time is required at the power-on reset

or the cancellation of the stop mode. In this case, drive the X0 pin only and leave the X1 pin open.

Example of using external clock

OPEN

MB90M405 Series

1-13

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

(7) Power pins

When two or more Vcc pins and Vss pins are provided, pins are designed to be at the same electric

potential are internally connected to the device to prevent malfunctions such as latch-up. However, always

connect all same electric potential pins to power and ground outside the device to prevent decrease of

extraneous and radiation the malfunction of the strobe signal due to a ground level rise, and follow the

standards on total output current, etc. Also, consider to connecting the pins to Vcc and Vss of this device at

the lowest possible impedance from the current supply source (It is recommended to connect a bypass

capacitor of about 0.1 mF of the device between Vcc and Vss).

(8) Application sequence for power analog inputs for A/D converter

Apply the digital power (Vcc) first, and then apply the power (AVcc) and analog inputs (AN0 to AN15) for the

A/D converter. Disconnect the power and analog inputs for the A/D converter first, and then disconnect the

digital power (Vcc).

Also, do not allow the input voltage to exceed AVcc even when using a pin shared with an analog input as

an input port (Simultaneous application and disconnection of analog power and digital power is allowed).

(9) Output of high-voltage withstand output pin (circuit type C or D)

When the high-voltage withstand output pin (circuit type is C or D) is used as an ordinary output port, the

port outputs the VKK pin voltage pull-down value at the L level output. In this case, the VKK pin level

voltage is applied to the external circuit, so it is recommended to add a diode clamp circuit as shown in the

figure below.

Diode clamp circuit

Pout

1-14

GENERAL

1.9 Clock Supply Map

The clock supply map for this device (Monolith: MB90M405) is shown below.

Timer clock divider

Watchdog timer

Clock generator

Selector

Oscillator

Resources

FL Controller

16-bit reload timer

10-bit A/D converter

8-bit serial I/O

Time-base timer

6-bit free-run timer

16-bit input capture

16-bit output compare

I²C Communications interface

PLL Multiplication circuit

PCLK

Divide-by-2

circuit

CPU (F²MC-16LX)

Selector

HCLK

MCLK

ROM/RAM (memory)

HCLK: Oscillation clock

MCLK: Main clock (operating clock: clock generated by dividing oscillation clock by 2)

PCLK: PLL clock

1-15

MB90M405 F²MC-16LX FAMILY HARDWARE MANUAL

1.10

This section provides an overview of the low power consumption mode.

The onolith (MB90M405) has the following modes that stop various functions and clocks

Chapter 4.

• Relationships between operating modes and power

Operating mode

PLL Run

Main clock

Operates

Stops

PLL Clock

Operates

Stops

CPU

Operates

Stops

Resources

Operates

Operates*

Stops

Timer clock

Operates

Stops

Main Run

PLL Sleep

Main sleep

Pseudo-time

Stop

Operates

Stops

In the above table, the power consumption decreases as the operating mode goes down from the top of the

table.

In the PLL Run mode, operation is performed on the PCLK generated by multiplying the original oscillation by

1 to 4. In the Main Run mode, operation is performed on the MCLK generated by dividing the original

oscillation by 2.

*: In the sleep mode, the CPU stops, so resources cannot be accessed from the CPU.

1-16

May 19, 2000

Preliminary Version 1

Data sheet

MB90M405 Series

Electric Specification Table

■ Electrical Characteristics

1. Absolute Maximum Rating

(V_SS-CPU= V_SS-IO= AVss = 0.0 V)

Rated Value

Parameter

Symbol

Unit

Remarks

Min.

Max.

V_CC-CPU

V_DD-FIP

AV_CC

V_SS– 0.3

V_SS+ 4.0

Power supply pin for control circuit

Power supply pin for FIP

Vcc > AVcc*¹

Power supply voltage

Pull-down side power supply pin for

high voltage resistance output.

V_KK

V_I

V_CC– 45

V_CC+ 0.3

Vss – 0.3

—

Vss + 4.0

Vss + 5.5

Vss + 4.0

Vss + 5.5

Input voltage

•

V_O

V_O2

I_OL

Output voltage

*^•(Open drain output)

*⁴, *⁵

"L" level max. output current

"L" level avg. output current

Average value (Operating current ×

I_OLAV

ΣI_OL

—

Operating rate) *⁵

"L" level max. overall output

current

100

"L" level avg. overall output

current

Average value (Operating current ×

ΣI_OLAV

Operating rate) *⁵

I_OH

—

–15

–27

–14

*⁴, *⁵

"H" level max. output current

I_OHFIP1

I_OHFIP2

FIP00 to FIP33 pins

FIP34 to FIP59 pIns

Average value (Operating current ×

"H" level avg. output current

I_OHAV

ΣI_OH

—

–4

Operating rate) *⁵

"H" level max. overall output

current

–100

–50

Average value (Operating current ×

Operating rate) *⁵

ΣI_OHAV

"H" level avg. overall output

current

Average value (Operating current ×

—

–180

300

Operating rate) *⁶

ΣI_OHFIPAV

P_{D_CPU}

P_{D_FL}

For CPU_Chip individual operation

Power consumption

For FL_Chip individual output

operation

1176

Operating temperature

Storage temperature

T_A

–40

–55

+85

°C

T_STG

+150

*1: AV_CCshould not exceed V_CCwhen turning on the power supply.

*2: V_Iand V_Oshould not exceed V_CC+ 0.3 V.

*3: The 5 V withstandable voltage pin for I²C. Applies to P90/SDA, P91/SCL only.

*4: The maximum output current is standard at the peak value of the corresponding 1 pin.

*5: Excludes currents on the FIP00 to FIP59 pins.

*6: FIP00 to FIP59 pins are targeted.

Cautions: 1. The V_CCspecification in the table means: V_DD-FIP= V_DD-VFT= V_CC-CPU. Use with the same

power supply level as the three pins described above. Also, V_SSmeans: V_SS-IO= V_SS–CPU

Connect this pin to the GND.

2. This device contains circuity to protect the inputs against damage due to high static voltages

or electric fields. However, it is advised that normal precautions be taken to avoid application

of any voltage higher than maximum rated voltage to this high impedance circuit.

2. Recommended Conditions

(V_SS-IO= V_SS-CPU= AVss = 0.0 V)

Rated value

Parameter

Symbol

Unit

Remarks

Min.

Max.

V_CC-CPU

3.0

3.6

Under normal operation

Power supply

voltage

V_DD-FIP

Vcc

3.0

2.5

3.6

Under normal operation

Maintains status of stop operation

CMOS Hysterisis input pins other than I²C

V_IHS

0.8 Vcc

Vcc + 0.3

“H” level input

voltage

CMOS Hysterisis input pins of I²C (5 V

withstandable voltage)*¹

V_IHS2

0.8 Vcc

5.8

V_IHM

V_ILS

Vcc – 0.3

Vss – 0.3

Vcc + 0.3

0.2 Vcc

MD pin input

CMOS Hysterisis input pins other than I²C

“L” level input

voltage

CMOS Hysterisis input pins of I²C (5 V

withstandable voltage)*¹

V_ILS2

V_ILM

T_A

Vss – 0.3

–40

0.2 Vcc

Vss + 0.3

+85

MD pin input

Operation

temperature

°C

*1: On the 1st ES product of MB90MF408, the withstandable voltage is 3 V (can be used up to 4.5 V at

the test lab level).

Caution:

The V_CCspecification in the table means: V_DD-FIP= V_DD-VFT= V_CC-CPU. Use with the same power

supply level as the three pins described above. Also, V_SSmeans: V_SS-IO= V_{SS – CPU}. Connect

this pin to the GND.

3. DC Specifications

(T_A= –40° to 85°C, V_DD-FIP= V_DD-VFT= V_CC-CPU= AV_CC= 3.0 to 3.6 V, V_SS-IO= V_SS-CPU= AV_SS= 0 V)

Rated value

Parameter

Symbol

Test Condition

Unit

Remarks

Min.

Typ.

Max.

V_CC= 3.3 V

_OH5= –23 mA

Vcc –

2.5

V_OH5

V_OH4

V_OH3

—

FIP00 to

FIP33

V_CC= 3.3 V

Vcc –

1.3

—

_OH4= –12 mA

V_CC= 3.3 V

_OH3= –12 mA

Vccv –

2.0

FIP34 to

FIP59

Output H

voltage

V_CC= 3.3 V

Vcc –

1.0

V_OH2

V_OH1

—

_OH2= –5 mA

SDA/SCL

I_OH1= –4 mA

—

5.5

Open drain pin *²

All output

pins other

than the

above

Vcc –

0.5

Vcc–

0.3

V_OH0

V_OL1

V_OL

_OH= –2.0 mA

I_OL= 15 mA

—

SDA/SCL

—

0.5

0.2

0.8

0.4

All output

pins other

than the

above

Output L

voltage

_OL= 2.0 mA

Input pins

other than

FIP00-59

Input leak

current

_CC= 3.0 V

•

I_IL

–5

–1

µA

( V_S<V_I<V_CC

)

FIP00 to

FIP33

V_CC= 3.3 V

(V_CC– 43<V_I<V_CC

I_LO3

I_LO2

—

µA

)

Output leak

current

FIP34 to

FIP59

V_CC= 3.3 V

(V_CC– 43<V_I< V_CC

Vcc = 3.3 V, and

internal operation at

16 MHz, and normal

operation

MB90M407/8

(argeted

—

standard

values)*¹

Vcc = 3.3 V, and

internal operation at

16 MHz, and A/D

operation

MB90M407/8

(targeted

standard

values)*¹

MB90MF408

MB90MV405 (F

targeted

Vcc = 3.3 V, and

internal operation at

16 MHz, and normal

operation

—

I_CC

standard

Power

supply

current

values)*¹

Vcc

MB90MF408

MB90MV405

Vcc = 3.3 V, and

internal operation at

16 MHz, and A/D

operation

(F targeted

standard

values)*¹

Flash

programming/erasing

—

MB90MF408

Vcc = 3.3 V, and

internal operation at

16 MHz, and sleep

operation

I_CCS

(Continue)

(Continued)

Rated value

Parameter

Symbol

Test Condition

Unit

Remarks

Min.

Typ.

Max.

(Targeted

standard

values)

Power supply

current

T_A= +25°C, and

operation stopped

I_CCH

—

µA

Pull-up

resistor

R_UP

RSTX

MD2

—

200

160

kΩ

R_DW1

Pull-down

resistor

When there are

settings

FIP00 to FIP59

120

*1: Current values that are specified do not include the consumption current on the high withstandable

voltage pins. They indicate the consumption current internally on the circuit.

*2: On the 1st ES product of MB90MF408, the Max. standard value is 3.6 V (can be used up to 4.5 V at

the test lab level).

Notes:

1. The V_CCspecification in the table means: V_DD-FIP= V_DD-VFT= V_CC-CPU. Use with the same

power supply level as the three pins described above. Also, V_SSmeans: V_SS-IO= V_{SS – CPU}

Connect this pin to the GND.

2. There can be changes in the current value according to improvements in performance. The

measuring condition of the power supply current is the external clock.

• PLL operating guaranteed range

Relationship between internal-operation clock frequency and power supply voltage

PLL operating guaranteed range

3.6

3.0

1.5

Internal Clock f_CP(MHz)

Relationship between original oscillation frequency and internal-operation clock frequency

1 multipulation

4 multipulation

3 multipulation 2 multipulation

Non-

multipulation

1.5

Original Oscillating Clock f_CP(MHz)

A/D Conversion Unit Electrical Characteristics

(T_A= –40 to +85°C, V_CC-CPU≤ AVcc = 3.0 V to 3.6 V, V_SS-CPU= V_SS-IO= AVss = 0 V)

Rated value

Typ.

Parameter

Symbol

Unit

Remarks

Min.

Max.

Can switch to 8

bits

Resolution

—

bit

Overall error

—

±3.0

±2.5

±1.9

LSB

Non-linearity error

Differential linearity error

AN0 to

AN15

Avss

–1.5 LSB

A•ss

+0.5 LSB

Avss

+2.5 LSB

Zero transition voltage

V_OT

V_FST

—

1LSB=

AVcc/1022

Full scale transition

voltage

AN0 to

AN15

AVcc

–3.5 LSB

AVcc

–1.5 LSB

Avcc

+0.5 LSB

Conversion time

(Sampling + Compare)

—

98 t_CP

—

16 MHz operation

Sampling time

Compare time

—

32 t_CP

66 t_CP

—

16 MHz operation

AN0 to

AN15

Analog port input current

I_AIN

—

µA

AN0 to

AN15

Analog input voltage

Reference voltage

V_AIN

AVcc

—

I_A

AVcc

3.0

—

AVcc

µA

Power supply current

I_AH

I_R

—

100

—

200

Reference voltage

supply current

I_RH

AN0 to

AN15

Channel differences

—

LSB

*1: When not operating A/D converter, this is the current (V_CC-CPU= AV_CC= 3.3 V) when the CPU is

stopped.

*2: t_CPmeans: 1/internal operating frequency. When the internal operating frequency is 16 MHz, t_CPis

1/16 MHz = 62.5 ns.

Notes:

1. The reference L value is fixed at AV_SS; the reference H value is fixed at AV_CC

The error is relatively large as the AV_CCbecomes smaller.

2. Analog input external circuit output impedance should use the following conditions.

External Circuit Output Impedance ≤ 10 kΩ

3. If the external circuit output impedance is too high, there maybe insufficient time for

sampling of the analog voltage.

•

Analog input circuit model diagram

R_ON

Comparator

Analog input

MB90M407/M408

R= About 1.5 kΩ

C= About 30 pF

MB90MF408, MB90MV405

R = About 3.0 kΩ

C = About 65 pF

Note: Numeric values herein should be used as a guide.

6. Handling Device

• Preventing latch-up

Latch-up may occur in CMOSIC when a voltage higher than V_CC-CPUor lower than V_SS-CPUis applied to the

input or output pins, or a voltage exceeding the rated value is applied between V_CC-CPUand V_SS-CPU. Latch-

up may cause a rapid increase in the supply current, sometimes resulting in thermal damage to the device.

Therefore, keep the used voltage within the maximum ratings.

When turning the power on and off the analog supply voltage (AV_CC) analog input should not exceed the

digital supply voltage (V_CC-CPU).

• Voltage supplies should be stabilized.

A sudden change of the power supply voltage may cause a malfunction even within the guaranteed range

of operation of the V_CC-CPUpower supply voltage.

For reference of stabilization, voltage variations are recommended to be restrained so that V_CC-CPUripple

variations (P-P values) are below 10% of the standard V_CC-CPUvalue in commercial frequencies (50 to 60

Hz), and so that transient variation is below 0.1 V/ms in sudden changes during power switchovers.

• Precautions when turning on the power supply

Ensure a minimum of 50 µs (between 0.2 to 2.7 V) for voltage rise times when turning on the power supply

to prevent malfunction of the built-in power reduction circuit.

• Handling of unused input pins

Leaving unused input pins open may cause a malfunction. Therefore, these pins should be connected to a

pull-up or a Pull-down resistor.

• Handling of A/D converters power supply pins

Connect power supply pins with AV_CC= V_CC-CPU, AV_SS= V_CC-IOeven when not using the A/D converters.

• Precautions when using the external clock

Oscillating stability waiting time is required when resetting from the Power On Reset, Stop Mode when

using the external clock.

• Order of turning on the power

Turn off the digital power supply (V_CC-CPU) after turning off the A/D converter power supplie (AV_CC,AV_SS)

and analog input (AN0 to AN15).

Do not allow the input voltage to exceed AV_CCwhen using the analog input pins as an input port.

MB90M407A [FUJITSU]

相关型号：

MB90M407APF

MB90M407PF

MB90M408

MB90M408A

MB90M408APF

MB90M408PF

MB90MF408

MB90MF408A

MB90MF408APF

MB90MF408PF

MB90MV405

MB90P214A