FA531X [FUJI]

Bipolar IC For Switching Power Supply Control; 双极型集成电路开关电源控制
FA531X
型号: FA531X
厂家: FUJI ELECTRIC    FUJI ELECTRIC
描述:

Bipolar IC For Switching Power Supply Control
双极型集成电路开关电源控制

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Bipolar IC  
For Switching Power Supply Control  
FA531X series  
FA5310BP(S), FA5314P(S), FA5316P(S)  
FA5311BP(S), FA5315P(S), FA5317P(S)  
Dimensions, mm  
Á SOP-8  
5
8
Description  
The FA531X series are bipolar ICs for switching power supply  
control that can drive a power MOSFET.  
These ICs contain many functions in a small 8-pin package.  
With these ICs, a high-performance and compact power  
supply can be created because not many external discrete  
1
4
components are needed.  
6.05  
Features  
• Drive circuit for connecting a power MOSFET  
• Wide operating frequency range (5 to 600kHz)  
• Pulse-by-pulse overcurrent limiting function  
• Overload cutoff function (Latch or non-protection mode  
selectable)  
0.6  
0.4±0.1 1.27±0.2  
• Output ON/OFF control function by external signal  
• Overvoltage cutoff function in latch mode  
• Undervoltage malfunction prevention function  
• Low standby current (90µA typical)  
Á DIP-8  
8
5
• Exclusive choices by circuits (See selection guide on page 25)  
• 8-pin package (DIP/SOP)  
4
1
Applications  
• Switching power supply for general equipment  
9.3  
1.5  
7.6  
2.54±0.25 0.5±0.1  
Block diagram  
Á FA5310BP(S)/FA5311BP(S)/FA5316P(S)/FA5317P(S)  
Pin Pin  
No. symbol  
Description  
1
2
3
4
5
6
7
8
RT  
Oscillator timing resistor  
Feedback  
FB  
IS (+)  
GND  
OUT  
VCC  
CT  
Overcurrent (+) detection  
Ground  
Output  
Power supply  
Oscillator timing capacitor  
Soft-start and ON/OFF control  
CS  
Á FA5314P(S)/FA5315P(S)  
Pin Pin  
Description  
No. symbol  
1
2
3
4
5
6
7
8
RT  
Oscillator timing resistor  
Feedback  
FB  
IS (–)  
GND  
OUT  
VCC  
CT  
Overcurrent (–) detection  
Ground  
Output  
Power supply  
Oscillator timing capacitor  
Soft-start and ON/OFF control  
CS  
1
FA531X series  
Selection guide  
UVLO (typ.)  
Type  
Polarity of overcurrent  
detection  
Max. duty  
cycle (typ.)  
Max. output  
current  
Application  
ON threshold  
OFF threshold  
FA5310BP(S)  
FA5311BP(S)  
FA5314P(S)  
FA5315P(S)  
FA5316P(S)  
FA5317P(S)  
46%  
70%  
46%  
70%  
46%  
70%  
+
+
+
+
16.0V  
16.0V  
15.5V  
15.5V  
15.5V  
15.5V  
8.70V  
8.70V  
8.40V  
8.40V  
8.40V  
8.40V  
1.5A  
1.5A  
1.5A  
1.5A  
1.0A  
1.0A  
Forward type  
Flyback type  
Forward type  
Flyback type  
Forward type  
Flyback type  
Absolute maximum ratings  
Recommended operating conditions  
Item  
Symbol Min. Max.  
Unit  
Item  
Symbol  
Rating  
Unit  
Supply voltage  
VCC  
10  
30  
V
Supply voltage  
VCC  
31  
V
Oscillator timing resistance  
FA5310/11  
FA5314/15/16/17  
Output current  
FA5310/11/14/15  
FA5316/17  
RT  
3.3  
1
10  
10  
k  
IO  
±1.5  
±1.0  
A
Soft-start capacitor  
CS  
0.1  
5
1
µF  
Feedback terminal input voltage  
VFB  
VIS  
4
V
V
Oscillation frequency  
fOSC  
600  
kHz  
Overcurrent detection  
terminal input voltage  
–0.3 to +4  
CS terminal input current  
Total power dissipation  
(Ta=25°C)  
ICS  
Pd  
2
mA  
800 (DIP-8) *1  
550 (SOP-8) *2  
–30 to +85  
125  
mW  
Operating temperature  
Junction temperature  
Storage temperature  
Notes:  
Topr  
Tj  
°C  
°C  
°C  
Tstg  
–40 to +150  
1 Derating factor Ta > 25°C : 8.0mW/°C (on PC board )  
2 Derating factor Ta > 25°C : 5.5mW/°C (on PC board )  
*
*
Electrical characteristics (Ta=25°C, Vcc=18V, fOSC=135kHz)  
Oscillator section  
Item  
Symbol  
fOSC  
fdV  
Test condition  
Min.  
125  
Typ.  
Max.  
Unit  
Oscillation frequency  
RT=5.1k, CT=360pF  
VCC=10 to 30V  
135  
±1  
145  
kHz  
%
Frequency variation 1 (due to supply voltage change)  
Frequency variation 1 (due to temperature change)  
fdr  
Ta=–30 to +85°C  
±1.5  
%
Pulse width modulation circuit section  
Item  
Symbol Test condition FA5310/14/16  
Min. Typ. Max. Min. Typ. Max.  
–660 –800 –960 –660 –800 –960 µA  
FA5311/15/17  
Unit  
Feedback terminal source current  
Input threshold voltage (Pin 2)  
IFB  
VFB=0  
VTH FBO Duty cycle =0%  
VTH FBM Duty cycle =DMAX  
DMAX  
0.75  
1.80  
46  
0.75  
2.30  
70  
V
V
Maximum duty cycle  
43  
49  
66  
74  
%
Soft-start circuit section  
Item  
Symbol Test condition FA5310/14/16  
FA5311/15/17  
Unit  
Min. Typ. Max. Min. Typ. Max.  
Charge current (Pin 8)  
ICHG  
Pin 8=0V  
–15  
–10  
–5  
–15  
–10  
–5  
µA  
V
Input threshold voltage (Pin 8)  
VTH CSO Duty cycle =0%  
VTH CSM Duty cycle =DMAX  
0.90  
1.90  
0.90  
2.30  
V
2
FA531X series  
Overcurrent limiting circuit section  
Item  
Symbol Test condition FA5310/11/16/17  
Min. Typ. Max. Min. Typ. Max.  
0.21 0.24 0.27 –0.21 –0.17 –0.14 V  
–300 –200 –100 –240 –160 –80 µA  
150 200  
FA5314/15  
Unit  
Input threshold voltage (Pin 3)  
Overcurrent detection terminal source current  
Delay time  
VTH IS  
IIS  
Pin 3=0V  
TPD IS  
ns  
Latch-mode cutoff circuit section  
Item  
Symbol Test condition  
Min.  
25  
Typ.  
45  
Max.  
65  
Unit  
µA  
V
CS terminal sink current  
Cutoff threshold voltage (Pin 8)  
ISINK CS  
VTH CS  
Pin 8=6V, Pin 2=1V  
6.5  
7.0  
7.5  
Overload cutoff circuit section  
Item  
Symbol Test condition  
Min.  
Typ.  
Max.  
Unit  
Cutoff-start voltage (Pin 2)  
VTH FB  
2.6  
2.8  
3.1  
V
Undervoltage lockout circuit section  
Item  
Symbol Test condition FA5310/11  
FA5314/15/16/17  
Unit  
Min. Typ. Max. Min. Typ. Max.  
15.5 16.0 16.5 14.8 15.5 16.2  
8.20 8.70 9.20 7.70 8.40 9.10  
OFF-to-ON threshold voltage  
ON-to-OFF threshold voltage  
VCC ON  
V
V
VCC OFF  
Output section  
Item  
Symbol  
Test condition  
Min.  
Typ.  
Max.  
Unit  
FA5310/11/14/15 FA5316/17  
L-level output Voltage  
H-level output Voltage  
VOL  
VOH  
IO=100mA  
IO=–100mA  
VCC=18V  
No load  
IO=50mA  
IO=–50mA  
VCC=18V  
No load  
1.30  
16.5  
1.80  
V
V
16.0  
Rise time  
Fall time  
tr  
tf  
50  
50  
ns  
ns  
No load  
No load  
Output ON/OFF circuit section  
Item  
Symbol  
Test condition  
Min.  
Typ.  
–10  
Max.  
Unit  
µA  
V
CS terminal source current  
OFF-to-ON threshold Voltage (Pin 8)  
ON-to-OFF threshold Voltage (Pin 8)  
I
source cs Pin 8=0V  
–15  
–5  
VTH ON  
VTH OFF  
CS terminal voltage OFFON  
CS terminal voltage ONOFF  
0.56  
0.42  
V
Overall device  
Item  
Symbol  
ICC ST  
ICC OP  
ICC OFF  
ICCL  
Test condition  
Min.  
Typ.  
90  
Max.  
150  
15  
Unit  
µA  
Standby current  
VCC=14V  
Operating-state supply current  
OFF-state supply current  
Cutoff-state supply current  
9
mA  
mA  
mA  
1.1  
1.1  
1.8  
1.8  
3
FA531X series  
Description of each circuit  
1. Oscillator (See block diagram)  
The oscillator generates a triangular waveform by charging and  
discharging a capacitor. CT pin voltage oscillates  
between an upper limit of approx. 3.0V and a lower limit of  
approx. 1.0V. The oscillation frequency is determined by a  
external resistance and capacitance shown in figure 1, and  
approximately given by the following equation:  
106  
f (kHZ) =  
.........(1)  
4RT (k) • CT (pF)  
The recommended oscillation range is between 5k and  
600kHz.  
Fig. 1 Oscillator  
The oscillator output is connected to a PWM comparator.  
2. Feedback pin circuit  
Figure 2 gives an example of connection in which an  
optocoupler is used to couple the feedback signal to the FB pin.  
It is designed to be strong against noise and will not create  
parasitic oscillation so much, because the output impedance at  
the FB pin is as low as 4k to 5k. If this circuit causes power  
supply instability, the frequency gain can be decreased by  
connecting R4 and C4 as shown in figure 2. R4 should be  
between several tens of ohms to several kiloohms and C4  
should be between several thousand picofarads to one  
microfarads.  
3. PWM comparator  
The PWM comparator has four inputs as shown in Figure 3.  
Oscillator output is compared with CS pin voltage , FB pin  
voltage , and DT voltage . The lowest of three inputs , ,  
and is compared with output . If it is lower than the  
oscillator output, the PWM comparator output is high, and if it is  
higher than the oscillator output, the PWM comparator  
output is low (see Fig. 4).  
The IC output voltage is high during when the comparator  
output is low, and the IC output voltage is low during when the  
comparator output is high.  
Fig. 2 Configuration with optocoupler (FB pin input)  
When the IC is powered up, CS pin voltage controls soft start  
operation. The output pulse then begins to widen gradually.  
During normal operation, the output pulse width is determined  
within the maximum duty cycle set by DT voltage under the  
condition set by feedback signal , to stabilize the output  
voltage.  
Fig. 3 PWM comparator  
Fig. 4 PWM comparator timing chart  
4
FA531X series  
4. CS pin circuit  
As shown in Figure 5 capacitor CS is connected to the CS pin.  
When power is turned on, the constant current source (10µA)  
begins to charge capacitor CS. Accordingly, the CS pin  
voltage rises as shown in Figure 6. The CS pin is connected to  
an input of the PWM comparator. The device is in soft-start  
mode while the CS pin voltage is between 0.9V and 1.9V  
(FA5310/14/16) and between 0.9V and 2.3V(FA5311/15/17).  
During normal operation, the CS pin is clamped at 3.6V by  
internal zener diode Zn. If the output voltage drops due to an  
overload, etc., the clamp voltage shifts from 3.6V to 8.0V. As a  
result, the CS pin voltage rises to 8.0V. The CS pin is also  
connected to latch comparator C2. If the pin voltage rises  
above 7.0V, the output of comparator C2 goes high to turn off  
the bias circuit, thereby shutting the output down. Comparator  
C2 can be used not only for shutdown in response to an  
overload, but also for shutdown in response to an overvoltage.  
Comparator C1 is also connected to the CS pin, and the bias  
circuit is turned off and the output is shut down if the CS pin  
voltage drops below 0.42V. In this way, comparator C1 can  
also be used for output on/off control.  
Fig. 5 CS pin circuit  
As explained above, the CS pin can be used for soft-start  
operation, overload and overvoltage output shutdown and  
output on/off control.  
Further details on the four functions of the CS pin are given  
below.  
4.1 Soft start function  
Figure 7 shows the soft start circuit. Figure 8 is the soft-start  
operation timing chart. The CS pin is connected to capacitor  
CS. When power is turned on, a 10µA constant-current source  
begins to charge the capacitor. As shown in the timing chart,  
the CS pin voltage rises slowly in response to the charging  
current. The CS pin is connected internally to the PWM  
comparator. The comparator output pulse slowly widens as  
shown in the timing chart.  
The soft start period can be approximately evaluated by the  
period ts from the time the IC is activated to the time the output  
pulse width widens to 30%. Period ts is given by the following  
Fig. 6 CS pin waveform  
equation:  
tS(mS)=160CS(µF)...................................(2)  
Fig. 7 Soft-start circuit  
Fig. 8 Soft-start timing chart  
5
FA531X series  
4.2 Overload shutdown  
Figure 9 shows the overload shutdown circuit, and Figure 10 is  
a timing chart which illustrates overload shutdown operation.  
If the output voltage drops due to an overload or short-circuit,  
the output voltage of the FB pin rises. If FB pin voltage  
exceeds the reference voltage (2.8V) of comparator C3, the  
output of comparator C3 switches low to turn transistor Q off.  
In normal operation, transistor Q is on and the CS pin is  
clamped at 3.6V by zener diode Zn. With Q off, the clamp is  
released and the 10µA constant-current source begins to  
charge capacitor CS again and the CS pin voltage rises. When  
the CS pin voltage exceeds the reference voltage (7.0V) of  
comparator C2, the output of comparator C2 switches high to  
turn the bias circuit off. The IC then enters the latched mode  
and shuts the output down. Shutdown current consumption is  
400µA(VCC=9V). This current must be supplied through the  
startup resistor. The IC then discharges the MOSFET gates.  
Shutdown operation initiated by an overload can be reset by  
lowering supply voltage VCC below VCC OFF or forcing the CS  
pin voltage below 7.0V.  
Fig. 9 Overload shutdown circuit  
The period tOL from the time that the output is short-circuited to  
the time that the bias circuit turns off is given by the following  
equation:  
tOL(mS)=340Cs(µF)........................................... (3)  
4.3 Overvoltage shutdown  
Figure 11 shows the overvoltage shutdown circuit, and Figure  
12 is a timing chart which illustrates overvoltage shutdown  
operation.  
The optocoupler PC1 is connected between the CS and VCC  
pins. If the output voltage rises too high, the PC1 turns on to  
raise the voltage at the CS pin via resistor R6. When the CS  
pin voltage exceeds the reference voltage (7.0V) of  
comparator C2, comparator C2 switches high to turn the bias  
circuit off. The IC then enters the latched mode and shuts the  
output down. The shutdown current consumption of the IC is  
400µA(VCC=9V). This current must be applied via startup  
resistor R5.  
Fig. 10 Overload shutdown timing chart  
The IC then discharges the MOSFET gates.  
The shutdown operation initiated by an overvoltage condition  
can be reset by lowering supply voltage VCC below VCC OFF or  
forcing the CS pin voltage below 7.0V.  
During normal operation, the CS pin is clamped by a 3.6V  
zener diode with a sink current of 65µA max. Therefore, a  
current of 65µA or more must be supplied by the optocoupler  
in order to raise the CS pin voltage above 7.0V.  
Fig. 11 Overvoltage shutdown circuit  
Fig. 12 Overvoltage shutdown timing chart  
6
FA531X series  
4.4 Output ON/OFF control  
The IC can be turned on and off by an external signal applied  
to the CS pin.  
Figure 13 shows the external output on/off control circuit, and  
Figure 14 is the timing chart.  
The IC is turned off if the CS pin voltage falls below 0.42V. The  
output of comparator C1 switches high to turn the bias circuit  
off. This shuts the output down. The IC then discharges the  
MOSFET gates.  
The IC turns on if the CS pin is opened for automatic soft start.  
The power supply then restarts operation.  
5. Overcurrent limiting circuit  
The overcurrent limiting circuit detects the peak value of every  
drain current pulse of the main switching MOSFET to limit the  
overcurrent.  
The detection threshold is + 0.24V for FA5310B/11B/16/17  
with respect to ground as shown in Figure 15.  
The drain current of the MOSFET is converted to voltage by  
resistor R7 and fed to the IS pin of the IC. If the voltage  
exceeds the reference voltage (0.24V) of comparator C4, the  
output of comparator C4 goes high to set flip-flop output Q  
high. The output is immediately turned off to shut off the  
current. Flip-flop output Q is reset on the next cycle by the  
output of the oscillator to turn the output on again. This  
operation is repeated to limit the overcurrent.  
Fig. 13 External output on/off control circuit  
If the overcurrent limiting circuit malfunctions due to noise,  
place an RC filter between the IS pin and the MOSFET.  
Figure 16 is a timing chart which illustrates current-limiting  
operations.  
Fig. 14 Timing chart for external output on/off control  
Fig. 15 Overcurrent limiting circuit for FA5310/11/16/17  
Fig. 16 Overcurrent timing chart for FA5310/11/16/17  
7
FA531X series  
The detection threshold is -0.17V for FA5314/15 with respect to  
ground as shown in Figure 17.  
The operation is similar to that of FA5310B/11B/16/17 except  
the threshold is minus voltage compared to that which is plus  
voltage for FA5310B/11B/16/17.  
Figure 18 is a timing chart which illustrates current limiting  
operations.  
6. Undervoltage lockout circuit  
The IC incorporates a circuit which prevents the IC from  
malfunctioning when the supply voltage drops. When the  
supply voltage is raised from 0V, the IC starts operation with  
VCC=VCC ON.  
If the supply voltage drops, the IC shuts its output down when  
VCC=VCC OFF. When the undervoltage lockout circuit operates,  
the CS pin goes low to reset the IC.  
7. Output circuit  
As shown in Figure 19, the IC's totem-pole output can directly  
drive the MOSFET. The OUT pin can source and sink currents  
of up to 1.5A or 1.0A.  
Fig. 17 Overcurrent limiting circuit for FA5314/15  
If IC operation stops when the undervoltage lockout circuit  
operates, the gate voltage of the MOSFET goes low and the  
MOSFET is shut down.  
CS pin voltage (3.6V)  
DT voltage  
Oscillator output  
FB pin voltage  
H
OUT pin output  
L
IS ( – ) pin voltage  
Comparator C4  
Minus  
detection  
Reference  
voltage (– 0.17V)  
Bias voltage  
OFF  
Overcurrent limiting  
Fig. 18 Overcurrent timing chart for FA5314/15  
Fig. 19 Output circuit  
8
FA531X series  
Design advice  
1. Startup circuit  
It is necessary to start-up IC that the voltage inclination of  
VCC terminal “dVcc/dt” satisfies the following equation(4).  
dVcc/dt(V/s)>1.8/Cs(µF)...............................(4)  
Cs : Capacitor connected between CS terminal and GND  
Note that equation (4) must be satisfied in any condition. Also,  
it is necessary to keep “latch mode” for overload protection or  
overvoltage protection that the current supplied to VCC  
terminal through startup resistor satisfies the following  
equation(5).  
Icc(Lat)> 0.4mA for Vcc Ϲ 9.2V ..................(5)  
Icc(Lat) : Cutoff-state( = Latch mode ) supply current  
The detail is explained as follows.  
Fig. 20 Startup circuit example(1)  
(1) Startup circuit connected to AC line directly  
Fig. 20 shows a typical startup circuit that a startup  
resistor Rc is connected to AC line directly. The period from  
power-on to startup is determined by Rc, RD and CA. Rc, RD  
and CA must be designed to satisfy the following equations.  
dVcc/dt(V/s)=  
(1/CA) • {(VAVE–Vccon )/RC–Vccon/RD–Iccst} >  
1.8/(Cs(µF))................................................(6)  
Rc(k)< (VAVE–9.2(V))/{0.4 (mA) + (9.2(V)/RD(k) } ...........(7)  
VAVE = Vac •ǰ2/π : Average voltage applied to AC line side of Rc  
Vac:  
AC input effective voltage  
Vccon: ON threshold of UVLO, 16.5V(max.) or 16.2V(max.)  
Iccst: Standby current, 0.15 mA(max.)  
In this method, Vcc voltage includes ripple voltage influenced  
by AC voltage. Therefore, enough dVcc/dt required by  
equation (6) tend to be achieved easily when Vcc reaches to  
Vccon even if Vcc goes up very slowly. After power-off, Vcc  
does not rise up because a voltage applied from bias winding  
to VCC terminal decreases and the current flowing RC be-  
comes zero, therefore, re-startup does not occur after Vcc falls  
down below OFF threshold of UVLO until next power-on.  
9
FA531X series  
(2) Startup circuit connected to rectified line  
This method is not suitable for FA531X, especially concerned  
with re-startup operation just after power-off or startup which  
AC input voltage goes up slowly. Fig. 21 shows a startup  
circuit that a startup resistor RA is connected to rectified line  
directly.  
The period from power-on to startup is determined by RA, RB  
and CA. RA, RB and CA must be designed to satisfy the  
following equations.  
dVcc/dt(V/s)=  
(1/CA)•{( VIN –Vccon )/RA– Vccon/RB–Iccst } >  
1.8/(Cs(µF))..........................................(8)  
RA(k) < ( VIN– 9.2(V) )/{ 0.4(mA) + ( 9.2(V)/RB(k) ) }....(9)  
VIN : ǰ2 • (AC input effective voltage)  
After power-off, once VCC falls down below OFF threshold  
voltage, VCC rises up again and re-startup occurs while the  
capacitor C1 is discharged until approximately zero because  
VCC voltage rises up by the current flowing RA.  
Fig. 21 Startup circuit example(2)  
This operation is repeated several times.  
Startup is impossible (dVcc/dt <1.8/Cs  
just before Vcc reaches Vccon).  
After the repeated operation, IC stops in the condition that VCC  
voltage is equal to Vccon (=ON threshold) because capacitor  
C1 is discharged gradually and the decreased VCC inclination  
is out of the condition required by equation (4). After that, re-  
startup by power-on can not be guaranteed even when  
equation (8) is satisfied.  
Icc>4mA is necessary for startup at  
Tj <100°C and dVcc/dt=0.  
The image of that the startup is impossible is shown in Fig. 22.  
It is necessary to startup IC that supply current Icc(startup) to  
VCC is over 4mA in the condition of Tj < 100°C during Vcc is  
kept at Vccon(Լ16V, balance state at Vccon after the repeated  
operation.  
Power OFF  
Power ON  
Vccon  
Startup is impossible  
Icc(start-up) > 4mA  
at Vcc=Vccon, Tj<100°C, after power-off  
Vccoff  
This balance state that startup is impossible tends to occur at  
higher temperature. If power-on is done when Vcc is not kept  
at Vccon (for example:power-off is done and after enough time  
that C1 is discharged until Vcc can not be pulled up to Vccon),  
the IC can startup in the condition given by equation(8).  
Fig. 22 A image of waveform when re-startup is impossible  
In some cases, such as when the load current of power supply  
is changed rapidly, you may want to prolong the hold time of  
the power supply output by means of maintaining Vcc over the  
off threshold.  
For this purpose, connect diode D4 and electrolytic capacitor  
C4 as shown in Fig. 23. This prolongs the hold time of the  
power supply voltage Vcc regardless of the period from power-  
on to startup.  
Fig. 23 Startup circuit example(3)  
10  
FA531X series  
2.Disabling overload shutdown function  
As shown in Figure 24, connect a 11kresistor between the  
FB pin and ground. Then, the CS pin voltage does not rise  
high enough to reach the reference voltage (7.0V) of the latch  
comparator, and the IC does not enter the OFF latch mode.  
With this connection, the overvoltage shutdown function is  
available.  
3.Setting soft start period and OFF latch delay  
independently  
Figure 25 shows a circuit for setting the soft start period and  
OFF latch delay independently. In this circuit, capacitance CS  
determines the soft start period, and capacitance CL  
determines the OFF latch delay. If the overload shutdown and  
overvoltage shutdown functions raise the CS pin voltage to  
around 5V, zener diode Zn becomes conductive to charge CL.  
The OFF latch delay can be thus prolonged by CL.  
Fig. 25 Independent setting of soft-start period  
and OFF latch delay  
4. Laying out VCC and ground lines  
Figure 26 and 27 show the recommended layouts of VCC and  
ground lines. The bold lines represent paths carrying large  
currents. The lines must have an adequate thickness.  
5.Sink current setting for CS terminal  
A sink current to CS terminal must be satisfied the following  
condition to prevent from the malfunction which uncontrolled  
pulse output generates at OUT terminal when latch-mode  
protection should be operated for overvoltage.  
65µA < Ics(sink) < 500µA at Vcs= 6.5(V)  
Ics(sink) : Sink current to CS terminal  
Example (for the circuit shown in Fig. 28 )  
Ics(sink) = (28(V)–18(V)– 6.5(V) )/7.5(k)  
Լ 467 (µA) < 500 (µA)  
Fig. 26 Vcc line and ground line (1) for FA5310B/11B/16/17  
Fig. 27 Vcc line and ground line (2) for FA5314/15  
7.5k  
18V Zener diode  
CS  
Fig. 24 Disabling overload shutdown function  
Under 500µA  
VCC  
Fig. 28 Setting sink current for CS terminal  
11  
FA531X series  
Characteristic curves (Ta=25°C)  
Oscillation frequency (fOSC) vs.  
timing capacitor capacitance (CT)  
Oscillation frequency (fOSC) vs. ambient temperature (Ta)  
Output duty cycle vs. FB terminal voltage (VFB)  
Output duty cycle vs. FB terminal source current  
(ISOURCE)  
Output duty cycle vs. CS terminal voltage (VCS)  
CS terminal sink current (ISINK CS) vs.  
CS terminal voltage (VCS)  
12  
FA531X series  
H-level output voltage (VOH) vs. output source current (ISOURCE)  
FA5310/11/14/15  
FA5316/17  
5
VCC=18V  
4
3
2
1
0
10–2  
2
5
10–1  
ISOURCE [A]  
2
5
100  
2
L-level output voltage(VOL) vs. output sink current (ISINK)  
FA5310/11/14/15  
FA5316/17  
5
V
CC=18V  
4
3
2
1
0
10–2  
2
5
10–1  
SINK [A]  
2
5
100  
2
I
IS (+) terminal threshold voltage (VTH IS(+)) vs.  
ambient temperature (Ta)  
IS (–) terminal threshold voltage (VTH IS(–)) vs.  
ambient temperature (Ta)  
FA5310/11/16/17  
FA5314/15  
–190  
–180  
–170  
–160  
–150  
–140  
–25  
0
25  
Ta [˚C]  
50  
75  
100  
13  
FA531X series  
IS (+) terminal current (IIS(+)) vs.  
IS (+) terminal voltage (VIS(+))  
FA5310/11/16/17  
IS (-) terminal current (IIS(-)) vs.  
IS (-) terminal voltage (IIS(-))  
FA5314/15  
600  
–200  
–180  
500  
400  
300  
–160  
–140  
–120  
–100  
–80  
200  
100  
0
–60  
–40  
–20  
–100  
–200  
–300  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.6  
0
–0.1  
–0.2  
–0.3  
–0.4  
–0.5  
VIS(+) [V]  
VIS(–) [V]  
Supply current (ICC) vs. supply voltage (VCC)  
Ordinary operation  
FA5310/11  
FA5314/15/16/17  
11  
11  
fosc=600kHz  
fosc=600kHz  
10  
9
10  
fosc=135kHz  
9
8
7
6
5
fosc=135kHz  
8
7
6
5
0.2  
0.1  
0.2  
0.1  
0
5
10  
15  
VCC [V]  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
VCC [V]  
Supply current (ICC) vs. supply voltage (VCC)  
OFF or OFF latch mode  
FA5310/11  
FA5314/15/16/17  
2.0  
2.0  
1.8  
1.6  
1.8  
1.6  
1.4  
1.2  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
1.0  
0.8  
0.6  
0.4  
0.2  
0.2  
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
VCC [V]  
VCC [V]  
14  
FA531X series  
Application circuit  
Á Example of FA5310B application circuit  
Á Example of FA5311B application circuit  
15  
FA531X series  
Á Example of FA5314 application circuit  
Á Example of FA5315 application circuit  
16  
FA531X series  
Á Example of FA5316 application circuit  
Á Example of FA5317 application circuit  
Parts tolerances characteristics are not defined in the circuit design  
sample shown above. When designing an actual circuit for a  
product, you must determine parts tolerances and characteristics for  
safe and economical operation.  
17  

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