GPC3XXXBx-NnnV-QL09X [GENERALPLUS]
3--channell Sound Conttrollller;
| 型号： | GPC3XXXBx-NnnV-QL09X |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | 3--channell Sound Conttrollller |
| 文件： | 总41页 (文件大小：1649K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GPC3XXXAx/Bx/Cx/Dx
3-channel Sound Controller
Aug. 28, 2017
Version 2.3
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPC3XXXAx/Bx/Cx/Dx
Table of Contents
PAGE
TABLE OF CONTENTS......................................................................................................................................................................................2
3-CHANNEL SOUND CONTROLLER..........................................................................................................................................................4
1. GENERAL DESCRIPTION......................................................................................................................................................................4
2. BLOCK DIAGRAM..................................................................................................................................................................................4
3. FEATURES .............................................................................................................................................................................................4
4. APPLICATION FIELD .............................................................................................................................................................................4
5. GPC3XXXAX/BX/CX/DX FAMILY AND FEATURE LIST ...........................................................................................................................5
6. SIGNAL DESCRIPTIONS .......................................................................................................................................................................7
6.1. SIGNAL DESCRIPTIONS FOR GPC3680A~ GPC3026A, GPC3340B~ GPC3092B, GPC3040B~ GPC3026B, GPC3340C/D, GPC3256C,
GPC3170A1~ GPC3092A1, GPC3170B1................................................................................................................................................7
6.2. SIGNAL DESCRIPTIONS FOR GPC3341A.............................................................................................................................................8
6.3. SIGNAL DESCRIPTIONS FOR GPC3010A/3010C..................................................................................................................................9
6.4. SIGNAL DESCRIPTIONS FOR GPC3011C...........................................................................................................................................10
6.5. LQFP48 PIN MAP FOR GPC3010A/C ............................................................................................................................................... 11
6.6. LQFP48 PIN MAP FOR GPC3011C................................................................................................................................................... 11
6.7. LQFP48 PIN MAP FOR GPC3040A/B, GPC3030A/B, GPC3025A/B..................................................................................................12
6.8. LQFP48 PIN MAP FOR GPC3080A, GPC3072A, GPC3063A, GPC3052A ........................................................................................12
6.9. LQFP48 PIN MAP FOR GPC3170AX/BX, GPC3120AX/BX, GPC3106AX/BX, GPC3092AX/BX............................................................13
6.10.LQFP48 PIN MAP FOR GPC3340A/B, GPC3256A/B.........................................................................................................................13
6.11.LQFP48 PIN MAP FOR GPC3680A, GPC3540A, GPC3480A, GPC3420A ........................................................................................14
6.12.LQFP128 PIN MAP FOR GPC3341A.................................................................................................................................................15
6.13.SSOP20 PIN MAP FOR GPC3040A/B, GPC3030A/B, GPC3025A/B .................................................................................................16
6.14.SSOP20 PIN MAP FOR GPC3080A, GPC3072A, GPC3063A, GPC3052A........................................................................................16
6.15.SSOP20 PIN MAP FOR GPC3170AX/BX, GPC3120AX/BX, GPC3106AX/BX, GPC3092AX/BX ...........................................................17
7. FUNCTIONAL DESCRIPTIONS............................................................................................................................................................18
7.1. CPU ..............................................................................................................................................................................................18
7.2. RAM AREA .....................................................................................................................................................................................18
7.3. ROMAREA.....................................................................................................................................................................................18
7.4. MAP OF MEMORY AND I/OS ..............................................................................................................................................................18
7.5. I/O PORT ........................................................................................................................................................................................19
7.6. HARDWARE PWMIO........................................................................................................................................................................19
7.7. POWER SAVING MODE.....................................................................................................................................................................19
7.8. RTC (REAL TIME CLOCK).................................................................................................................................................................19
7.9. WATCHDOG.....................................................................................................................................................................................19
7.10.LOW VOLTAGE RESET......................................................................................................................................................................20
7.11.INTERRUPT .....................................................................................................................................................................................20
7.12.TIMER/COUNTER .............................................................................................................................................................................20
7.13.SPEECH AND MELODY......................................................................................................................................................................20
7.14.OTP PROGRAMMING CIRCUIT FOR GPC3341A .................................................................................................................................20
8. ELECTRICAL SPECIFICATIONS..........................................................................................................................................................21
8.1. ABSOLUTE MAXIMUM RATINGS .........................................................................................................................................................21
8.2. DC CHARACTERISTICS (TA = 25℃) ..................................................................................................................................................21
© Generalplus Technology Inc.
Proprietary & Confidential
2
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
8.3. (3VOLT) EXTERNAL OSCILLATOR R RELATIVE FOSC TABLE FOR GPC3011C/010C (THE TABLE IS ONLY FOR REFERENCE) .........................23
8.4. THE RELATIONSHIP BETWEEN THE FOSC AND VDD...........................................................................................................................24
8.5. THE RELATIONSHIP BETWEEN THE VDD AND IOP (PWM OUTPUT OFF)..................................................................................................25
9. APPLICATION CIRCUITS.....................................................................................................................................................................26
9.1. APPLICATION CIRCUITS WITH LOW LOADINGS FOR GPC3680A~GPC3026A, GPC3340B~GPC3092B, GPC3040B~GPC3026B,
GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1....................................................................................................26
9.2. APPLICATION CIRCUITS WITH HEAVY LOADINGS (SUCH AS MOTOR, HIGH BRIGHTNESS LED) FOR GPC3680A~GPC3026A,
GPC3340B~GPC3092B, GPC3040B~GPC3026B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1. ....................27
9.3. APPLICATION CIRCUIT WITH LOW LOADING FOR GPC3341A...............................................................................................................28
9.4. APPLICATION CIRCUITS WITH HEAVY LOADING (SUCH AS MOTOR, HIGH BRIGHTNESS LED) FOR GPC3341A ...........................................29
9.5. APPLICATION CIRCUITS WITH LOW LOADING FOR GPC3010A/011C/010C...........................................................................................30
9.6. APPLICATION CIRCUITS WITH HEAVY LOADING (SUCH AS MOTOR, HIGH BRIGHTNESS LED) FOR GPC3010A/011C/010C.......................31
9.7. APPLICATION CIRCUITS WITH LOW LOADING WHEN USING FEEDBACK RC MODE ENABLE FOR GPC3010A/011C/010C .........................32
9.8. APPLICATION CIRCUITS WITH LOW LOADING WHEN USING FEEDBACK XTAL MODE ENABLE FOR GPC3010A/011C/010C......................33
10.PCB LAYOUT GUIDE FOR HEAVY LOADING APPLICATION..............................................................................................................34
10.1.THE PCB LAYOUT EXAMPLES ARE GIVEN AS FOLLOWS (FOR GPC3680A~ GPC3256A, GPC3340B~ GPC33256B)..............................34
10.2.THE PCB LAYOUT METHOD (POWER LINE CONNECTS IN SERIES) AS BELOW IS NOT PROPOSED (FOR GPC3680A~ GPC3256A, GPC3340B~
GPC33256B).........................................................................................................................................................................................34
10.3.THE PCB LAYOUT EXAMPLE IS GIVEN AS FOLLOWS (FOR GPC3341A).................................................................................................34
10.4.THE PCB LAYOUT METHOD (POWER LINE CONNECTS IN SERIES) AS BELOW IS NOT PROPOSED (FOR GPC3341A)...................................34
10.5.THE PCB LAYOUT EXAMPLES ARE GIVEN AS FOLLOWS (FOR GPC3170A~ GPC3052A, GPC3170B~ GPC3092B, GPC3340C/D,
GPC3256C, GPC3170A1~GPC3096A1, GPC3170B1)..........................................................................................................................35
10.6.THE PCB LAYOUT METHOD (POWER LINE CONNECTS IN SERIES) AS BELOW IS NOT PROPOSED (FOR GPC3170A~ GPC3052A, GPC3170B~
GPC3092B)...........................................................................................................................................................................................35
10.7.THE PCB LAYOUT EXAMPLES ARE GIVEN AS FOLLOWS (FOR GPC3040A/B~GPC3026A/B)..................................................................35
10.8.THE PCB LAYOUT METHOD (POWER LINE CONNECTS IN SERIES) AS BELOW IS NOT PROPOSED (FOR GPC3040A/B~GPC3026A/B) ........35
10.9.THE PCB LAYOUT EXAMPLES ARE GIVEN AS FOLLOWS (FOR GPC3010A/011C/010C)..........................................................................36
10.10. THE PCB LAYOUT METHOD (POWER LINE CONNECTS IN SERIES) AS BELOW IS NOT PROPOSED (FOR GPC3010A/011C/010C)............36
11. PACKAGE/PAD LOCATIONS ...............................................................................................................................................................37
11.1.ORDERING INFORMATION .................................................................................................................................................................37
11.2.LQFP48 INFORMATION ....................................................................................................................................................................37
11.3.LQFP128 INFORMATION ..................................................................................................................................................................38
11.4.SSOP20 INFORMATION ...................................................................................................................................................................39
12.DISCLAIMER........................................................................................................................................................................................40
13.REVISION HISTORY.............................................................................................................................................................................41
© Generalplus Technology Inc.
Proprietary & Confidential
3
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
3-CHANNEL SOUND CONTROLLER
** The system clock would start to slow down at lowest working voltage
(6MHz at 2.2V, 8MHz at 2.4V); please refer to the Frequency vs. VDD
curve on page 16 and page 17
1. GENERAL DESCRIPTION
The GPC3XXXAx/Bx/Cx/Dx is embedded with an 8-bit processor,
32K~2M bytes ROM or OTP ROM (by body), 96~256 bytes
ROM size: 32K~2M bytes (by body option)
RAM size: 96 ~256 bytes (by body option)
Built-in internal or external RC oscillator (by body option)
Built-in internal RC oscillator 8MHz or 6MHz(code option)
Approx. 10~680 seconds speech @6KHz sampling rate with
4-bit ADPCM (by body option)
SRAM, three 12-bit timer/counters, 12~24 general I/Os,
a
3-channel mixer, a pair of 12-bit PWM outputs and a real time
clock (by body). In audio processing, melody and speech can
be mixed into one output. It operates over a wide voltage range
and has a Low Voltage Reset function and a sleep mode to save
more power. It can be awakened from sleep mode by interrupt
sources or IO’s state changes. GPC3XXXAx/Bx/Cx/Dx is one
of the most suitable speech engines in the industry for vocal
applications.
Standby mode (Clock Stop mode) for power savings.
Max. 2.0uA ~ 5.0uA @ 4.5V (by body option)
Bit programmable 12~24 general I/Os(by body option)
Four I/Os with high sink current for LED application
All general IOs provide 1M pull-low function to prevent current
leakage while pressing the key (IOs to VDD)
Three 12-bit timer/counters
2. BLOCK DIAGRAM
Seven or eight IRQs & 1 NMI interrupt (by body option)
Two or three wake-up sources (by body option)
Feedback function (by body option)
8-bit
THREE 12-BIT
controller
AUTO RELOAD
TIMER
32KB~2MB ROM
(by body)
96B~256B SRAM
(by body)
VPP
(by body)
Low Voltage Reset (LVR) function
Watchdog function
IROSC/EROSC
CLOCK
(by body & option)
3 CHANNEL PWM
MIXER
IR function
OSC
(by body)
RTC function (by body option)
RESET
RESB
Four sets of hardware PWMIO supporting LED outputs with
brightness control of 256-level
IOB5
IOB4
AUDP
AUDN
RTC (by body)
PWM
VDD_REGIN
VDD_REGOUT
A 3-channel mixer with melody or ADPCM/PCM input
A pair of PWM outputs with volume control
Regulator
(by body)
24 PIN GENERAL I/O PORT
4. APPLICATION FIELD
IOA[7:0]
IOB[3:0]
IOB[7:4]
(by body) (by body)
IOC[7:0]
Talking instrument controller
General music synthesizer
High-end toy controller
Intelligent education toys
And more
3. FEATURES
Wide Operating Voltage: 2.0V/2.1V * - 5.5V (by body)
* The lowest operating voltage depends on LVR (Low Voltage Reset)
level. Typical LVR voltage is 2.0V/2.1V (by body), but with +/- 0.1V
deviation possibility
Working Voltage with 6MHz system clock: 2.2V ** - 5.5V
Working Voltage with 8MHz system clock: 2.4V ** - 5.5V
© Generalplus Technology Inc.
Proprietary & Confidential
4
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
5. GPC3XXXAx/Bx/Cx/Dx FAMILY AND FEATURE LIST
Body
GPC3680A
680 Sec.
GPC3540A
540 Sec.
GPC3480A
480 Sec.
GPC3420A
420 Sec.
GPC3341A
340 Sec.
-
-
-
Voice Duration
Working
2.1~5.5V
2.1~5.5V
2.1~5.5V
2.1~5.5V
2.0~5.5V
Voltage
RAM Size
ROM Size
Clock Source
IO Pin
128B
2MB
128B
1632KB
IROSC
24 (IOA/B/C)
IOB[3:0]
V
128B
1440KB
IROSC
24 (IOA/B/C)
IOB[3:0]
V
128B
1280KB
IROSC
24 (IOA/B/C)
IOB[3:0]
V
128B
1024KB(OTP)
IROSC
-
-
-
-
-
-
IROSC
24 (IOA/B/C)
IOB[3:0]
V
24 (IOA/B/C)
IOB[3:0]
V
High sink IO
Hardware
PWMIO
IR
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-
-
-
RTC
PWM Volume
control
Feedback
function
X
X
X
X
X
-
IRQ Interrupt
NMI interrupt
Wakeup source
8
8
8
8
8
1
3
-
-
-
1
1
1
1
3
3
3
3
Body
GPC3340A/B
GPC3256A/B
GPC3340C/D
GPC3256C
GPC3170A/B/A1/ GPC3120A/B/A1
B1
Voice Duration
Working
340 Sec.
2.0~5.5V
256 Sec.
2.0~5.5V
340 Sec.
2.0~5.5V
256 Sec.
2.0~5.5V
170 Sec.
2.0~5.5V
120 Sec.
2.0~5.5V
Voltage
RAM Size
ROM Size
Clock Source
IO Pin
128B
1024KB
IROSC
24 (IOA/B/C)
IOB[3:0]
V
128B
768KB
128B
1024KB
IROSC
16 (IOA/B)
IOB[3:0]
V
128B
768KB
IROSC
16 (IOA/B)
IOB[3:0]
V
128B
512KB
IROSC
16 (IOA/B)
IOB[3:0]
V
128B
384KB
IROSC
16 (IOA/B)
IOB[3:0]
V
IROSC
24 (IOA/B/C)
IOB[3:0]
V
High sink IO
Hardware
PWMIO
IR
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
RTC
PWM Volume
control
Feedback
function
X
X
X
X
X
X
IRQ Interrupt
NMI interrupt
Wakeup source
8
1
3
8
1
3
8
1
3
8
1
3
8
1
3
8
1
3
Note1: Only 1M Ohm pull low R is available on IOA[7:0] for GPC3340B~GPC3092B, GPC3340D, and GPC3170B1.
© Generalplus Technology Inc.
Proprietary & Confidential
5
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
Body
Voice Duration
Working Voltage
RAM Size
ROM Size
Clock Source
IO Pin
GPC3106A/B/A1 GPC3092A/B/A1
GPC3080A
80 Sec.
2.0~5.5V
128B
GPC3072A
72 Sec.
2.0~5.5V
128B
GPC3063A
63 Sec.
2.0~5.5V
128B
GPC3052A
52 Sec.
2.0~5.5V
128B
106 Sec.
2.0~5.5V
128B
320KB
IROSC
16 (IOA/B)
IOB[3:0]
V
92 Sec.
2.0~5.5V
128B
288KB
IROSC
16 (IOA/B)
IOB[3:0]
V
256KB
IROSC
16 (IOA/B)
IOB[3:0]
V
224KB
IROSC
16 (IOA/B)
IOB[3:0]
V
192KB
IROSC
16 (IOA/B)
IOB[3:0]
V
160KB
IROSC
16 (IOA/B)
IOB[3:0]
V
High sink IO
Hardware PWMIO
IR
V
V
V
V
V
V
RTC
V
V
V
V
V
V
PWM
Volume
V
V
V
V
V
V
control
Feedback function
IRQ Interrupt
NMI interrupt
Wakeup source
Body
X
X
X
X
X
8
X
8
8
8
8
8
1
1
1
1
3
1
1
3
3
3
3
3
GPC3040A/B
GPC3030A/B
GPC3026A/B
GPC3010A
10 Sec.
2.0~5.5V
128B
32KB
IROSC
16 (IOA/B)
IOB[3:0]
V
GPC3011C
10 Sec.
2.0~5.5V
256B
GPC3010C
10 Sec.
2.0~5.5V
256B
32KB
Voice Duration
Working Voltage
RAM Size
40 Sec.
30 Sec.
26 Sec.
2.0~5.5V
2.0~5.5V
2.0~5.5V
96B
96B
96B
ROM Size
128KB
96KB
80KB
32KB(OTP)
Clock Source
IO Pin
IROSC
IROSC
IROSC
IROSC/EROSC IROSC/EROSC
12 (IOA/B[3:0])
12 (IOA/B[3:0])
12 (IOA/B[3:0])
16 (IOA/B)
16 (IOA/B)
High sink IO
Hardware PWMIO
IR
IOB[3:0]
IOB[3:0]
IOB[3:0]
IOB[3:0]
IOB[3:0]
V
V
X
V
V
V
X
V
V
V
X
V
V
V
X
V
V
V
X
V
V
RTC
X
PWM
Volume
V
control
Feedback function
IRQ Interrupt
X
7
1
2
X
7
1
2
X
7
1
2
RC/XTAL
RC/XTAL
RC/XTAL
7
1
2
7
1
2
7
1
2
NMI interrupt
Wakeup source
© Generalplus Technology Inc.
Proprietary & Confidential
6
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
6.SIGNAL DESCRIPTIONS
6.1. Signal Descriptions for GPC3680A~ GPC3026A, GPC3340B~ GPC3092B, GPC3040B~ GPC3026B, GPC3340C/D,
GPC3256C, GPC3170A1~ GPC3092A1, GPC3170B1
PIN Name
Type
Description
IO Port
IOA[7：0]
IOA[7：0] is a bi-directional I/O port, can be software programmed as wakeup I/O. 1Mohm ||
100Kohm feedback pull low resistor (only 1M ohm feedback pull low resistor is available for
GPC3340B~GPC3092B , GPC3340D, GPC3170B1)
I/O
IOA7 shares its pad with IR output
IOA1 shares its pad with external clock input
IOA0 shares its pad with external interrupt input
IOB[7：0]
IOB[7：0] is a bi-directional I/O port, can be software programmed as wakeup I/O. 1Mohm ||
I/O
100Kohm feedback pull low resistor
IOB5 shares its pad with XTAL 32KHz input
IOB4 shares its pad with XTAL 32KHz output
IOB[3：0] shares its pad with 256-level PWM output, high sink current
IOB[7：4] is NOT available for GPC3040A/B~GPC3026A/B
IOC[7：0]
IOC[7：0] is a bi-directional I/O port, can be software programmed as wakeup I/O. 1Mohm ||
I/O
100Kohm feedback pull low resistor
IOC[7：0] is NOT available for GPC3170A~GPC3026A, GPC3170B~GPC3092B,
GPC3040B~GPC3026B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
Power & Ground PAD
CVDD
CVSS
VDDIO
VSSIO
PVDD
P
G
P
G
P
Power supply voltage input for internal circuit
Ground reference for internal circuit
Power supply voltage input for GPIO PAD, must be equal to CVDD
Ground reference for GPIO PAD
PWM driver power, can be greater than or equal to CVDD & VDDIO (refer to Note3 and
Note4）
PVSS
G
PWM driver ground reference
Others
RESB
TEST
I
I
System reset input, low active (with pull high)
Test pin input, high active (with pull low), and please DON’T bond the TEST pin.
PWM output
AUDP、AUDN
O
Total: 34 pins
Legend: I = Input O = Output P = Power G = Ground
Note1: To ensure IC functions properly, please bond all of VDD and VSS pins.
Note2: CVDD must be equal to VDDIO.
Note3: PVDD can be greater than or equal to CVDD & VDDIO for GPC3680A~GPC3052A, GPC3340B~GPC3092B, GPC3040B~GPC3026B, GPC3340C/D,
GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
Note4: PVDD must be equal to CVDD & VDDIO for GPC3040A~GPC3026A.
Note5: Please DO NOT bond TEST pin.
Note6: IOC[7：0] is NOT available for GPC3170A/B~GPC3026A/B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
Note7: IOB[7：4] is NOT available for GPC3040A/B~GPC3026A/B.
Note8: Only 1Mohms pull low resistor is available on IOA[7：0] for GPC3340B~GPC3092B, GPC3340D, GPC3170B1.
© Generalplus Technology Inc.
Proprietary & Confidential
7
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
6.2. Signal Descriptions for GPC3341A
PIN Name
Type
Description
IO Port
IOA[7：0]
I/O
Bi-directional I/O port, can be software programmed as a wake-up I/O. 1Mohm || 100K feedback
Pull Low resistor
IOA7 shares its pad with IR Output,
IOA3 shares its pad with SDA in serial programming cycle.
IOA2 shares its pad with SCK in serial programming cycle.
IOA1 shares its pad with External Clock Input.
IOA0 shares its pad with External Interrupt Input.
IOB[7：0]
IOC[7：0]
I/O
I/O
Bi-directional I/O port, can be software programmed as a wake-up I/O. 1Mohm || 100K feedback
Pull Low resistor.
IOB5 shares its pad with XTAL 32KHz Input.
IOB4 shares its pad with XTAL 32KHz Output.
IOB[3：0] shares its pad with 256-level PWM Output, high sink current.
Bi-directional I/O port, can be software programmed as a wake-up I/O. 1Mohm || 100K feedback
Pull Low resistor
Power & Ground PAD
VDD_REGOUT
VDD_REGIN
CVSS
O
P
G
P
P
G
P
G
Regulator output pin
Regulator input pin
Ground reference
VPP
High voltage during programming, NC at the normal run
Power supply voltage input
Ground reference
VDDIO
VSSIO
PVDD
PWM driver power
PVSS
PWM driver ground reference
Others
RESB
EPM
I
I
System reset input, low active with pull-high
Program control pin, NC at the normal run
Test pin input, high active (with pull low) and please DON’T bond the TEST pin.
DON’T bond the NC pin.
TEST
I
NC
I
AUDP, AUDN
O
PWM audio output
Total: 38 Pins
Legend: I = Input O = Output P = Power
G = Ground
Note1: To ensure that the IC is functioned properly, please bond all VDD and VSS pins.
Note2: VDD_REGIN should be equal to VDDIO.
Note3: PVDD should be higher than or equal to VDD_REGIN & VDDIO.
Note4: please DON’T bond NC pin.
Note5: please DON’T bond TEST pin.
© Generalplus Technology Inc.
Proprietary & Confidential
8
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
6.3. Signal Descriptions for GPC3010A/3010C
PIN NAME
TYPE
DESCRIPTION
IO Port
IOA[7：0]
IOA[7：0] is a bi-directional I/O port, can be software programmed as wakeup I/O. 1Mohm ||
I/O
100Kohm feedback pull low resistor
IOA7 shares its pad with IR output.
IOA1 shares its pad with external clock input.
IOA0 shares its pad with external interrupt input.
IOA[2：1] shares its pad with feedback function.
IOB[7：0]
IOB[7：0] is a bi-directional I/O port, can be software programmed as wakeup I/O. 1Mohm ||
I/O
100Kohm feedback pull low resistor.
IOB[3：0] shares its pad with 256-level PWM output, high sink current.
Power & Ground PAD
VDD_REGOUT
VREF
O
I
Regulator output
Reference voltage of analog circuit, must be connected to VDD_REGOUT
Power supply regulator voltage input
VDD_REGIN
VSS
P
G
P
G
Ground reference
PVDD
PWM driver power, can be greater than or equal to VDD_REGIN
PWM driver ground reference
PVSS
Others
RESB
NC
I
I
I
System reset input, low active (with pull high)
Please DON’T bond NC pin (only for GPC3010A).
Frequency control pin for external oscillator, with resistor to VDD_REGIN (only for
GPC3010C).
OSC
TEST
I
Test pin input, high active (with pull low), and please DON’T bond the TEST pin.
PWM output
AUDP, AUDN
O
Total: 27 Pins
Legend: I = Input O = Output P = Power
G = Ground
Note1: To ensure that the IC functions properly, please bond all of VDD and VSS pins.
Note2: PVDD can be greater than or equal to VDD_REGIN.
Note3: Please DON’T bond TEST pin.
Note4: NC pin is only for GPC3010A, and please DON’T bond NC pin.
Note5: OSC pin is only for GPC3010C.
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GPC3XXXAx/Bx/Cx/Dx
6.4. Signal Descriptions for GPC3011C
PIN NAME
PIN NO.
TYPE
DESCRIPTION
IO Port
IOA[7：0]
IOA[7：0] is a bi-directional I/O port, can be software programmed as wakeup
27-20
I/O
I/O. 1Mohm || 100Kohm feedback pull low resistor
IOA7 shares its pad with IR output.
IOA1 shares its pad with external clock input.
IOA0 shares its pad with external interrupt input.
IOA[2：1] shares its pad with feedback function.
IOB[7：0]
IOB[7：0] is a bi-directional I/O port, can be software programmed as wakeup
19-16, 12-9
I/O
I/O. 1Mohm || 100Kohm feedback pull low resistor
IOB[3：0] shares its pad with 256-level PWM output, high sink current.
Power & Ground PAD
VDD_REGOUT
VPP
6
7
O
I
Regulator output
Power to OTP ROM, should be supplied from GPC3011C writer in program
mode and be connected to VDD_REGOUT in read mode
Power supply regulator voltage input
Ground reference
VDD_REGIN
VSS
15
13
31
29
P
G
P
PVDD
PWM driver power can be higher than or equal to VDD_REGIN.
PWM driver ground reference
PVSS
G
Others
RESB
OSC
28
14
I
I
System reset input, low active (with pull high)
Frequency control pin for external oscillator, with resistor to VDD_REGIN
Test pin input, high active (with pull low)
PWM output
TEST
8
I
AUDP, AUDN
30, 32
O
Total: 27 Pins
Legend: I = Input O = Output P = Power
G = Ground
Note1: PVDD can be greater than or equal to VDD_REGIN.
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GPC3XXXAx/Bx/Cx/Dx
6.5. LQFP48 pin map for GPC3010A/C
6.6. LQFP48 pin map for GPC3011C
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GPC3XXXAx/Bx/Cx/Dx
6.7. LQFP48 pin map for GPC3040A/B, GPC3030A/B, GPC3025A/B
6.8. LQFP48 pin map for GPC3080A, GPC3072A, GPC3063A, GPC3052A
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GPC3XXXAx/Bx/Cx/Dx
6.9. LQFP48 pin map for GPC3170Ax/Bx, GPC3120Ax/Bx, GPC3106Ax/Bx, GPC3092Ax/Bx
6.10.LQFP48 pin map for GPC3340A/B, GPC3256A/B
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GPC3XXXAx/Bx/Cx/Dx
6.11.LQFP48 pin map for GPC3680A, GPC3540A, GPC3480A, GPC3420A
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GPC3XXXAx/Bx/Cx/Dx
6.12.LQFP128 pin map for GPC3341A
1
96
NC
NC
2
95
NC
NC
3
94
NC
NC
4
93
NC
NC
5
92
NC
NC
6
91
NC
NC
7
90
NC
NC
8
89
NC
NC
9
88
NC
NC
10
87
NC
NC
11
86
VDD_REGOUT
NC
12
85
VDD_REGIN
NC
13
84
CVSS
NC
14
83
VPP
NC
15
82
TEST
AUDN
16
81
IOC0
PVDD
LQFP128
17
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
IOC1
AUDP
PVSS
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
18
IOC2
19
IOC3
20
NC
21
NC
22
NC
23
NC
24
NC
25
NC
26
NC
27
NC
28
NC
29
NC
30
NC
31
NC
32
NC
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GPC3XXXAx/Bx/Cx/Dx
6.13.SSOP20 pin map for GPC3040A/B, GPC3030A/B, GPC3025A/B
1
20
CVDD
IOB0
2
19
CVSS
IOB2
3
18
IOA1
IOB3
4
17
IOA3
VSSIO
5
16
IOA4
VDDIO
SSOP20
6
15
IOA5
IOA0
7
14
IOA6
IOA2
8
13
IOA7
AUDN
9
12
RESB
PVDD
10
11
PVSS
AUDP
6.14.SSOP20 pin map for GPC3080A, GPC3072A, GPC3063A, GPC3052A
1
20
IOA2
IOA3
2
19
CVDD
IOA4
3
18
CVSS
IOA5
4
17
IOB0
IOA6
5
16
IOB1
IOA7
SSOP20
6
15
IOB2
AUDN
7
14
IOB3
PVDD
8
13
VSSIO
AUDP
9
12
VDDIO
PVSS
10
11
IOB7
RESB
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GPC3XXXAx/Bx/Cx/Dx
6.15.SSOP20 pin map for GPC3170Ax/Bx, GPC3120Ax/Bx, GPC3106Ax/Bx, GPC3092Ax/Bx
1
20
19
18
17
16
15
14
13
12
11
IOA2
CVDD
CVSS
IOB0
IOA3
IOA4
IOA5
IOA6
IOA7
AUDN
PVDD
AUDP
PVSS
RESB
2
3
4
5
IOB1
SSOP20
6
IOB2
7
IOB3
8
VSSIO
VDDIO
IOB7
9
10
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GPC3XXXAx/Bx/Cx/Dx
7. FUNCTIONAL DESCRIPTIONS
7.1. CPU
Body
GPC3026A/B
GPC3010A
Body
ROM size
80KB
ROM Address
0x00840~0x013FFF
0x00840~0x007FFF
ROM Address
The microprocessor in GPC3XXXAx/Bx/Cx/Dx is
a
high
performance 8-bit processor equipped Accumulator, Program
Counter, X and Y Register, Stack pointer and Processor Status
Register (the same as the 6502 instruction structure). The
maximum CPU speed of 8.0MHz is capable of generating a clearer
speech and music as well as achieving the best performance.
32KB
ROM size
32KB
GPC3011C
GPC3010C
0x00840~0x007FFF
0x00840~0x007FFF
32KB
7.4. Map of Memory and I/Os
7.2. RAM Area
7.4.1. Mapping for GPC3680A~GPC3052A,
GPC3340B~GPC3092B, GPC3340C/D,
GPC3256C, GPC3170A1~GPC3092A1,
GPC3170B1
The total RAM size is 128-byte (including stack) for
GPC3680A~GPC3052A, GPC3340B~GPC3092B, GPC3010A,
GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1 and
GPC3170B1, starting from address $0080 through $00FF ($0080 -
$00FF mapping to $0180 - $01FF).
Address Mapping for GPC3680A~GPC3052A,
CPU View
GPC3340B~GPC3092B, GPC3340C/D,
GPC3256C, GPC3170A1~GPC3096A1,
$0000-$007F
$0080-$00FF
$0100-$017F
I/O &Reg.
RAM
GPC3170B1
ROM View
Reserved
Same as
$80-$FF
The total RAM size is 96-byte (including stack) for
GPC3040A/B~GPC3026A/B, starting from address $00A0 through
$00FF ($00A0 - $00FF mapping to $01A0 - $01FF).
$00000 - $03FFF
$04000 - $07FFF
$08000 - $0BFFF
$0C000 - $0FFFF
$10000 - $13FFF
Bank0
Bank1
Bank2
Bank3
$0180-$01FF
$0200-$07FF
$0800-$0819
$081A-$081F
$0820-$0835
$0836-$083F
Test ROM
Reserved
Normal Vector
Normal IRQ
Reserved
Bank4
The total RAM size is 256-byte (including stack) for GPC3011C/
GPC3010C, starting from address $0080 through $017F ($0100 -
$017F mapping to $0180 - $01FF).
Program ROM
Bank0
$0840-$3FFF
$4000-$7FFF
. . .
Program ROM
Bank1
Program ROM
Bank2
7.3. ROM Area
$8000-$BFFF
$C000-$FFFF
The GPC3XXXAx/Bx/Cx/Dx provides a 32K~2M bytes ROM or
OTP ROM (by body option) that can be defined as the program
area, audio data area, or both. To access ROM, users should
program the BANK SELECT Register; choose bank, and access
address to fetch data.
Program ROM
Bank register to
assign bank
ROM address= $C000-$FFFF
Use Bank register to mapping address
7.4.2. Mapping for GPC3040A/B~GPC3026A/B
CPU View
Body
ROM size
ROM Address
$0000-$007F
$0080-$009F
$00A0-$00FF
$0100-$019F
I/O &Reg.
Reserved
Address Mapping for
GPC3040A/B~GPC3026A/B
ROM View
GPC3680A
GPC3540A
2MB
0x00840~0x1FFFFF
0x00840~0x197FFF
0x00840~0x167FFF
0x00840~0x13FFFF
0x00840~0x0FFFFF
0x00840~0x0FFFFF
0x00840~0x0BFFFF
0x00840~0x07FFFF
0x00840~0x05FFFF
0x00840~0x04FFFF
0x00840~0x047FFF
0x00840~0x03FFFF
0x00840~0x037FFF
0x00840~0x02FFFF
0x00840~0x027FFF
0x00840~0x01FFFF
0x00840~0x017FFF
RAM
Reserved
Same as
$A0-$FF
Test ROM
1632KB
1440KB
1280KB
1024KB
1024KB
768KB
512KB
384KB
320KB
288KB
256KB
224KB
192KB
160KB
128KB
96KB
$00000 - $03FFF
$04000 - $07FFF
$08000 - $0BFFF
$0C000 - $0FFFF
$10000 - $13FFF
Bank0
Bank1
Bank2
Bank3
$01A0-$01FF
$0200-$07FF
$0800-$0819
$081A-$081F
$0820-$0835
$0836-$083F
GPC3480A
Reserved
GPC3420A
Normal Vector
Normal IRQ
Reserved
GPC3340A/B/C/D
GPC3341A
Bank4
Program ROM
Bank0
$0840-$3FFF
$4000-$7FFF
GPC3256A/B/C
GPC3170A/B/A1/B1
GPC3120A/B/A1
GPC3106A/B/A1
GPC3092A/B/A1
GPC3080A
. . .
Program ROM
Bank1
Program ROM
Bank2
$8000-$BFFF
$C000-$FFFF
Program ROM
ROM address= $C000-$FFFF
Use Bank register to mapping address
Bank register to
assign bank
GPC3072A
GPC3063A
GPC3052A
GPC3040A/B
GPC3030A/B
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GPC3XXXAx/Bx/Cx/Dx
7.4.3. Mapping for GPC3010A
IO port configuration:
Input/Output port : IOA[7:0], IOB[7:0], IOC[7:0](by body)
CPU View
$0000-$007F
$0080-$00FF
$0100-$017F
I/O &Reg.
RAM
Buffer(R)
Address Mapping for GPC3010A
Reserved
Same as
$80-$FF
Port_Data(W)
$0180-$01FF
$0200-$07FF
$0800-$0819
$081A-$081F
$0820-$0835
$0836-$083F
Test ROM
Register
Reserved
Port_Buffer(W)
Pin pad
Normal Vector
Normal IRQ
Reserved
Control
logic
Port_DIR(R/W)
Program ROM
Bank0
$0840-$3FFF
$4000-$7FFF
1M ohm
pull low
100K ohm
pull low
Program ROM
Bank1
Data(R)
7.4.4. Mapping for GPC3011C/GPC3010C
7.6. Hardware PWMIO
CPU View
Hardware PWMIO supports four LED outputs from IOB[3:0] with
brightness control of 256 levels. The clock source of PWMIO can
be selected by user’s request.
$0000-$007F
$0080-$00FF
$0100-$017F
I/O &Reg.
RAM1
Address Mapping for GPC3011C / GPC3010C
RAM2
Same as
$100-$17F
Test ROM
$0180-$01FF
$0200-$07FF
$0800-$0819
$081A-$081F
$0820-$0835
$0836-$083F
Reserved
7.7. Power Saving Mode
Normal Vector
Normal IRQ
Reserved
The GPC3XXXAx/Bx/Cx/Dx includes
a power saving mode
(Standby mode) for those applications that require low standby
current. To enter standby mode, the Wake-Up Register must be
enabled and then stop the CPU clock by writing the STOP CLOCK
Register to enter standby mode. In such mode, RAM and I/Os will
remain in their previous states until being awaken. All 12~24 IOs
(by body), RTC(8Hz/2Hz) (by body), external interrupt(IOA0) are
Program ROM
Bank0
$0840-$3FFF
$4000-$7FFF
Program ROM
Bank1
7.5. I/O Port
wake-up sources in the GPC3XXXAx/Bx/Cx/Dx.
After
There are 12 ~ 24 IOs (IOA[7:0], IOB[7:0] and IOC[7:0]) in the
GPC3XXXAx/Bx/Cx/Dx (by body), which are bit-controlled IOs.
These IOs can be programmed as input (pure input or pull-low) or
output buffer. In pull-low input, the IOs generate less impedance
to achieve a better noise immunity. While pressing the key (IOs to
VDD), a higher impedance retains to save DC power. All 12~24
IOs (by body), are wake-up sources in the GPC3XXXAx/Bx/Cx/Dx.
IOA7 can be programmed as an IR transmitter. IOA1 can be
GPC3XXXAx/Bx/Cx/Dx wakes up, the internal CPU will continue to
execute program.
7.8. RTC (Real Time Clock)
GPC3XXXAx/Bx/Cx/Dx (by body) provides two RTC (real time
clock) sources: 2Hz, 8Hz. The RTC sources can be used for time
counting or system awaking. Each RTC occurs, the system
wakes up and users can use this signal for time counting. In
addition, GPC3XXXAx/Bx/Cx/Dx supports 32768Hz OSC in auto
mode, the first one second runs at strong mode (consumes the
highest power) and then switch to weak mode automatically to
programmed as an external clock source.
IOA0 can be
programmed as an external interrupt source, and IOB5, IOB4 can
be programmed as a 32KHz crystal clock generator by adding
external components (by body). IOB[3:0] can sink high current to
drive high brightness LED. In GPC3341A, IOA3 shares pad with
SDA, and IOA2 shares with SCK in serial programming cycle. In
GPC3010A/GPC3011C/GPC3010C, IOA[2:1] can also be
programmed as feedback function with IOA2 connecting to the
input of inverter and IOA1 connecting to the output of inverter.
With feedback function, RC or XTAL oscillation can be
implemented. For mode flexible application, IO wakeup and ECK
as TMA clock source are also available when feedback function
enable. Refer the programming guide for more detail information
about feedback function.
save power.
*Note: RTC is NOT available for GPC3040A/B~GPC3026A/B, GPC3010A,
GPC3011C, GPC3010C.
7.9. Watchdog
The purpose of watchdog is to monitor whether the system
operates normally. Within a certain period of time, watchdog must
be cleared. It prevents the system from incorrect code execution
by generating a system reset when software fails to clear watchdog
flag within 1 second. Watchdog function can be removed by
option in GPC3XXXAx/Bx/Cx/Dx series.
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Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
7.10.Low Voltage Reset
7.13.Speech and Melody
The GPC3XXXAx/Bx/Cx/Dx has a Low Voltage Reset (LVR)
In speech synthesis, GPC3XXXAx/Bx/Cx/Dx uses NMI for an
accurate sampling frequency. Users can store the speech data in
ROM and play it back with realistic sound quality. Several
algorithms are recommended for high fidelity and compression of
sound: PCM, ADPCM, SACMA3400, and A3400Pro.
function.
In general, the CPU becomes unstable and
malfunctions under low voltage condition. With the unique design
of Low Voltage Reset in GPC3XXXAx/Bx/Cx/Dx, it is able to reset
all functions to the initial operational (stable) state if the power
voltage drops below certain operation voltage.
7.14.OTP Programming Circuit for GPC3341A
7.11.Interrupt
The GPC3XXXAx/Bx/Cx/Dx has two interrupt (INT) modes: IRQ
(interrupt Request) and NMI (Non-Mask Interrupt Request). The
VDD
VSS
VDD_REGIN
CVSS
VDD
VSS
0.1u
2.2u
VDD
SCK
SDA
VDDIO
SCK(IOA2)
SDA(IOA3)
interrupt controller provides 7 or 8 IRQs (by body) and 1 NMI.
NMI cannot be interrupted by any other IRQs.
A
VDD_REGOUT
VDD
VSSIO
VPP
GND
VPP
EPM
Generalplus
Writer
Interrupt Source
TIMER A
Priority
NMI
GPC3341A
TIMER A
TIMER B
TIMER C
TB1
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
GPC3341A SERIAL PROGRAMMING METHOD
Note1: Don’t connect any component with IOA2 and IOA3 when
programming.
Note2: Connect EPM to VDD during OTP programming cycle, and keep it
floating in normal run.
TB2
Note3: Connect VPP to Writer during OTP programming cycle, and keep it
floating in normal run.
RTC(by body)
KEY
EXT
*Note: RTC is NOT available for GPC3040A/B~GPC3026A/B, GPC3010A,
GPC3011C, GPC3010C.
7.12.Timer/Counter
The GPC3XXXAx/Bx/Cx/Dx has three 12-bit timer/counters, TMA,
TMB, and TMC respectively. In the timer mode, TMA, TMB, and
TMC are re-loadable up-counters. When timer overflows from
$0FFF to $0000, the carry (overflow) signal will make user’s preset
value be loaded into timer automatically and count up again. At
the same time, the carry signal will generate an INT signal if the
corresponding bit is enabled in the INT ENABLE Register.
Suppose TMB is specified as a counter, users can reset it by
loading #0 into the counter. After the counter has been activated,
the value in the counter can also be read at the same time. The
read instruction will not affect the value of the counter nor reset it.
© Generalplus Technology Inc.
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Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
8. ELECTRICAL SPECIFICATIONS
8.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
(VSS-0.3V) to (V+ + 0.3V)
0℃ to +70℃
Input Voltage Range
Operating Temperature
Storage Temperature
TSTO
-65℃ to +150℃
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause permanent damage to the device. For normal operational conditions, see
AC/DC Electrical Characteristics.
8.2. DC Characteristics (TA = 25℃)
Limit
Characteristics
Symbol
Unit
Test Condition
Min.
2.0
1.9
-
Typ.
2.1
2.0
-
Max.
2.2
2.1
5.5
2.2
2.1
V
V
V
V
V
For GPC3680A/540A/480A/420A
For Others
Min. Operating Voltage
Max. Operating Voltage
Low Voltage Reset Level
VDD*min
VDD max
V*LVR
2.0
1.9
2.1
2.0
For GPC3680A/540A/480A/420A
For Others
FCPU = 6MHz @ 3.0V, PWM output off
For GPC3680A/540A/480A/420A
FCPU = 6MHz @ 3.0V, PWM output off
For GPC3341A
-
-
-
-
-
-
2.5
4
-
-
-
-
-
-
mA
mA
mA
mA
mA
mA
FCPU = 6MHz @ 3.0V, PWM output off
For Others
2
Operating Current
IOP
FCPU = 6MHz @ 4.5V, PWM output off
For GPC3680A/540A/480A/420A/341A
FCPU = 6MHz @ 4.5V, PWM output off
For GPC3010A/011C/010C
FCPU = 6MHz @ 4.5V, PWM output off
For Others
5
2.5
4
VDD = 3.0V, XTAL32K ON
-
4
-
uA
NOT available for GPC3040A/B~GPC3026A/B,
GPC3010A/011C/010C
Halt Current
I**HALT
VDD = 4.5V, XTAL32K ON
-
-
8
-
-
uA
uA
NOT available for GPC3040A/B~GPC3026A/B ,
GPC3010A/011C/010C
VDD = 3.0V, For GPC3341A/010A/011C/
010C
5
VDD = 3.0V, For GPC3340C/D, GPC3256C,
GPC3170A1~GPC3092A1, GPC3170B1.
VDD = 3.0V, For Others
-
-
-
-
-
-
3
2
5
uA
uA
uA
Standby Current
ISTBY
VDD = 4.5V, For GPC3341A/010A/011C/
010C
VDD = 4.5V, For GPC3340C/D, GPC3256C,
GPC3170A1~GPC3092A1, GPC3170B1.
VDD = 4.5V, For Others
-
-
-
-
3
2
uA
uA
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Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
Limit
Typ.
Characteristics
Symbol
VIH
Unit
Test Condition
Min.
Max.
0.7VDD
-
-
-
V
VDD = 3.0V
VDD = 4.5V
VDD = 3.0V
VDD = 4.5V
GPIO Input High Level
(IOA, IOB, IOC)
0.7VDD
-
V
-
-
-
-
-
-
-
-
-
0.3VDD
V
GPIO Input Low Level
(IOA, IOB, IOC)
VIL
-
0.3VDD
V
5
-
-
-
-
-
-
mA
mA
mA
mA
mA
mA
VDD = 3.0V, VOH = 0.7*VDD
VDD = 4.5V, VOH = 0.7*VDD
VDD = 3.0V, VOL = 0.3*VDD
VDD = 4.5V, VOL = 0.3*VDD
VDD = 3.0V, VOL = 0.3*VDD
VDD =4.5V, VOL = 0.3*VDD
VDD = 3.0V, IO = 0V
Output High Current
(IOA, IOB, IOC)
IOH
10
10
20
20
40
Output Low Current
(IOA, IOB[7:4], IOC)
IOL
Output Low Current
(IOB[3:0])
IOL
200,
-
-
-
-
Kohm 2000Kohms for IOA in GPC3340B~ GPC3092B
and 200Kohms for others
2000
Input Pull Low Resistor
(IOA, IOB, IOC)
RL
VDD = 4.5V, IO = 0V
100,
Kohm 1000Kohms for IOA in GPC3340B~ GPC3092B
and 100Kohms for others
1000
-
-
-
-
2000
1000
180
-
-
-
-
Kohm VDD = 3.0V, IO = 3.0V
Input Pull Low Resistor
(IOA, IOB, IOC)
RL
Kohm VDD = 4.5V, IO = 4.5V
mA
mA
VDD = 3.0V, 8 Ohms load
PWM Driver Current
IPWM
280
VDD = 4.5V, 8 Ohms load
Fosc(4.5v) Fosc(2.4v)
Fosc(4.5v)
-
-
-
-
-
-
2
2
2
2
2
2
-
-
-
-
-
-
%
%
%
%
%
%
FCPU = 6MHz
For GPC3011C/010C EROSC
Fosc(3.0v) Fosc(2.4v)
Fosc(3.0v)
FCPU = 6MHz
For GPC3680A/540A/480A/420A IROSC
Fosc(3.0v) Fosc(2.4v)
Fosc(3.0v)
FCPU = 8MHz
For GPC3680A/540A/480A/420A IROSC
Fosc(4.5v) Fosc(3.0v)
Fosc(4.5v)
Frequency deviation by
voltage drop
⊿F/F
FCPU = 6MHz
For GPC3680A/540A/480A/420A IROSC
Fosc(4.5v) Fosc(3.0v)
Fosc(4.5v)
FCPU = 8MHz
For GPC3680A/540A/480A/420A IROSC
Fosc(4.5v) Fosc(2.4v)
Fosc(4.5v)
FCPU = 6MHz,For GPC3341A~GPC3010A/
011C/010C IROSC
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GPC3XXXAx/Bx/Cx/Dx
Limit
Typ.
Characteristics
Symbol
Unit
Test Condition
Min.
Max.
Fosc(4.5v) Fosc(2.4v)
Fosc(4.5v)
-
2
2
2
-
%
%
%
FCPU = 8MHz,For GPC3341A~GPC3010A/
011C/010C IROSC
Fosc(4.5v) Fosc(2.4v)
Fosc(4.5v)
-
-
-
-
FCPU = 6MHz, For GPC3340C/D, GPC3256C,
GPC3170A1~GPC3092A1, GPC3170B1 IROSC
Fosc(4.5v) Fosc(2.4v)
Fosc(4.5v)
FCPU = 8MHz, For GPC3340C/D, GPC3256C,
GPC3170A1~GPC3092A1, GPC3170B1 IROSC
Fosc(3.0v) 6MHz
6MHz
-7
-7
-
-
7
7
%
%
FCPU = 6MHz @ 3.0V, Rosc=51Kohm
For GPC3011C/010C EROSC
Fosc(4.5v) 6MHz
6MHz
FCPU = 6MHz @ 4.5V, Rosc=51Kohm
For GPC3011C/010C EROSC
Fmax(3.0v) Fmin(3.0v)
Fmax(3.0v)
-3
-3
-3
-3
-
-
-
-
3
3
3
3
%
%
%
%
⊿F/F
Frequency lot deviation
FCPU = 6MHz
@ 3.0V,For IROSC
Fmax(3.0v) Fmin(3.0v)
Fmax(3.0v)
FCPU = 8MHz
@ 3.0V,For IROSC
Fmax(4.5v) Fmin(4.5v)
Fmax(4.5v)
FCPU = 6MHz
@ 4.5V,For IROSC
Fmax(4.5v) Fmin(4.5v)
Fmax(4.5v)
FCPU = 8MHz
@ 4.5V,For IROSC
*Note: VDDmin may have +/-0.1V variation due to process issue.
**Note: Halt mode is NOT available for GPC3040A/B~GPC3026A/B, GPC3010A/011C/010C.
8.3. (3volt) External Oscillator R Relative FOSC Table for GPC3011C/010C (the table is only for reference)
R(Kohm)
39
51
75
FOSC (MHz)
8
6
4
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8.4. The Relationship between the FOSC and VDD
8.4.1. Frequency vs. VDD (external ROSC) For
GPC3011C/010C
8.4.4. Frequency vs. VDD (build-in 6MHz ROSC) For
GPC3010A/011C/010C
9
39Kohm
8
7
51Kohm
6
5
4
2
3
4
5
6
VDD(V)
8.4.5. Frequency vs. VDD (build-in 8MHz ROSC) For
GPC3680A/540A/480A/420A
8.4.2. Frequency vs. VDD (build-in 6MHz ROSC) For
GPC3680A/540A/480A/420A
9
8
7
6
5
4
3
2
7
6
5
4
3
2
1
2.4
1
2
3
4
5
6
7
VDD(V)
1
2.2
1
2
3
4
5
6
7
VDD(V)
8.4.6. Frequency vs. VDD (build-in 8MHz ROSC) For
GPC3341A~GPC3026A, GPC3340C/D,
GPC3256C, GPC3170A1~GPC3092A1,
GPC3170B1
8.4.3. Frequency vs. VDD (build-in 6MHz ROSC) For
GPC3341A~GPC3026A
9
8
7
6
5
4
3
2
7
6
5
4
3
2
1
1
2.4
2.2
1
2
3
4
5
6
1
2
3
4
5
6
VDD(V)
VDD(V)
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8.4.7. Frequency vs. VDD (build-in 8MHz ROSC) For
GPC3010A/011C/010C
8.5.3. Operating Current vs. VDD (build-in ROSC) For
GPC3340A ~GPC3026A, GPC3340B ~GPC3092B,
GPC3040B ~GPC3026B,
GPC3340C/D~GPC3256C,
GPC3170A1~GPC3092A1, GPC3170B1
6
5
Fosc=8MHz
4
3
Fosc=6MHz
2
1
0
2
3
4
5
6
8.5. The Relationship between the VDD and IOP (PWM
output off)
VDD(V)
8.5.1. Operating Current vs. VDD (build-in ROSC) For
GPC3680A/540A/480A/420A
8.5.4. Operating Current vs. VDD (external ROSC) For
GPC3011C/010C
7
6
2.40
Fosc=8MHz
2.20
5
2.00
Fosc=8MHz
4
3
1.80
Fosc=6MHz
1.60
1.40
1.20
1.00
0.80
Fosc=6MHz
2
1
0
2
3
4
5
6
2
3
4
5
6
VDD(V)
VDD(V)
8.5.2. Operating Current vs. VDD (build-in ROSC) For
GPC3341A
8.5.5. Operating Current vs. VDD (build-in ROSC) For
GPC3010A/011C/010C
4
2.40
Fosc=8MHz
Fosc=8MHz
2.20
3
2.00
Fosc=6MHz
1.80
Fosc=6MHz
2
1
1.60
1.40
1.20
1.00
0.80
2
3
4
5
6
VDD(V)
2
3
4
5
6
VDD(V)
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GPC3XXXAx/Bx/Cx/Dx
9. APPLICATION CIRCUITS
9.1. Application Circuits with Low Loadings for GPC3680A~GPC3026A, GPC3340B~GPC3092B,
GPC3040B~GPC3026B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
PCB Layout Guidelines:
1. CVDD, VDDIO and PVDD must be connected to power input port directly rather than the branch of each other.
2. CVDD must be equal to VDDIO.
3. PVDD can be greater than or equal to CVDD and VDDIO for GPC3680A~GPC3052A, GPC3340B~GPC3092B,
GPC3040B~GPC3026B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
4. PVDD MUST be equal to CVDD and VDDIO for GPC3040/030A/026A.
5. CVSS, VSSIO and PVSS must be connected to ground input directly rather than the branch of each other.
6. Capacitor (used for XTAL32K) is proposed to be 12~20 pF for GPC3680A~GPC3052A, GPC3340B~GPC3092B, NOT available for
GPC3040A/B~GPC3026A/B.
7. When using two batteries, C1 is suggested to be 0.1uF~4.7uF, and should be increased in a high-volume application.
8. Only 1Mohms pull low resistor is available on IOA[7：0] for GPC3340B~GPC3092B, GPC3340D, GPC3170B1.
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9.2. Application Circuits with Heavy Loadings (such as motor, high brightness LED) for GPC3680A~GPC3026A,
GPC3340B~GPC3092B, GPC3040B~GPC3026B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
PCB Layout Guidelines:
1. CVDD, VDDIO and PVDD must be connected to power input port directly, rather than the branch of each other.
2. CVDD must be equal to VDDIO.
3. PVDD can be greater than or equal to CVDD and VDDIO for GPC3680A~GPC3052A, GPC3340B~GPC3092B,
GPC3040B~GPC3026B, GPC3340C/D, GPC3256C, GPC3170A1~GPC3092A1, GPC3170B1.
4. PVDD MUST be equal to CVDD and VDDIO for GPC3040/030A/026A.
5. CVSS, VSSIO and PVSS must be connected to ground input directly rather than the branch of each other.
6. Capacitor (used for XTAL32K) is proposed to be 12~20 pF for GPC3680A~GPC3052A, GPC3340B~GPC3092B, but not available
for GPC3040A/B~GPC3026A/B.
7. The typical value of C2 is 47uF, and should be modified in different loading.
8. Only 1M-Ohm pull low resistor is available on IOA[7：0] for GPC3340B~GPC3092B, GPC3340D, GPC3170B1.
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9.3. Application Circuit with Low Loading for GPC3341A
VDD_REGIN
PVDD
PVSS
PVDD
PVSS
VDD_REGIN
VSS
CVSS
VDDIO
VDDIO
AUDP
AUDN
VSSIO
VSSIO
IOA[7:0]
IOA[7:0]
IOB[7:0]
IOC[7:0]
IOB[7:0]
IOC[7:0]
C5
2.2u
VDD_REGOUT
PVDD
VDDIO
VDD_REGIN
Battery
VSS
C1*
GPC3341A
0.1u - 4.7uF
VSS
VSSIO
PVSS
RESB
VSS
PCB Layout Guidelines:
1. VDD_REGIN, VDDIO and PVDD should be connected to power input port directly rather than the branch of each other.
2. VDD_REGIN should be equal to VDDIO.
3. PVDD should be greater than or equal to VDD_REGIN and VDDIO.
4. CVSS, VSSIO and PVSS should be connected to ground input directly rather than the branch of each other.
5. When using two batteries, C1 should be 0.1uF~4.7uF and should be increased for a high-volume application.
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GPC3XXXAx/Bx/Cx/Dx
9.4. Application Circuits with Heavy Loading (such as motor, high brightness LED) for GPC3341A
PVDD
PVSS
PVDD
VDD_REGIN
VSS
VDD_REGIN
CVSS
C4
0.1u
PVSS
VDDIO
VDDIO
C3
0.1u
VSSIO
AUDP
AUDN
VSSIO
IOA[7:0]
IOB[7:0]
IOC[7:0]
IOA[7:0]
IOB[7:0]
IOC[7:0]
PVDD
VDDIO
VDD_REGIN
C1
0.1u
VSS
C5
2.2u
VDD_REGOUT
R2
10
Battery
C2*
VSS
47u
GPC3341A
VSSIO
PVSS
RESB
VSS
PCB Layout Guidelines:
1. VDD_REGIN, VDDIO and PVDD should be connected to power input port directly rather than the branch of each other.
2. VDD_REGIN should be equal to VDDIO.
3. PVDD should be greater than or equal to VDD_REGIN and VDDIO.
4. CVSS, VSSIO and PVSS should be connected to ground input directly rather than the branch of each other.
5. The typical value of C2 is 47uF, and should be adjusted if different loading is applied.
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GPC3XXXAx/Bx/Cx/Dx
9.5. Application Circuits with Low Loading for GPC3010A/011C/010C
PVDD
PVSS
PVDD
PVSS
VDD_REGOUT
C2
2.2uF
VPP(by body)
VREF(by body)
VDD_REGIN
VSS
VSS
VDD_REGIN
VSS
AUDP
AUDN
IOA[7:0]
IOA[7:0]
IOB[7:0]
VDD_REGIN
IOB[7:0]
R1
51K
OSC(by body & option)
PVDD
VDD_REGIN
GPC3010A/011C/
010C
Battery
C1*
0.1u - 4.7uF
VSS
PVSS
RESB
VSS
PCB Layout Guidelines:
1. VDD_REGIN and PVDD must be connected to power input port directly rather than the branch of each other.
2. PVDD can be higher than or equal to VDD_REGIN.
3. VSS and PVSS must be connected to ground input directly rather than the branch of each other.
4. C1 is suggested to 0.1uF~4.7uF, and should be increased for a high-volume application.
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GPC3XXXAx/Bx/Cx/Dx
9.6. Application Circuits with Heavy Loading (Such as Motor, High Brightness LED) for GPC3010A/011C/010C
PVDD
PVSS
PVDD
VDD_REGOUT
C4
C1
VPP(by body)
0.1u
PVSS
2.2u
VREF(by body)
VSS
VDD_REGIN
C3
VDD_REGIN
AUDP
AUDN
0.1u
VSS
IOA[7:0]
VSS
IOA[7:0]
IOB[7:0]
VDD_REGIN
IOB[7:0]
R1
51K
OSC(by body & option)
PVDD
VDD_REGIN
GPC3010A/011C/
010C
Battery
C5
0.1u
47u
C2*
VSS
PVSS
VSS
RESB
PCB Layout Guidelines:
1. VDD_REGIN and PVDD must be connected to power input port directly rather than the branch of each other.
2. PVDD can be higher than or equal to VDD_REGIN.
3. VSS and PVSS must be connected to ground input directly rather than the branch of each other.
4. The typical value of C2 is 47uF, and should be modified in different loading.
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9.7. Application Circuits with Low Loading When Using Feedback RC Mode Enable for GPC3010A/011C/010C
PVDD
PVSS
PVDD
PVSS
VDD_REGOUT
C2
2.2uF
VPP(by body)
VREF(by body)
VDD_REGIN
VSS
VSS
VDD_REGIN
VSS
AUDP
AUDN
IOA[7:3],[0]
IOA[7:3],[0]
IOB[7:0]
IOB[7:0]
VDD_REGIN
IOA2
R1
51K
CFB
RFB
VSS
IOA1
OSC(by body & option)
PVDD
VDD_REGIN
GPC3010A/011C/
010C
Battery
C1*
0.1u - 4.7uF
VSS
PVSS
RESB
VSS
PCB Layout Guidelines:
1. VDD_REGIN and PVDD must be connected to power input port directly rather than the branch of each other.
2. PVDD can be greater than or equal to VDD_REGIN.
3. VSS and PVSS must be connected to ground input directly rather than the branch of each other.
4. C1 is suggested 0.1uF~4.7uF, and should be increased for a high-volume application.
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GPC3XXXAx/Bx/Cx/Dx
9.8. Application Circuits with Low Loading When Using Feedback XTAL Mode Enable for GPC3010A/011C/010C
PVDD
PVSS
PVDD
PVSS
VDD_REGOUT
C2
2.2uF
VPP(by body)
VREF(by body)
VDD_REGIN
VSS
VSS
VDD_REGIN
VSS
AUDP
AUDN
IOA[7:3],[0]
IOA[7:3],[0]
IOB[7:0]
IOB[7:0]
CX1
IOA2
VDD_REGIN
R1
51K
IOA1
VSS
CX2
OSC(by body & option)
PVDD
VDD_REGIN
GPC3010A/011C/
010C
Battery
C1*
0.1u - 4.7uF
VSS
PVSS
RESB
VSS
PCB Layout Guidelines:
1. VDD_REGIN and PVDD must be connected to power input port directly rather than the branch of each other.
2. PVDD can be greater than or equal to VDD_REGIN.
3. VSS and PVSS must be connected to ground input directly rather than the branch of each other.
4. C1 is suggested 0.1uF~4.7uF, and should be increased for a high-volume application.
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GPC3XXXAx/Bx/Cx/Dx
10. PCB LAYOUT GUIDE FOR HEAVY LOADING APPLICATION
To avoid the unexpected noise, which may end up with incorrect CPU operations, the following cares must be exercised while designing a
PCB layout:
1. Bond all VDD and VSS pins out.
2. The 0.1uF capacitor placed between VDD and VSS must be as close as possible to IC itself.
3. Power routes are as independent as possible.
10.1.The PCB layout examples are given as follows
(For GPC3680A~ GPC3256A, GPC3340B~ GPC33256B)
10.2.The PCB layout method (Power line connects in
series) as below is not proposed (For GPC3680A~
GPC3256A, GPC3340B~ GPC33256B)
10.3.The PCB layout example is given as follows (For
GPC3341A)
10.4.The PCB layout method (Power line connects in
series) as below is not proposed (For GPC3341A)
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GPC3XXXAx/Bx/Cx/Dx
10.5.The PCB layout examples are given as follows
(For GPC3170A~ GPC3052A, GPC3170B~ GPC3092B,
GPC3340C/D, GPC3256C, GPC3170A1~GPC3096A1,
GPC3170B1)
10.6.The PCB layout method (Power line connects in
series) as below is not proposed (For GPC3170A~
GPC3052A, GPC3170B~ GPC3092B)
GPC3340C/D
GPC3256C
GPC3340C/D
GPC3256C
GPC3170A/B/A1/B1
GPC3120A/B/A1
GPC3106A/B/A1
GPC3096A/B/A1
GPC3080A
GPC3170A/B/A1/B1
GPC3120A/B/A1
GPC3106A/B/A1
GPC3096A/B/A1
GPC3080A
GPC3072A
GPC3072A
GPC3063A
GPC3063A
10.7.The PCB layout examples are given as follows
(For GPC3040A/B~GPC3026A/B)
10.8.The PCB layout method (Power line connects in
series) as below is not proposed (For
GPC3040A/B~GPC3026A/B)
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GPC3XXXAx/Bx/Cx/Dx
10.9.The PCB layout examples are given as follows
(For GPC3010A/011C/010C)
10.10. The PCB layout method (Power line connects in
series) as below is not proposed (For
GPC3010A/011C/010C)
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GPC3XXXAx/Bx/Cx/Dx
11. PACKAGE/PAD LOCATIONS
11.1.Ordering Information
Product Number
Package Type
GPC3XXXAx/Bx/Cx/Dx - NnnV - C
GPC3XXXAx/Bx/Cx/Dx - NnnV - QL23X
GPC3XXXAx/Bx/Cx/Dx - NnnV - QL09X
GPC3XXXAx/Bx/Cx/Dx - NnnV - G08X
Chip form
Halogen free LQFP48 package
Halogen free LQFP128 package
Halogen free SSOP20 package
Note1: Code number is assigned for customer.
Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
11.2.LQFP48 Information
SYMBOLS
Min.
-
Max.
1.6
A
A1
A2
c1
D
0.05
1.35
0.09
0.15
1.45
0.16
9.00 BSC
D1
E
7.00 BSC
9.00 BSC
7.00 BSC
0.5 BSC
E1
e
B
0.17
0.45
0.27
0.75
L
L1
1 REF
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11.3.LQFP128 Information
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GPC3XXXAx/Bx/Cx/Dx
11.4.SSOP20 Information
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GPC3XXXAx/Bx/Cx/Dx
12. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms
of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication
or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO WARRANTY
OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter the
specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other information
in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications.
Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are
specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that application circuits
illustrated in this document are for reference purposes only.
© Generalplus Technology Inc.
Proprietary & Confidential
40
Aug. 28, 2017
Version: 2.3
GPC3XXXAx/Bx/Cx/Dx
13. REVISION HISTORY
Date
Revision #
Description
Page
Aug. 28, 2017
2.3
1. Add SSOP20 information.
16-17
11
2. Add LQFP48 information for GPC3010A/C
1. Add LQFP48 and LQFP128 information.
Jun 02, 2017
Apr. 18, 2017
2.2
2.1
11-15,37,38
1. Add GPC3340C/D, GPC3256C, GPC3170A1~GPC3096A1, GPC3170B1 bodies and
related information.
1-32
2.Modify document title name：GPC3XXXX GPC3XXXAx/Bx/Cx/Dx.
Sep. 23, 2014
2.0
1.Add notice pull low R with 1M Ohm only for GPC3340B, GPC3256B, GPC3170B,
GPC3120B, GPC3106B, and GPC3092B.
5-7,26-27,
2.Add notice PVDD can be greater than or equal to CVDD for GPC3040B, GPC3030B,
7-10,26-33,
GPC3026B.
3.Modify GPC3011C/10C IROSC frequency vs VDD dependence
Original
25
32
Dec. 13, 2011
1.0
© Generalplus Technology Inc.
Proprietary & Confidential
41
Aug. 28, 2017
Version: 2.3
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