GPC71P170A-PS031 [GENERALPLUS]
4-bit Speech with SPU;
| 型号： | GPC71P170A-PS031 |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | 4-bit Speech with SPU |
| 文件： | 总19页 (文件大小：901K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GPC71PXXXA
4-bit Speech with SPU
Dec. 20, 2016
Version 1.2
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPC71PXXXA
Table of Contents
PAGE
1
2
3
4
5
6
GPC71PXXXA SERIES............................................................................................................................................................................... 3
GENERAL DESCRIPTION.......................................................................................................................................................................... 3
BLOCK DIAGRAM ...................................................................................................................................................................................... 3
FEATURES.................................................................................................................................................................................................. 3
APPLICATION FIELD.................................................................................................................................................................................. 3
SIGNAL DESCRIPTIONS............................................................................................................................................................................ 4
6.1 PACKAGE PAD ASSIGNMENT ................................................................................................................................................................... 5
7
FUNCTION DESCRIPTIONS....................................................................................................................................................................... 7
7.1 CPU ..................................................................................................................................................................................................... 7
7.2 MEMORY ............................................................................................................................................................................................... 7
7.3 CLOCK SOURCE..................................................................................................................................................................................... 7
7.4 LOW VOLTAGE RESET............................................................................................................................................................................ 7
7.5 INTERRUPT............................................................................................................................................................................................ 7
7.6 SPU ..................................................................................................................................................................................................... 7
7.7 PWM.................................................................................................................................................................................................... 7
7.8 SLEEP MODE, WAKEUP AND WATCHDOG................................................................................................................................................ 7
7.9 . I/O ...................................................................................................................................................................................................... 7
ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8
8.1 DC CHARACTERISTICS (VDD = 3/4.5V (IOA ~ IOD), TA = 25℃) ............................................................................................................. 8
8
9
8.2 INTERNAL FREQUENCY (FOSC) AND VDD.............................................................................................................................................. 10
8.3 INTERNAL FREQUENCY (FOSC) AND TEMPERATURE ............................................................................................................................... 10
8.4 OPERATING CURRENT (IOP) AND VDD...................................................................................................................................................11
APPLICATION CIRCUITS......................................................................................................................................................................... 12
9.1 LIGHT LOADING AND CIRCUIT WITHOUT NOISE....................................................................................................................................... 12
9.2 HEAVY LOADING OR CIRCUIT WITH NOISE ............................................................................................................................................. 13
10 PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 14
10.1 ORDERING INFORMATION ..................................................................................................................................................................... 14
10.2 PACKAGE INFORMATION ....................................................................................................................................................................... 15
11 DISCLAIMER............................................................................................................................................................................................. 18
12 REVISION HISTORY ................................................................................................................................................................................. 19
© Generalplus Technology Inc.
Proprietary & Confidential
2
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
4-BIT SPEECH WITH SPU
1 GPC71PXXXA SERIES
Product No.
GPC71P340A GPC71P170A GPC71P080A GPC71P064A GPC71P048A GPC71P032A GPC71P016A
OTP density
(KWord)
680
16
340
16
160
16
128
16
96
16
64
8
32
8
Dedicated
IOs
2 GENERAL DESCRIPTION
4 FEATURES
GPC71PXXXA, a 4-bit sound controller, is architected with a
one-channel SPU for MIDI playback, a 4-bit RISC CPU, a 14-bit
PWM, 8/16 IOs, 256-nibble RAM, and OTP with density of 680K/
340K/ 160K/ 128K/ 96K/ 64K/ 32K x 12-bit of memory space.
The operating voltage ranges from 2.0V through 5.5V and
operating speed is 1M/2MHz, configurable through inner oscillator.
Other features include Low Voltage Reset, IR carry output,
watchdog, five interrupt sources with two time-bases, etc.
4-bit RISC CPU
CPU Clock: 1M/2M Hz, System clock: 8MHz
Operating Voltage: 2.0V - 5.5V
Regulator built-in with input voltage: 2.0~5.5V, output voltage:
2.0~3.0V
IO IOA~IOD Operating Voltage: 2.0V - 5.5V
256 nibbles SRAM
14-bit PWM driver for driving speaker directly
680K/340K/160K/128K/96K/64K/32Kx12-bit OTP
Standby mode for power savings
3 BLOCK DIAGRAM
Five interrupt sources with two time-bases
1-channel Sound Processing Unit (SPU) supports MIDI
playback
4-Bit RISC
256x4
CPU
16 or 8 general I/Os (bit programmable)
Key wakeup function (IOA~IOD for 16 IO, IOA~IOB for 8 IO)
Low voltage reset
SRAM
AUDP
XXXKx12
PWM
OTP
Watchdog
AUDN
5 APPLICATION FIELD
SPU
IOA[3:0]
Talking instrument controller
General Music Synthesizer
Toy controller
IOB[3:0]
Regulator
IOport
Intelligent toy controller
And more
IOC[3:0]*
Inner resistance
Osc
IOD[3:0]*
* Not availableinGPC71P032A/GPC71P016A
© Generalplus Technology Inc.
Proprietary & Confidential
3
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
6 SIGNAL DESCRIPTIONS
PIN Name
Type
Description
IOA[3：0] is a bi-directional I/O port which wakeup capability (via body option). 1Mohm || 200K
feedback Pull Low resistor
IOA3 shares pad with OTP writer’s signal SDA
IOA[3：0]
I/O
I/O
I/O
IOA2 shares pad with External Interrupt Input (via body option), or with OTP writer’s signal SCK.
IOA1 shares pad with IR Output, (Body Option)
IOA0 shares pad with Key Reset Input, (Body Option)
IOB[3：0] is a bi-directional I/O port with wakeup capability (via body option). 1Mohm || 200K
feedback Pull Low resistor
IOB[3：0]
IOB2 shares pad with External Interrupt Input (via body option).
IOB1 shares pad with IR Output (via body option).
IOB0 shares pad with Key Reset Input (via body option)
GPC71P032A/GPC71P016A do not have these ports.
IOC[3：0] is a bi-directional I/O port with wakeup capability (body option). 1Mohm || 200K
feedback Pull Low resistor
IOC[3：0]
IOC2 shares pad with External Interrupt Input (body option)
IOC1 shares pad with IR Output (body option)
IOC0 shares pad with Key Reset Input (body option)
GPC71P032A/GPC71P016A do not have these ports.
IOD[3：0] is a bi-directional I/O port with wakeup capability (body option). 1Mohm || 200K
feedback Pull Low resistor
IOD[3：0]
I/O
IOD2 shares pad with External Interrupt Input (via body option)
IOD1 shares pad with IR Output (via body option)
IOD0 shares pad with Key Reset Input (via body option)
GPC71P032A and GPC71P016A do not have this port.
Non-used pin for user; it’s default in pull low and can be optioned as floating state.
TEST
I
AUDP
AUDN
O
PWM audio output
VDDIO
P
G
P
P
P
Power supply voltage input
VSS1,VSS2
VPP
Ground reference(only 1 VSS pad in GPC71P032A/GPC71P016A)
OTP program power input
REGOUT
VDDTRM
3.3V regulator output for core power
Power for e-fuse, user should keep this pin in floating state.
Ground for e-fuse for testing only, user should keep this pin in floating state.
(Pad available only in GPC71P032A/GPC71P016A)
PWM driver power
VSS_FUSE
G
PVDD
PVSS
P
G
PWM driver ground reference
© Generalplus Technology Inc.
Proprietary & Confidential
4
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
6.1 Package Pad Assignment
6.1.1 Package for GPC71P340A / GPC71P170A /GPC71P080A/GPC71P064A/GPC71P048A
24 PIN SOP（300 mil）
16 PIN SOP（150 mil）
VDDIO
VPP
IOC1
IOC2
IOC3
IOA0
IOA1
IOA2
IOA3
IOB0
PVSS
AUDN
AUDP
PVDD
VSS2
IOD3
IOD2
IOD1
IOD0
VPP
IOA0
IOA1
IOA2
IOA3
REGOUT
VDDIO
PVSS
AUDN
AUDP
PVDD
IOB1
IOB2
VSS2
IOC3
IOC2
REGOUT
IOB3
IOC0
IOC1
IOC0
8 PIN SOP（150 mil）
VPP
VSS1
IOA1
IOA2
IOA3
AUDN
AUDP
PVDD
© Generalplus Technology Inc.
Proprietary & Confidential
5
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
6.1.2 Package for GPC71P032A/GPC71P016A
16 PIN SOP（150 mil）
8 PIN SOP（150 mil）
IOA1
IOA0
IOB2
IOA3
IOA2
IOA1
VSS
AUDN
PVSS
AUDN
AUDP
PVDD
AUDP
PVDD
VPP
VPP
VSS
VDDIO
REGOUT
IOB3
IOB1
IOB0
IOA2
IOA3
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Dec. 20, 2016
Version: 1.2
GPC71PXXXA
7 FUNCTION DESCRIPTIONS
7.1 CPU
7.6 SPU
One channel SPU supports MIDI playback with A3400Pro-like
decode or PCM format, and each channel has an 8-bit envelope
control.
GPC71PXXXA features a 4-bit RISC CPU, executing the 12-bit
instruction set with total of 72 instructions available, 7 stacks
managed by a 3-bit stack pointer, three DPRs(Data Pointer to
read ROM) sharing stack 4 ~ 6, and two VPRs(Voice Data Pointer)
for SPU.
7.7 PWM
The PWM module consists of a 14-bit PWM driver to drive
speaker directly.
7.2 Memory
7.2.1 SRAM
7.8 Sleep Mode, Wakeup and Watchdog
7.8.1 Sleep mode and wakeup
There are 256 nibbles of SRAM, grouped into 4 banks. Each
bank has 64 nibbles and supports index mode to read/write its
content addressed by TXR.
Sleep mode or known as power down mode is an operating state
that requires an extremely low power consumption to maintain the
system in active. The sleep mode is particularly useful for the
application areas where the system is required to constantly
maintain its basic functionality and where the power capacity is
7.2.2 OTP
The One Time Programming (OTP) memory is featured in
GPC71PXXXA with density of 680K/ 340K/ 160K/ 128K/ 96K/
64K/ 32K x 12-bit of memory.
limited.
GPC71PXXXA enters sleep mode when SLEEP
instruction is executed and can be woken up by interrupt or key
state change. CPU will continue to execute the rest of program
code from where it entered sleep mode.
7.3 Clock Source
Clock source is an inner resistance oscillator with CPU clock
options of 1MHz or 2MHz
7.8.2 Watchdog Reset
A watchdog reset is a reset signal that is generated to reset the
entire system when watchdog counter is overflow. In case when
the program code has been running into an unknown state and
without the watchdog signal being cleared for a certain period of
time, watchdog function automatically generates a reset signal
pulling the system back from unknown state.
7.4 Low Voltage Reset
With the LVR function, a reset signal is generated to reset system
when the operating voltage drops below LVR level.
7.5 Interrupt
An interrupt is a special event request to microcontroller. When
it occurs, the corresponding interrupt will activate and direct the
7.9 . I/O
program code to execute the respective functions.
The
The GPC71PXXXA features 16-bit or 8-bit programmable
Input/output pins and many of them feature wakeup capability.
These IOs normally support input function with floating or pull-low
and output options. In addition to the ordinary I/O function, some
IO ports have special functions. The following table summarizes
the special functions for these IOs.
GPC71PXXXA has interrupt sources. Please refer to
5
programming guide for more details.
7.5.1 Timebase
There are two Timebases, TB1 and TB2, generated by the system
clock. The interval of TB1 is allowed up to 1ms and TB2 allows
up to 2ms.
Special Function in Port
Port
Special Function
Function Description
Note
High active; IOC0/IOD0 isn’t supported
in GPC71P032A/GPC71P016A
IOC1/IOD1 isn’t supported in
GPC71P032A/GPC71P016A
IOC2/IOD2 isn’t supported in
GPC71P032A/GPC71P016A
IOA0/IOB0~IOD0
Key Reset
Key reset pin, configurable through code option
IR carry output, configurable through code option
External interrupt input, configurable through code option
IOA1/IOB1~IOD1
IOA2/IOB2~IOD2
IROUT
EXT INT
© Generalplus Technology Inc.
Proprietary & Confidential
7
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
8 ELECTRICAL SPECIFICATIONS
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
(VSS-0.3V) to (V+ + 0.3V)
0℃ to +70℃
Input Voltage Range
Operating Temperature
Storage Temperature
-65℃ to +150℃
TSTO
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause permanent damage to the device. For normal operational conditions, see
DC Electrical Characteristics.
8.1
DC Characteristics (VDD = 3/4.5V (IOA ~ IOD), TA = 25℃)
Limit
Characteristics
Operating Voltage
Symbol
Unit
Test Condition
Min.
Typ.
Max.
VDD
2.0
-
5.5
V
FCPU = 2MHz @ 3.0V, PWM output off
For GPC71P080A/064A/048A/
032A/016A
-
-
1.5
2
-
-
mA
mA
FCPU = 2MHz @ 4.5V, PWM output off
For GPC71P080A/064A/048A/
032A/016A
Operating Current
IOP
FCPU = 2MHz @ 3.0V, PWM output off
For GPC71P340A/170A
-
-
5
6
-
-
mA
mA
FCPU = 2MHz @ 4.5V, PWM output off
For GPC71P340A/170A
-
-
-
-
5
5
uA
uA
VDD = 3.0V
VDD = 4.5V
Standby Current
ISTBY
GPIO Input High Level
(IOA, IOB, IOC, IOD)
GPIO Input Low Level
(IOA, IOB, IOC, IOD)
Output High Current
(IOA, IOB, IOC, IOD)
VIH
0.5VDD
-
-
-
-
V
V
VDD = 4.5V
VDD = 4.5V
VIL
0.5VDD
-
-
-
-
-
-
10
20
10
20
20
40
-
-
-
-
-
-
mA
mA
mA
mA
mA
mA
VDD = 3.0V, VOH = 0.7*VDD
VDD = 4.5V, VOH = 0.7*VDD
VDD = 3.0V, VOL = 0.3*VDD
VDD = 4.5V, VOL = 0.3*VDD
VDD = 3.0V, VOL = 0.3*VDD
VDD =4.5V, VOL = 0.3*VDD
VDD = 3.0V, IO = 0V
IOH
Output Low Current
(Normal)
IOL1
Output Low Current
IOL2
(High sink , by Body Option)
-
-
200
100
-
-
Kohm
Kohm
For GPC71P080A/064A/048A/
032A/016A
VDD = 4.5V, IO = 0V
For GPC71P080A/064A/048A/
032A/016A
Input Pull Low Resistor
(IOA, IOB, IOC, IOD)I
RL1
VDD = 3.0V, IO = 0V
-
-
150
150
8
-
-
Kohm
Kohm
For GPC71P340A/170A
VDD = 4.5V, IO = 0V
For GPC71P340A/170A
© Generalplus Technology Inc.
Proprietary & Confidential
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
Limit
Typ.
Characteristics
Symbol
Unit
Test Condition
Min.
Max.
VDD = 3.0V, IO = 3.0V
For GPC71P080A/064A/048A/
032A/016A
-
1000
500
-
Kohm
VDD = 4.5V, IO = 4.5V
For GPC71P080A/064A/048A/
032A/016A
-
-
Kohm
Input Pull Low Resistor
(IOA, IOB, IOC, IOD)
RL2
VDD = 3.0V, IO = 3.0V
For GPC71P340A/170A
VDD = 4.5V, IO = 4.5V
For GPC71P340A/170A
VDD = 3.0V, 8 Ohms load
-
-
850
850
-
-
Kohm
Kohm
-
-
180
280
-
-
mA
mA
PWM Driver Current
IPWM
VDD = 4.5V, 8 Ohms load
Fosc(5.5v) Fosc(2.4v)
Frequency deviation by
voltage drop
Fosc(3.0v)
△F/F
-1
-1
-1
-
-
-
+1
1
%
%
%
FCPU = 2MHz
Fmax(3.0v) Fmin(3.0v)
Fmax(3.0v)
FCPU = 2MHz
@
3.0V (tentative)
△F/F
Frequency lot deviation
Fmax(4.5v) Fmin(4.5v)
Fmax(4.5v)
1
FCPU = 2MHz
@
4.5V (tentative)
© Generalplus Technology Inc.
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Dec. 20, 2016
Version: 1.2
GPC71PXXXA
8.2 Internal Frequency (Fosc) and VDD
Fosc vs. VDD
8.05
8.04
8.03
8.02
8.01
8.00
7.99
7.98
7.97
7.96
7.95
080A/064A/
048A/032A/
016A
340A/170A
2.0
3.0
4.0
5.0
6.0
VDD(V)
8.3 Internal Frequency (Fosc) and Temperature
Fosc vs. Temp
9.00
8.50
8.00
7.50
7.00
080A/064A/
048A/032A/
016A
340A/170A
-10
0
10
25
40
50
60
70
80
Temperate(˚C)
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Version: 1.2
GPC71PXXXA
8.4 Operating Current (Iop) and VDD
Iop vs. VDD
6.00
5.00
4.00
3.00
2.00
1.00
0.00
080A/064A/048A/032A/
016A-CPU 2M
080A/064A/048A/032A/
016A-CPU 1M
340A/170A-CUP 2M
340A/170A-CPU 1M
2.0
3.0
4.0
5.0
6.0
VDD(V)
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Dec. 20, 2016
Version: 1.2
GPC71PXXXA
9 APPLICATION CIRCUITS
9.1 Light Loading and Circuit without Noise
VPP
VDD
VPP
PVDD
PVDD
PVSS
VDDIO
PVSS
VSS
VSS2
VSS1
AUDP
AUDN
IOA[3:0]
IOB[3:0]
IOC[3:0]
IOD[3:0]
IOA[3:0]
IOB[3:0]
IOC[3:0]
IOD[3:0]
TEST
NC
PVDD
VDD
Battery
VDDTRM
NC
NC
C1
0.1u
REGOUT
VSS
PVSS
PCB Layout Guidelines:
1. PVDD may be greater than or equal to VDD.
2. VSS, PVSS must be connected to ground input directly, not the branch of each other.
3. When using two batteries, 0.1uF ~ 4.7uF is suggested for C1, and it should be increased in a high volume application.
4. IOC/IOD isn’t supported in GPC71P032A/GPC71P016A.
5. There is no “TEST” pin in GPC71P032A/GPC71P016A.
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Dec. 20, 2016
Version: 1.2
GPC71PXXXA
9.2 Heavy Loading or Circuit with Noise
VPP
VDD
VPP
PVDD
PVDD
C3
0.1u
PVSS
VDDIO
PVSS
VSS
VSS2
VSS1
AUDP
AUDN
IOA[3:0]
IOB[3:0]
IOC[3:0]
IOD[3:0]
IOA[3:0]
IOB[3:0]
IOC[3:0]
IOD[3:0]
TEST
NC
NC
PVDD
R1
VDD
Battery
VDDTRM
REGOUT
10
C2
C1
47u 0.1u
VSS
C3
0.1u~2.2u
PVSS
VSS
PCB Layout Guidelines:
1. PVDD may be greater than or equal to VDD.
2. VSS, PVSS must be connected to ground input directly, not the branch of each other.
3. A typical value of C1 is 47uf, and it should vary in different loadings.
4. If there is application with motor, REGOUT should be connected with C3.
5. IOC/IOD isn’t supported in GPC71P032A/GPC71P016A.
6. There is no “TEST” pin in GPC71P032A/GPC71P016A.
© Generalplus Technology Inc.
Proprietary & Confidential
13
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
10 PACKAGE/PAD LOCATIONS
10.1 Ordering Information
Product Number
Package Type
GPC71PXXXA-NnnV-C
GPC71P340A-PS011
GPC71P170A-PS011
GPC71P080A-HS011
GPC71P064A-HS011
GPC71P048A-HS012
GPC71P032A-HS011
GPC71P016A-HS011
GPC71P340A-PS031
GPC71P170A-PS031
GPC71P080A-HS031
GPC71P064A-HS031
GPC71P048A-HS032
GPC71P032A-HS031
GPC71P016A-HS031
Chip form
Green Package –SOP8
Green Package –SOP8
Green Package –SOP8
Green Package –SOP8
Green Package –SOP8
Green Package –SOP8
Green Package –SOP8
Green Package –SOP16
Green Package –SOP16
Green Package –SOP16
Green Package –SOP16
Green Package –SOP16
Green Package –SOP16
Green Package –SOP16
Note1: Code number is assigned for customer.
Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
© Generalplus Technology Inc.
Proprietary & Confidential
14
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
10.2 Package Information
24 PIN SOP(300 mil)
© Generalplus Technology Inc.
Proprietary & Confidential
15
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
16 PIN SOP(150 mil)
© Generalplus Technology Inc.
Proprietary & Confidential
16
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
8 PIN SOP(150 mil)
© Generalplus Technology Inc.
Proprietary & Confidential
17
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
11 DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
© Generalplus Technology Inc.
Proprietary & Confidential
18
Dec. 20, 2016
Version: 1.2
GPC71PXXXA
12 REVISION HISTORY
Date
Revision #
Description
Page
Dec. 20, 2016
1.2
Add GPC71P340A/GPC71P170A and related information.
3,4,5,6,7,
8-10,11,
14
Apr. 18, 2016
Dec. 02, 2015
1.1
1.0
1. Remove Note of section 1.
3
4
2. Add VSS_FUSE pad description.
Original
17
© Generalplus Technology Inc.
Proprietary & Confidential
19
Dec. 20, 2016
Version: 1.2
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SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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