GPL30A1-NnnV-C [GENERALPLUS]
144KB LCD Controller/Driver;型号: | GPL30A1-NnnV-C |
厂家: | Generalplus Technology Inc. |
描述: | 144KB LCD Controller/Driver CD |
文件: | 总13页 (文件大小:362K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
GPL30A1
144KB LCD Controller/Driver
FEB. 25, 2010
Version 1.1
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPL30A1
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 4
4.1. PAD ASSIGNMENT ................................................................................................................................................................................. 5
5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 6
5.1. ROM AREA ........................................................................................................................................................................................... 6
5.2. STOP CLOCK MODE ............................................................................................................................................................................... 6
5.3. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 6
5.4. TIME-SETTING REGISTER RELATED ........................................................................................................................................................ 6
5.5. PWM OUTPUT....................................................................................................................................................................................... 6
5.6. SPEECH AND MELODY............................................................................................................................................................................ 6
5.7. LCD CONTROLLER ................................................................................................................................................................................ 6
5.8. TIMER/COUNTER ................................................................................................................................................................................... 7
6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8
6.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 8
6.2. DC CHARACTERISTICS........................................................................................................................................................................... 8
6.3. THE RELATIONSHIPS BETWEEN THE ROSC AND THE FOSC........................................................................................................................... 8
6.3.1. VDD = 3.0V, TA = 25℃.............................................................................................................................................................. 8
6.3.2. VDD = 4.5V, TA = 25℃.............................................................................................................................................................. 8
7. APPLICATION CIRCUITS........................................................................................................................................................................... 9
7.1. APPLICATION CIRCUIT ............................................................................................................................................................................ 9
7.2. AUDIO DRIVER/AMPLIFIER FOR PWM MODE ......................................................................................................................................... 10
8. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 11
8.1. ORDERING INFORMATION ......................................................................................................................................................................11
9. DISCLAIMER............................................................................................................................................................................................. 12
10.REVISION HISTORY ................................................................................................................................................................................. 13
© Generalplus Technology Inc.
Proprietary & Confidential
2
FEB. 25, 2010
Version: 1.1
GPL30A1
144KB LCD CONTROLLER/DRIVER
1. GENERAL DESCRIPTION
3. FEATURES
The GPL30A1 is a CMOS 8-bit single chip microprocessor which
contains RAM, ROM, I/Os, interrupt controller, 8-bit PWM audio
output and automatic display controller/driver for LCD. For power
saving, a software controllable standby switch is also built-in.
This chip is implemented with advanced design and process
technology. It is very suitable for LCD type handheld products.
The ROM space of this chip can be used to store program or
audio data. (The speech data is about 38 seconds at 7 KHz
sampling rate by using 4bit-ADPCM).
Built-in 8-bit CPU
160 bytes SRAM
144K bytes ROM
Max. CPU frequency: 2.0MHz @ 3.0V
Wide operating voltage: 2.4V - 3.6V
3.6V - 5.5V
Built-in 32.768KHz oscillator circuit for real clock function
Built-in RC oscillator (only one resistor is needed)
Internal time base generator
Key wake-up mode
Provide 7 INT sources
2. BLOCK DIAGRAM
Operating current: 400μA/600KHz @ 3.0V
Very low standby current
In standby mode: ISTBY < 1μA
LCD matrix: 44 segments x 5 commons
LCD 1/2, 1/3 bias; 1/2, 1/3, 1/4,1/5 duty
Two 16-bit timers
12 general I/O pins, 8 input pins
Provide standby function (stop osc)
Built-in 8-bit PWM output (directly drive a speaker)
Note: IOAB7 - 0 can be mask option for segment 43 - 36. The mask
option can be used as one I/O for one segment.
Note: Patent Circuit Included.
Taiwan Patent No. 68824.
© Generalplus Technology Inc.
Proprietary & Confidential
3
FEB. 25, 2010
Version: 1.1
GPL30A1
4. SIGNAL DESCRIPTIONS
Mnemonic
PIN No.
Type
Description
SEG33 - 0
SEG35 - 34
COM4 - 0
IOAB7 - 0
IOEF7 - 0
1 - 34
74 - 75
35 - 39
66 - 73
48 - 41
O
LCD driver segment output
LCD driver common output
O
I/O
I
I/O port or LCD driver segment 43 - 36
INPUT port (also for key wakeup input).
IOCD3 - 0
ROSC
65 - 62
53
I/O
I/O port
I
I
ROSC input, connect to VDD through resistor
System reset input
RESET
AUDP
57
59
O
O
I
PWM Audio output
AUDN
61
PWM Audio output
X32I
56
32.768KHz crystal input (provide LCD frequency)
32.768KHz crystal output
Test input
X32O
55
O
I
TEST
40
VDD
54, 60
58
I
Positive supply voltage input
Ground input
VSS
I
VDD1, VDD2
CUP1, CUP2
49, 52
50, 51
I
Inputs for setting LCD bias
Inputs for setting LCD bias
I
© Generalplus Technology Inc.
Proprietary & Confidential
4
FEB. 25, 2010
Version: 1.1
GPL30A1
4.1. PAD Assignment
GPL30A1
This IC substrate should be connected to VSS
Note1: The 0.1μF capacitor between VDD and VSS should be placed to IC as close as possible.
© Generalplus Technology Inc.
Proprietary & Confidential
5
FEB. 25, 2010
Version: 1.1
GPL30A1
5. FUNCTIONAL DESCRIPTIONS
5.1. ROM Area
5.4. Time-Setting Register Related
GPL30A1 is a large ROM based micro-controller with 220 dots
LCD driver. The large ROM can be defined as a program ROM,
LCD font and audio data continuously without any limitation. To
access the ROM area, user should program the BANK SELECT
register ($07) first, then access the bank #1 or bank #2 by
addressing the higher bank address ($8000 - $FFFF) to fetch
data.
The basic time base of CPU wake-up and interrupt can be
changed by writing to TIME-SETTING register. For example, the
programmer can change 2Hz wake-up and interrupt into 1Hz
wake-up and interrupt by writing 80H into $0A. Therefore, this
system will wake-up to service every second. Also, T16Hz (one of
counter‘s clock source and wake-up & interrupt) can be one of
4Hz, 8Hz, 16Hz or 32Hz by setting bit0 and bit1 of
TIME-SETTING register ($0A). At power on state, T16Hz selects
4Hz, and T2Hz chooses 2Hz.
5.2. Stop Clock Mode
GPL30A1 supports power saving mode for those applications
requiring very low standby current. User can simply enable the
wake-up sources to stop the CPU clock by writing the STOP
CLOCK register ($09). Thus, CPU will enter standby mode and
the RAM and I/O retain in their previous state until awake. There
are four sources of wake-up in this chip: PORT IOEF wake-up,
TIMER 0 wake-up, 4Hz/8Hz/16Hz/32Hz wake-up and 2Hz/1Hz
wake-up. After the chip is awakened, the internal CPU will go to
the RESET state. The RAM and I/O are not affected by this
wake-up reset.
5.5. PWM Output
Internally, GPL30A1 has two sets of PWMs (one for each channel).
GPL30A1 uses Pulse Width Modulation that could directly drive
speaker or buzzer without any buffer or AMP circuit.
5.6. Speech and Melody
Since GPL30A1 carries a large ROM size and wide CPU
operating speed range, it is the most suitable device for speech
and melody application. For speech synthesis, this chip provides
INT for precise sampling frequency.
Users can record or
5.3. Map of Memory and I/Os
synthesize the sound and digitize it into ROM. The sound can be
played back in the sequence of the control functions as designed
by the internal user's program. Several algorithms are suggested
to be used for high fidelity and good compression of sound: PCM,
* MEMORY MAP
$00000
*I/O PORT:
─ PORT IOAB $0002
H/W registers , I/Os , LCD RAM
$00060
$00100
$00200
$00600
IOCD $0003
IOEF $0004
USER RAM and STACK
UNUSED
LOG PCM, DM and ADPCM.
For melody synthesis, GPL30A1
─ I/O CONFIG $0000
─ I/O CONFIG $001E
*NMI SOURCE:
features dual tone mode. Once entered into the dual tone mode,
users only need to program the TM0 and TM1 to tone frequency
for each channel, count the envelope of each channel, and the
hardware can toggle the tone wave automatically without using
INT to handle it.
GENERALPLUS TEST PROGRAM
USER's PROGRAM
DATA AREA
ROM BANK
─ INT1 (from TIMER 1)
*INT SOURCE
$08000
ROM BANK #1
ROM BANK #2
ROM BANK #3
─ INT0 (from TIMER 0)
─ INT1 (from TIMER 1)
─ 2KHz
$0FFFF
$10000
5.7. LCD Controller
$17FFF
$18000
─ LCDL (1/3, 1/4 duty 256Hz;
GPL30A1 contains a total of 220 segments LCD controller and
drivers. In the power-on state, LCD display is all on state. The
programmer can set the LCD status (bias, duty, normal scan) by
writing to LCD option ($1F), update the LCD content by writing to
LCD registers. After the power-on state, LCD option is defined
only one time and then fills the LCD registers to display the
desired pattern. The LCD driver is designed to fit most LCD's
specifications in GPL30A1. It can either be programmed as 1/2
or 1/3 bias. The duty is also programmable from 1/2, 1/3, 1/4 or
1/5 duty.
1/2 duty 128Hz)
$1FFFF
$20000
$23FFF
$24000
─ 128Hz
─ EXT INT
─ 2Hz
UNUSED
ROM BANK #4
$27FFF
© Generalplus Technology Inc.
Proprietary & Confidential
6
FEB. 25, 2010
Version: 1.1
GPL30A1
5.8. Timer/Counter
specified as a counter, user can reset the counter by loading 0 into
register $15 and $16 and loading 0 into the counter by writing to
$17. After the counter is activated, the count value can also be
read from above registers ($15 and $16) on-the-fly and the read
instruction will not affect the counter's value or reset it.
GPL30A1 features two 16-bit timer/counters, TM0 and TM1
respectively. In the timer mode, TM0 and TM1 are reloaded
up-counters. When timer overflows from $FFFF to $0000, the
carry signal will generate the INT signal if the corresponding bit is
enabled in INT ENABLE register ($0d), and the timer will auto
reload to the user setup value and up count again. If TM0 is
The clock source of the timer/counter is selected as the following:
Timer/Counter
Address
Clock Source
$0015
$0016
$0017
16-BIT TIMER
CPU CLOCK X 2, the CARRY of timer 1
TM0
TM1
Clock source 1: IOCD1, VDD, T16Hz, 128Hz
$0015
$0016
$0017
Clock source 2: IOCD0, CPU CLOCK x 2, 32768Hz
Note: T16Hz can be one of 4Hz, 8Hz, 16Hz or 32Hz by setting $0A (time-setting
register)
16-BIT COUNTER
16-BIT TIMER
$0025
$0026
$0027
$000B
CPU CLOCK X 2, 32768 Hz
MODE SELECT REGISTER
Select TM0 & TM1 configuration
© Generalplus Technology Inc.
Proprietary & Confidential
7
FEB. 25, 2010
Version: 1.1
GPL30A1
6. ELECTRICAL SPECIFICATIONS
6.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
Input Voltage Range
Operating Temperature
Storage Temperature
-0.5V to V+ + 0.5V
0℃ to +60℃
-50℃ to +150℃
TSTO
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational
conditions see AC/DC Electrical Characteristics.
6.2. DC Characteristics
Limit
Characteristics
Symbol
Unit
Test Condition
For 2-battery
Min.
Typ.
Max.
2.4
-
3.6
V
V
Operating Voltage
VDD
3.6
-
5.5
For 3-battery
Operating Current
Standby Current
OSC Frequency
IOP
ISTBY
FOSC2
IOH
-
400
-
μA
μA
MHz
mA
mA
V
FCPU = 600KHz @ 3.0V, no load
VDD = 3.0V, 32768 Hz OFF
VDD = 3.0V
-
-
1.0
-
-
4.0
-
-16
-
VDD = 3.0V
Audio Output Current
IOL
-
24
-
VDD = 3.0V
Input High level
Input Low level
Output High I (I/O)
Output Sink I (I/O)
Input Resistor
OSC Resistor
CPU Clock
VIH
2.0
-
-
VDD = 3.0V
VIL
-
-
0.8
V
VDD = 3.0V
IOH
-200
-
-
-
-
μA
μA
Ω
VDD = 3.0V, VOH = 2.1V
VDD = 3.0V, VOL = 0.9V
For input only
IOL
500
RIN
-
-
-
50K
180K
-
-
ROSC
FCPU
-
Ω
FOSC2 = 1.0MHz @ 3.0V
FCPU = FOSC2/2 @ 3.0V
2.0
MHz
6.3. The Relationships between the ROSC and the FOSC
6.3.1. VDD = 3.0V, TA = 25℃
6.3.2. VDD = 4.5V, TA = 25℃
VDD=3V
VDD=4.5V
4.00
3.00
2.00
1.00
0.00
4.00
3.00
2.00
1.00
0.00
0
200
400
600
800
0
200
400
600
800
Rosc (K ohms)
Rosc (K ohms)
© Generalplus Technology Inc.
Proprietary & Confidential
8
FEB. 25, 2010
Version: 1.1
GPL30A1
7. APPLICATION CIRCUITS
7.1. Application Circuit
SEG34
SEG35
IOAB0
SEG8
SEG7
SEG6
SEG5
IOAB1
IOAB2
IOAB3
SEG4
SEG3
SEG2
SEG1
SEG0
COM4
COM3
COM2
IOAB4
IOAB5
IOAB6
IOAB7
IOCD3
COM1
COM0
TEST
IOCD2
IOCD1
IOCD0
Note*: These capacitor values are for design guidelines only. Different capacitor values may be required for different crystal/resonator used.
© Generalplus Technology Inc.
Proprietary & Confidential
9
FEB. 25, 2010
Version: 1.1
GPL30A1
7.2. Audio Driver/Amplifier for PWM Mode
AUDN
AUDP
VDD
Speaker
SPN
VDD
CE
+
100 μ
SPP
GPY0030B
0.1
RI
μ
VSS
INN
VREF
ACIN
R1
AUDP
(5~50k)
(50k)
μ
μ
1
1
R2
C1
10k
(20k) (1000p)
RI
R1
(50k)
AUDN
(5~50k)
© Generalplus Technology Inc.
Proprietary & Confidential
10
FEB. 25, 2010
Version: 1.1
GPL30A1
8. PACKAGE/PAD LOCATIONS
8.1. Ordering Information
Product Number
Package Type
GPL30A1-NnnV-C
Chip form
Note1: Code number is assigned for customer.
Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
© Generalplus Technology Inc.
Proprietary & Confidential
11
FEB. 25, 2010
Version: 1.1
GPL30A1
9. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
© Generalplus Technology Inc.
Proprietary & Confidential
12
FEB. 25, 2010
Version: 1.1
GPL30A1
10. REVISION HISTORY
Date
Revision #
Description
Page
4
1. IOEF7-0 description modified.
FEB. 25, 2010
JUN. 20, 2006
1.1
1.0
2. Clock source2 “Crystal oscillator” removed.
Original
7
10
© Generalplus Technology Inc.
Proprietary & Confidential
13
FEB. 25, 2010
Version: 1.1
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