GPL31C-NnnV-C [GENERALPLUS]
160 Dots LCD C ontroller with 64KB ROM;
| 型号： | GPL31C-NnnV-C |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | 160 Dots LCD C ontroller with 64KB ROM CD |
| 文件： | 总14页 (文件大小：436K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
160 Dots LCD Controller with 64KB
ROM
Nov. 30, 2016
Version 2.0
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPL31C
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 4
4.1. PAD ASSIGNMENT ................................................................................................................................................................................. 5
5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 6
5.1. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 6
5.2. ROM AREA ........................................................................................................................................................................................... 6
5.3. OPERATING STATES ............................................................................................................................................................................... 6
5.4. TIME-BASE-SETTING REGISTER ............................................................................................................................................................. 6
5.5. TIMER/COUNTER ................................................................................................................................................................................... 7
5.6. SPEECH AND MELODY............................................................................................................................................................................ 7
5.7. LCD CONTROLLER/DRIVER.................................................................................................................................................................... 7
5.8. PWM OUTPUT....................................................................................................................................................................................... 7
5.9. LOW VOLTAGE RESET ............................................................................................................................................................................ 7
5.10.WATCHDOG TIMER (WDT) ..................................................................................................................................................................... 7
5.11.MASK OPTIONS...................................................................................................................................................................................... 7
5.11.1.32768 crystal oscillator ............................................................................................................................................................. 7
5.11.2 BUILT-IN R-OSCILLATOR CLOCK FREQUENCY....................................................................................................................................... 7
5.11.3 SEG[31:28] CAN BE OPTIONED TO IOAB[0:3].................................................................................................................................... 7
6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8
6.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 8
6.2. DC CHARACTERISTICS (VDD = 3.0V, TA = 25℃) .................................................................................................................................... 8
6.3. DC CHARACTERISTICS (VDD = 4.5V, TA = 25℃) .................................................................................................................................... 8
6.4. THE RELATIONSHIPS BETWEEN THE R32K AND THE F32K ............................................................................................................................ 9
6.4.1. VDD = 3.0V, TA = 25℃.............................................................................................................................................................. 9
6.4.2. VDD = 4.5V, TA = 25℃.............................................................................................................................................................. 9
6.5. THE RELATIONSHIPS BETWEEN THE VDD AND THE F32K............................................................................................................................ 9
6.6. THE RELATIONSHIPS BETWEEN THE VDD AND THE FOSC .......................................................................................................................... 9
7. APPLICATION CIRCUITS......................................................................................................................................................................... 10
7.1. 160 DOTS LCD DRIVER, 32 SEGMENTS X 5 COMMONS, 32KHZ X’TAL OSCILLATOR, WITH PWM AUDIO- (1) ............................................... 10
7.2. 145 DOTS LCD DRIVER, 29 SEGMENTS X 5 COMMONS, 32KHZ R-OSCILLATOR, SEG[31:28] AS IOAB[0:3] , WITHOUT PWM AUDIO- (2) .....11
8. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 12
8.1. ORDERING INFORMATION ..................................................................................................................................................................... 12
9. DISCLAIMER............................................................................................................................................................................................. 13
10.REVISION HISTORY ................................................................................................................................................................................. 14
© Generalplus Technology Inc.
Proprietary & Confidential
2
Nov. 30, 2016
Version: 2.0
GPL31C
160 DOTS LCD CONTROLLER WITH 64KB ROM
1. GENERAL DESCRIPTION
3. FEATURES
The GPL31C, an 8-bit CMOS single chip microprocessor, contains
RAM, ROM, I/Os, interrupt/wakeup controller, timer, 8-bit PWM
audio output and automatic display controller/ driver for LCD.
With a dual channel PWM driver, attractive sound effects can be
generated easily. Furthermore, a software controllable standby
mode is also implemented for power saving.
Built-in 8-bit CPU
― 160 bytes SRAM
― 64K bytes ROM
― Max. CPU clock: 2.0MHz @ 2.0V – 5.5V
― Programmable CPU clock frequency, 1/2, 1/4, 1/8, 1/16,
1/32 or 1/64 of R-oscillator’s clock frequency is available
― R-oscillator’s clock frequency can be set to 3.0MHz or
4.0MHz (mask option)
― Provides 7 interrupt sources
2. BLOCK DIAGRAM
32.768KHz
Built-in 8-bit 1-channel PWM outputs
Built-in 32.768KHz Crystal / R-oscillator
― Crystal or R-oscillator (mask option)
ROSC
Interrup/wakeup
Control
32.768KHz
Oscillator
&
AUDP
AUDN
― Crystal oscillator switches from strong to Weak mode
Time Base
automatically
Low Voltage Reset
― Internal time base generator
One 16-bit
Auto Reload
Timers
Built-in System R-oscillator
― No resistor is needed
64K bytes
ROM
IOCD[3:0]
(I/O)
8-bit
RISC
Processor
One 16-bit timer/counters
IOAB[3:0]
(I/O)
160 bytes RAM
Low Voltage Reset
― Provides 1.9V low voltage reset function
IOEF[7:0]
(I/O)
LCD RAM
32 Segments X 5 Commons LCD Driver
Low power consumption
― Operating current: 500uA/1.0MHz @ 3.0V
― Very low standby current : ISTBY < 1.0µA @ 3.0V
COM[4:0]
SEG[31:0]
In standby mode: stop all oscillators
Max. 16 general purpose I/O
― SEG[31:28] can be optioned to IOAB[0:3]
― 8 IO pins IOEF[7:0] support Key wake-up mode
LCD controller / driver
― 32 segments x 5 commons, max. 160 dots
― LCD bias: 1/3
― LCD duty: 1/3,1/4,1/5
© Generalplus Technology Inc.
Proprietary & Confidential
3
Nov. 30, 2016
Version: 2.0
GPL31C
4. SIGNAL DESCRIPTIONS
Mnemonic
PIN No.
Type
Description
SEG[31 : 28] / IOAB[0 : 3]
SEG[27 : 0]
33-36,
37-59, 1-5
6-10
31-24
23-20
11
O
LCD driver segment output. Can also be optioned to IOAB[0:3]
LCD driver segment output
LCD driver common output
I/O port (provide key wake-up function)
I/O port
COM[4 : 0]
O
I/O
I/O
I
IOEF[7 : 0]
IOCD[3 : 0]
RESETB
AVDD
System reset input
18
P
PWM power supply input
AUDP
19
O
O
P
PWM audio output
AUDN
16
PWM audio output
AVSS
17
PWM ground input
X32I
13
I
32.768KHz crystal input, or connect to VDD through resistor as R-oscillator
input (Mask option)
X32O
TEST
12
14
32
15
O
I
32.768KHz crystal output
Test mode input
VDD
P
P
Power supply voltage input
Ground input
VSS
Total: 59 pins
Note1: Legend: I = Input, O = Output, P = Power
Note2: SEG[31:28]/IOAB[0:3] can be optioned to IOAB[0:3] or SEG[31:28] separately
Note3: Provides 160 bits read/writable LCD RAM buffer.
Note4: 32.768KHz Crystal oscillator can be optioned to R-oscillator (connected to VDD through resistor).
© Generalplus Technology Inc.
Proprietary & Confidential
4
Nov. 30, 2016
Version: 2.0
GPL31C
4.1. PAD Assignment
This IC substrate should be connected to VSS or floated
Note1: The 0.1F capacitor between VDD and VSS should be placed to IC as close as possible.
© Generalplus Technology Inc.
Proprietary & Confidential
5
Nov. 30, 2016
Version: 2.0
GPL31C
5. FUNCTIONAL DESCRIPTIONS
5.1. Map of Memory and I/Os
*I/O PORT:
IOCD Port $0004
* MEMORY MAP
$0000
four wake-up sources in GPL31C: port IOEF wake-up, TIMR0
wake-up, 4Hz/8Hz/ 16Hz/32Hz wake-up and 2Hz/1Hz wake-up.
If any wake-up event occurs, execution of the next instruction
continues in the operating state. In standby mode, all modules
will be shut down, and RAM and I/Os remain in their previous
states. Therefore current consumption is minimized. By writing
to SLEEP register but keeps 32768 oscillator running, the system
is in HALT state. CPU clock is halted while it waits for an event
(key press, timer overflow) to generate a wake-up in HALT state.
The 32768 related modules (timer/counter, LCD driver…) may
remain active in the halt state. Following figure is a state diagram
for the GPL31C.
I/O & Registers
IOEF Port $0005
IOAB Port $0003
$001F
$0020
LCD RAM Buffer
reserved
* I/O CONFIG
IOCD_Config
$003B
$0000
$0060
IOEF_Config $0006
IOAB_Config $001E
SRAM
reserved
$00FF
$0200
* NMI SOURCE:
INT1 ( from TIMER 1 )
* INT SOURCE
Test Program
INT0 ( from TIMER 0 )
INT1 ( from TIMER 1 )
$05FF
$0600
T16Hz (
)
4Hz /8Hz /16Hz /32Hz
Program ROM
Bank #0
T2Hz ( 2Hz /1Hz )
128Hz
$7FFA
2KHz
NMI/Reset/IRQ Vector
$7FFF
EXTINT ( from IOCD1 pin )
Write to SLEEP register,
32768 oscillator OFF
Program ROM
Bank #1
* WAKEUP SOURCE
IOEF Port Change
TIMER 0 Overflow
OPERATING
STANDBY
$FFFA
$FFFF
NMI/Reset/IRQ Vector
Wake-up or user reset
W
2
T16Hz ( 4Hz /8Hz /16Hz /32Hz
T2 Hz ( 2Hz /1Hz)
)
r
i
t
e
t
3
W
o
S
7
a
6
ke-u
8
L
o
E
sci
ll
EP
p
o
a
r
r
e
to
u
5.2. ROM Area
g
ser r
r
is
te
O
N
r
e
,
set
GPL31C is a ROM based micro-controller with 160 dots LCD
driver. The large ROM space can be defined as a program ROM,
LCD font and audio data continuously without any limitation. To
access the higher bank ROM area, it is allowed to program the
BANK SELECT register ($07) to 1 and then fetch the data from
address $8000 to $FFFF.
HALT
State Diagram of GPL31C
After the chip is awaken from halt/standby state, CPU will continue
to execute the next instruction. The RAM and I/O status will not
be changed by wake-up.
5.3. Operating States
The GPL31C provides three operating states: standby, halt, and
operating state. Following table shows the differences between
these three states.
5.4. Time-Base-Setting Register
Writing to TIME-SETTING register can program the time source of
CPU wake-up and interrupt. For example, the programmer can
change 2Hz wake-up and interrupt into 1Hz wake-up and interrupt
by writing 80H into $0A.
Operating
ON
Halt
OFF
Standby
OFF
CPU
32768 oscillator
LCD driver
ON
ON
OFF
ON
ON/OFF
OFF
Thus, the system awakes every second to operate services. Also,
T16Hz (one of counter‘s clock source and wake-up & interrupt)
can be one of 4Hz, 8Hz, 16Hz or 32Hz, selected by bit0 and bit1
of TIME-SETTING register ($0A). At power on state, the default
value of T16Hz is 4Hz and T2Hz is 2Hz.
In operating mode, all modules (CPU, 32768Hz oscillator,
timer/counter, LCD driver…) are activated. The halt/standby
state is entered by writing the SLEEP register ($09). There are
© Generalplus Technology Inc.
Proprietary & Confidential
6
Nov. 30, 2016
Version: 2.0
GPL31C
5.5. Timer/Counter
GPL31C contains one 16-bit timer/counters TM0. In the timer
mode, TM0 is a reloadable up-counter. When the timer overflows
from $FFFF to $0000, the carry signal will generate the INT signal
if the corresponding bit is enabled in INT ENABLE register ($0D).
The timer will automatically reload the value assigned by the
program and up count continuously. If TM0 is specified as a
counter, the user can reset the counter by loading 0 into register
$10 and $11 and loading 0 into the counter by writing any data to
$12. After the counter is activated, the counter’s value can also
be read from above registers ($10 and $11) and the read
instruction will not neither affect the counter's value nor reset it.
The clock sources of the timer/counter are selected as the following:
Timer/Counter
Address
Clock Source
$0010
$0011
$0012
$0010
$0011
$0012
16-BIT Timer
R-oscillator Output
TM0
Clock source A: IOCD0, R-oscillator Output, VDD, 32768Hz.
Clock source B: IOCD1, VDD, T16Hz, 128Hz.
16-BIT Counter
Note: T16Hz can be one of 4Hz, 8Hz, 16Hz and 32Hz by setting $0A (time-setting register)
5.6. Speech and Melody
or tone. GPL31C uses Pulse Width Modulation (PWM) that is
able to drive speaker or buzzer directly without any buffer or
Since GPL31C features
a large ROM size and wide CPU
amplification circuit.
operating speed, it is suitable for speech and melody synthesis.
For speech synthesis, it offers INT for precise sampling frequency.
Users can record or synthesize the sound and digitize the data
into the ROM. The sound can be played back in the sequence
designed by the internal user's program. Some algorithms are
recommended for high fidelity and good compression of sound,
e.g. PCM and ADPCM. For melody synthesis, GPL31C provides
tone mode. Once in the tone mode, users only need to program
the tone frequency of each channel by writing to timer/counter
TM0, and set the channel envelope. The hardware will toggle the
tone wave automatically.
5.9. Low Voltage Reset
The GPL31C provides a low voltage reset function. The system
will enter into LVRST state if and only if the power supply voltage
VDD drops lower than 1.9V.
5.10. Watchdog Timer (WDT)
An on-chip watchdog timer is available on GPL31C. The WDT is
designed for recovering from system abnormal operation. If the
system is hanged, WDT will generate a system reset to restart
system after 1 second. If WDT is enabled, the WDT should be
cleared every two seconds to avoid accidental reset. The WDT
can be cleared by writing the specified value 0FH to port $0F.
Note that the WDT only works when 32768Hz clock is available.
5.7. LCD Controller/Driver
GPL31C contains a LCD controller and driver for 160 dots display.
Users can set the LCD configuration (display mode) by writing
LCD control register ($18). Once the LCD configuration is
initialized, the designated pattern can be displayed by filling the
LCD buffer with appropriate data. The LCD driver can still
operate during halt mode by keeping 32768Hz oscillator running.
Furthermore, programmer can turn off the LCD display through
LCD control register for power savings. The LCD driver in
GPL31C is designed to fit LCD panel for 1/3 bias 1/3,1/4 and 1/5
duty.
5.11. Mask Options
5.11.1. 32768 crystal oscillator
1). X’TAL
2). R-oscillator
5.11.2 Built-in R-oscillator clock frequency
Can be optioned to 3.0MHz or 4.0MHz
5.8. PWM Output
5.11.3 SEG[31:28] Can be Optioned to IOAB[0:3]
Internally, GPL31C has one pair of PWM outputs supporting one
sound channel. The sound channel is selectable to play speech
© Generalplus Technology Inc.
Proprietary & Confidential
7
Nov. 30, 2016
Version: 2.0
GPL31C
6. ELECTRICAL SPECIFICATIONS
6.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
Input Voltage Range
Operating Temperature
Storage Temperature
-0.5V to V+ + 0.5V
0℃ to +60℃
-50℃ to +150℃
TSTO
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause permanent damage to the device. For normal operational conditions
see AC/DC Electrical Characteristics.
6.2. DC Characteristics (VDD = 3.0V, TA = 25℃)
Limit
Characteristics
Symbol
Unit
Test condition
Min.
2.0
-
Typ.
-
Max.
3.6
-
Operating Voltage
Operating Current
VDD
IOP
V
For 2-battery application
VDD = 3.0V, FCPU = 1MHz
VDD = 3.0V, LCD ON, Maximum
VLCD level
500
uA
Ihalt1
-
10
-
uA
Halt Current
Ihalt2
ISTBY
-
2
-
-
uA
A
VDD = 3.0V, LCD OFF
VDD = 3.0V
Standby Current
-
1.0
-
-30
-50
15
25
-
-
VDD = 3.0V, VOH = 2.4V
VDD = 3.0V, VOH = 2.0V
VDD = 3.0V, VOL = 0.6V
VDD = 3.0V, VOL = 1.0V
VDD = 3.0V
IOH
mA
mA
-
-
Audio Output Current
-
-
IOL
-
-
Input High Level
Input Low Level
Output High I
Output Sink I
VIH
VIL
IOH
IOL
2.0
-
0.8
-
V
V
-
-
-
-
VDD = 3.0V
-2.0
2.5
mA
mA
VDD = 3.0V, VOH = 2.4V
VDD = 3.0V, VOL = 0.8V
-
6.3. DC Characteristics (VDD = 4.5V, TA = 25℃)
Limit
Typ.
-
Characteristics
Symbol
Unit
Test condition
Min.
3.6
-
Max.
5.5
-
Operating Voltage
Operating Current
VDD
IOP
V
For 3-battery application
VDD = 4.5V, FCPU = 1MHz
VDD = 3.0V, LCD ON, Maximum
VLCD level
1100
uA
Ihalt1
-
30
-
uA
Halt Current
Ihalt2
ISTBY
IOH
-
5
-
-
uA
A
mA
mA
V
VDD = 3.0V, LCD OFF
VDD = 4.5V
Standby Current
-
1.0
-
-50
25
-
-
VDD = 4.5V, VOH = 3.6V
VDD = 4.5V, VOL = 0.9V
VDD = 4.5V
Audio Output Current
IOL
-
-
Input High Level
Input Low Level
Output High I
Output Sink I
VIH
3.0
-
0.8
-
VIL
-
-
-
-
V
VDD = 4.5V
IOH
-4.5
3.5
mA
mA
VDD = 4.5V, VOH = 3.5V
VDD = 4.5V, VOL = 0.8V
IOL
-
© Generalplus Technology Inc.
Proprietary & Confidential
8
Nov. 30, 2016
Version: 2.0
GPL31C
6.4. The Relationships between the R32K and the F32K
6.5. The Relationships between the VDD and the F32k
6.4.1. VDD = 3.0V, TA = 25℃
40
38
36
50
40
30
20
R32k=6.8MOhm
34
32
30
28
1.8
2.3
2.8
3.3
3.8
4.3
4.8
5.3
5.8
VDD(Volts)
2
4
6
8
10
12
R32k(Mohms)
6.6. The Relationships between the VDD and the FOSC
6.4.2. VDD = 4.5V, TA = 25℃
4
4MHz ROSC
50
3.8
3.6
3.4
3.2
40
30
20
3MHz ROSC
3
2.8
1.8
2.3
2.8
3.3
3.8
4.3
4.8
5.3
5.8
VDD(Volts)
2
4
6
8
10
12
R32k(Mohms)
© Generalplus Technology Inc.
Proprietary & Confidential
9
Nov. 30, 2016
Version: 2.0
GPL31C
7. APPLICATION CIRCUITS
7.1. 160 dots LCD driver, 32 segments x 5 commons, 32kHz X’tal oscillator, with PWM audio- (1)
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM4
COM3
COM2
IOCD3
COM1
COM0
TEST
IOCD2
IOCD1
IOCD0
47μF
0.1μF
0.1μF
10
39
*2
8~64
Note
*1: C1/C2 values in above application circuit are for design guidance only. Different capacitor values may be required for different crystal used. Usually, the
values of C1/C2 are in the range 12 ~ 20pF.
*2: see ‘GPL31C PWM side-effect APN‘ for details.
© Generalplus Technology Inc.
Proprietary & Confidential
10
Nov. 30, 2016
Version: 2.0
GPL31C
7.2. 145 dots LCD driver, 29 segments x 5 commons, 32kHz R-oscillator, SEG[31:28] as IOAB[0:3] , without PWM
audio- (2)
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
IOAB3
IOAB2
IOAB1
IOAB0
COM4
COM3
COM2
COM1
COM0
IOCD3
IOCD2
IOCD1
TEST
IOCD0
10μF
0.1μF
© Generalplus Technology Inc.
Proprietary & Confidential
11
Nov. 30, 2016
Version: 2.0
GPL31C
8. PACKAGE/PAD LOCATIONS
8.1. Ordering Information
Product Number
Package Type
GPL31C-NnnV-C
Chip form
Note1: Code number is assigned for customer.
Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
© Generalplus Technology Inc.
Proprietary & Confidential
12
Nov. 30, 2016
Version: 2.0
GPL31C
9. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
© Generalplus Technology Inc.
Proprietary & Confidential
13
Nov. 30, 2016
Version: 2.0
GPL31C
10. REVISION HISTORY
Date
Revision #
Description
1. Modified 3. Features : LCD duty description.
Page
3
NOV. 30, 2016
2.0
2. Modified 5.7 LCD controller/driver : LCD duty description.
3. Modified 6.2, 6.3 : Audio Output Current
1. Modified 5.1. Map of Memory and I/Os.
7
8
6
MAR. 18, 2010
MAR. 27, 2009
1.2
1.1
2. Modified 7. APPLICATION CIRCUITS.
10-11
1. Modified Data sheet name.
1
9
2. Add relationship waveform for frequency at section 6.4, 6.5 & 6.6.
3. Modified Application circuit at section 7.2, add “6.8MΩ“ resistor description.
11
3
1.Modified Features
2.Modified Signal descriptions
3. Add “PAD Assignment” to section 4.1
4.Modified DC characteristics
5.Modified Application circuit, RESET -> RESETB
Original
4
NOV. 05, 2008
JUN. 07, 2007
1.0
0.1
5
8
9
12
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Proprietary & Confidential
14
Nov. 30, 2016
Version: 2.0
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