GPLB38C-NnnV-C [GENERALPLUS]
1024 dots LCD Controller with 512KB ROM;
| 型号： | GPLB38C-NnnV-C |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | 1024 dots LCD Controller with 512KB ROM CD |
| 文件： | 总15页 (文件大小：618K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1024 dots LCD Controller with
512KB ROM
Jun. 26, 2017
Version 1.5
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPLB38C
Table of Contents
PAGE
1024 DOTS LCD CONTROLLER .................................................................................................................................................................4
WITH 512KB ROM .......................................................................................................................................................................................4
1. GENERAL DESCRIPTION......................................................................................................................................................................4
2. FEATURES .............................................................................................................................................................................................4
3. BLOCK DIAGRAM..................................................................................................................................................................................4
4. APPLICATION FIELD .............................................................................................................................................................................4
5. SIGNAL DESCRIPTIONS .......................................................................................................................................................................5
5.1. PAD ASSIGNMENT.............................................................................................................................................................................6
6. FUNCTIONAL DESCRIPTIONS..............................................................................................................................................................7
6.1. MEMORIES........................................................................................................................................................................................7
6.2. MAP OF MEMORY AND I/OS ................................................................................................................................................................7
6.3. OPERATION MODES ...........................................................................................................................................................................7
6.4. OPERATING MODE.............................................................................................................................................................................7
6.5. STANDBY MODE ................................................................................................................................................................................7
6.6. HALT MODE ......................................................................................................................................................................................7
6.7. SPEECH AND MELODY........................................................................................................................................................................8
6.8. LCD CONTROLLER/DRIVER................................................................................................................................................................8
6.9. LCD VOLTAGE GENERATION...............................................................................................................................................................8
6.10.AUDIO OUTPUT .................................................................................................................................................................................8
6.11.LOW VOLTAGE DETECTION .................................................................................................................................................................8
6.12.KEY SCAN FUNCTION.........................................................................................................................................................................8
6.13.WATCHDOG TIMER (WDT) .................................................................................................................................................................8
6.14.MASK OPTIONS .................................................................................................................................................................................8
6.14.1. 32768Hz oscillator............................................................................................................................................................8
6.14.2. Watchdog timer.................................................................................................................................................................8
6.14.3. Internal oscillator frequency..............................................................................................................................................8
7. ELECTRICAL SPECIFICATIONS............................................................................................................................................................9
7.1. ABSOLUTE MAXIMUM RATINGS ...........................................................................................................................................................9
7.2. DC CHARACTERISTICS (VDD=3.0V, FOR 2-BATTERY APPLICATION, INTERNAL REGULATOR DISABLE, TA =25℃).........................................9
7.3. DC CHARACTERISTICS (VDD=4.5V, FOR 3-BATTERY APPLICATION, INTERNAL REGULATOR ENABLE, TA =25℃)..........................................9
7.4. THE RELATIONSHIPS BETWEEN THE FOSC4M AND THE VDD ...................................................................................................................10
7.5. THE RELATIONSHIPS BETWEEN THE FOSC8M AND THE VDD ...................................................................................................................10
7.6. THE RELATIONSHIPS BETWEEN THE FOSC32K AND THE VDD...................................................................................................................10
7.7. THE RELATIONSHIPS BETWEEN THE FCPU AND THE IOP........................................................................................................................10
8. APPLICATION CIRCUITS..................................................................................................................................................................... 11
8.1. 1024 DOTS LCD DRIVER, 64 SEGMENTS × 16 COMMONS, 2-BATTERY APPLICATION, INTERNAL REGULATOR DISABLED, XTAL 32K SELECTED
- (1) 11
8.2. 1024 DOTS LCD DRIVER, 64 SEGMENTS × 16 COMMONS, 3-BATTERY APPLICATION, INTERNAL REGULATOR ENABLED, ROSC32K SELECTED
(2) 12
9. PACKAGE INFORMATION ...................................................................................................................................................................13
9.1. ORDERING INFORMATION .................................................................................................................................................................13
© Generalplus Technology Inc.
Proprietary & Confidential
2
Jun. 26, 2017
Version: 1.5
GPLB38C
10.DISCLAIMER........................................................................................................................................................................................14
11. REVISION HISTORY.............................................................................................................................................................................15
© Generalplus Technology Inc.
Proprietary & Confidential
3
Jun. 26, 2017
Version: 1.5
GPLB38C
1024 DOTS LCD CONTROLLER
WITH 512KB ROM
1. GENERAL DESCRIPTION
─ Two 16-bit reloadable timer/counters
─ 2-channel PWM audio outputs
─ Watchdog Timer for reliable operation
Wide operating voltage range:
─ 2.4V – 5.5V
GPLB38C, an 8-bit CMOS microprocessor for LCD handheld
application, contains 1216 bytes working RAM, 512K bytes ROM,
12 I/Os, interrupt/wakeup controller, and automatic display
controller/driver for LCD. It also features one PWM driver with
two audio channels to produce attractive sound effects easily. Its
large ROM area allows user to store both program and audio data
in one place. In addition, a SLEEP (power-down) function is
featured to extend battery life.
Built-in regulator
─ Internal built-in regulator to supply core power (3.3V, for
3-battery application). Also, it can turn off internal built-in
regulator, and use external 3.6V power to supply core power (for
2-battery application.)
2. FEATURES
3. BLOCK DIAGRAM
Built-in 8-bit processor
32KHz
─ 1216 bytes SRAM
ROSC32
─ 512K bytes ROM
─ Max. operating speed: 8.0MHz @ 2.4V – 5.5V
─ Programmable CPU clock: /1, /2, /4, /8, /16, /32, /64 of
ROSC Frequency.
Internal RC-Oscillator
System Clock Gen.
32 KHz
Oscillator
&
AUDA
AUDB
PWM Driver
Time base
Power Supply
Voltage Detect
─ 5 wake-up sources
Two 16-bit /
Auto-reload
Timers
─ 5 interrupt sources
512K bytes
ROM
Key scan function
(I/O)
PA[7:0]
─ SEG[15:0] can be used to send key scan output
Programmable LCD driver
8
4
Max.12
I/O Ports
8-bit
1216 bytes
RAM
PC[7:4]
micro-processor
─ 64 segments, 16 commons, maximum 1024 dots
─ 1/5 bias, 1/16 duty capability
LCD RAM 128 bytes
─ 128 bytes dedicated LCD RAM
─ Built-in voltage regulator to generate VLCD for LCD driver
─ 26-level contrast control (2.98V - 5.75V)
Power saving SLEEP mode
16 Commons X 64 Segments LCD Driver
COM[15:0]
SEG[63:0]
Low Voltage Detector
─ 6-level 2.9V - 2.4V detection
Low power consumption:
4. APPLICATION FIELD
Handheld game
─ 1.2mA typical @ 3.0V, FCPU = 2.0MHz, FOSC = 8.0MHz
─ 30uA typical halt current @ 3.0V
─ <1uA typical standby current @ 3.0V
─ Watchdog timer for reliable operation
Peripherals
Scientific calculator
Talking calculator, Talking clock
Talking instrument controller
General speech synthesizer
Data bank
─ Dedicated I/Os: PA[0:7], PC[4:7]
─ 32.768KHz oscillator circuit for RTC
─ Internal RC-oscillator (no resistor needed)
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Version: 1.5
GPLB38C
5. SIGNAL DESCRIPTIONS
Total: 107pins
Mnemonic
SEG63 - 0
PIN No.
Type
Description
1~19,63~107
20~35
O
O
LCD driver segment output.
LCD driver common output.
COM15 - 0
PA7 - 0
45~52
I/O
Port A is a bi-directional I/O port, which can be software programmed as
wakeup I/O.
PC7 - 4
RESETB
AUDA, AUDB
X32I
41~44
56
I/O
I
Port C is a bi-directional I/O port
System reset input, low active.
PWM audio output.
36,39
55
O
I
32.768KHz crystal input or connect to VREG through a resistor (option).
32.768KHz crystal output.
X32O
54
O
I
TESTP
CUP2 - 1
V2X
53
Test input, high active.
59,60
61
P
P
P
P
P
P
P
P
LCD voltage generation. Charge pump capacitor inter-connection pins.
Pump 2X output.
VLCD
62
LCD voltage generation.
VDD
58
Power supply voltage input.
VSS
40
Ground reference.
PVDD
PVSS
37
PWM driver power.
38
PWM driver ground reference.
Regulator out pin
VREG
57
Legend: I = Input, O = Output, P = Power
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Jun. 26, 2017
Version: 1.5
GPLB38C
5.1. PAD Assignment
Note1: To ensure that the IC functions properly, please bond all of VDD and VSS pins.
Note2: The 0.1F capacitor between VDD and VSS should be placed to IC as close as possible.
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Version: 1.5
GPLB38C
6. FUNCTIONAL DESCRIPTIONS
6.1. Memories
GPLB38C contains 512K-byte ROM and 1216-byte SRAM.
6.2. Map of Memory and I/Os
CPU View
ROM View
*NMI SOURCE:
─ LV DETECT
0H
0L
1H
$00000 - $03FFF
$04000 - $07FFF
$08000 - $0BFFF
$0C000 - $0FFFF
$10000 - $13FFF
$14000 - $17FFF
I/O &
Reg.
0
$0000-$003F
─ TIMER1
$0040-$04FF
RAM
1
2
*INT SOURCE:
1L
─ EXT INT
DPRAM
$3E00-$3FFF
2H
2L
─ TBL (2/4/8/16Hz)
─ TBH (128/256/512/1KHz)
ROM
─ TIMER0
$4000-$7FFF
(Bank)L
─ TIMER1
. . .
16
ROM
$78000 - $7BFFF
$7C000 - $7FFFF
$8000-$BFFF
15H
15L
(Bank)H
15
ROM
$C000-$FFF9
$FFFA-$FFFF
0L
Bank Address: $0
$C000-$FFFF always mapping into 0L
Interrupt
Note1: User program should start from $C800. $C000-$C7FF is the test program area.
Note2: User program interrupt vector: $FFFA ~ $FFFF
Note3: Test program interrupt vector: $FFF2 ~ $FFF7
6.3. Operation Modes
6.5. Standby Mode
There are three operation modes involved in GPLB38C: standby,
halt and operating. The following table shows the differences
among these modes.
The standby mode is a mode where the device is placed in its
lowest current consumption state. In standby mode, all functions
are turned off; in addition, RAM and I/Os will remain in their
previous states.
Operating
ON
Halt
OFF
Standby
OFF
6.6. Halt Mode
CPU
In halt mode, CPU clock halts and waits for an event (key press,
timer overflow) to wake up. The 32768Hz related functions, such
as timer/counter and LCD driver, may remain active in the halt
mode.
32768Hz oscillator
LCD driver
ON
ON
OFF
ON
ON/OFF
OFF
6.4. Operating Mode
In operating state, all functions (CPU, 32768Hz oscillator,
timer/counter, LCD driver…) are activated. Generally speaking,
this mode consumes the highest power.
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Version: 1.5
GPLB38C
6.10. Audio Output
The following figure is the GPLB38C state diagram:
Internally, the GPLB38C supports PWM audio output. The
GPLB38C has a pair of PWM drivers, supporting two sound
Write $07h to
CPU_Clk_Ctrl register,
32768 oscillator OFF
channels.
Each channel is able to play speech or tone
OPERATING
STANDBY
individually. The PWM drivers can directly drive speaker or
buzzer without buffer or amplification circuit.
Wake-up or user reset
C
P
32
76
Wake-up
Wr
U
_C
i
8
t
e
6.11. Low Voltage Detection
osci
l
k_C
$0
r
7
or
l
l
t
h
at
or
r
l
use
t
The GPLB38C provides a 6-level (software programmable) low
voltage detector to detect a low voltage event. Users can turn on
the low detection to monitor VDD periodically to check if it is lower
than the given value. In addition, if LV NMI is enabled, a NMI will
be issued to notify CPU if power voltage drops below the given
value. Also, the voltage detector will generate a system reset if
power supply voltage drops below 2.3V.
o
eg
O
N
r
i
st
r
ese
er,
t
HALT
GPLB38C State Diagram
6.7. Speech and Melody
6.12. Key Scan Function
For speech synthesis, the GPLB38C provides several timer
interrupts for a precise sampling frequency. The sound data can
be stored into ROM and be played back. Several algorithms are
recommended for high fidelity and good compression of sound
such as PCM and ADPCM.
GPLB38C supports key scan function. The LCD driver will
generate a key strobe signal in the period of every common.
When PA receives this strobe signal, a wake-up is issued. Then,
program can send the key scan signal through SEG [15:0] to
determine the location of the depressed key.
For melody synthesis, the GPLB38C provides a dual tone mode.
Once in the dual tone mode, users only need to program the tone
frequency for each channel by writing to the timer/counter TM0
and TM1, and set the envelope of each channel. The hardware
will toggle the tone wave automatically.
6.13. Watchdog Timer (WDT)
An on-chip watchdog timer is also available in the GPLB38C.
The WDT is designed to recover the system from abnormal
operation. In some cases, if WDT is not cleared for one second,
the WDT will generate a system reset to restart system. If WDT
is enabled, the WDT should be cleared every 0.5 seconds to avoid
accidental reset. The WDT can be cleared through software
programming. Note that the WDT only works when 32768Hz
clock is activated.
6.8. LCD Controller/Driver
The GPLB38C contains
a 1024-dot LCD controller/driver.
Programmers are able to define the LCD configuration by setting
up the LCD Control Register. Once the LCD configuration is
completed, the desired pattern can be displayed by filling the LCD
buffer with proper data. The LCD driver can also operate during
sleep by keeping 32768Hz oscillator running. The LCD driver in
GPLB38C supports 1/16 duty and 1/5 bias.
6.14. Mask Options
6.14.1. 32768Hz oscillator
1). X’TAL
2). R-oscillator
6.14.2. Watchdog timer
6.9. LCD Voltage Generation
1). Enable
The GPLB38C offers a voltage regulator and a charge-pumping
circuit. The voltage regulator provides a reference voltage (V2x)
for the charge-pumping circuit to generate VLCD. Users can get the
desired VLCD by changing the output reference voltage (writing to
register) of the voltage regulator. Enabling the voltage regulator
and charge-pumping circuit gets a stable VLCD that will not be
affected by VDD. The VLCD is adjustable from 2.98V to 5.75V.
2). Disable
6.14.3. Internal oscillator frequency
1). 8MHz
2). 4MHz
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GPLB38C
7. ELECTRICAL SPECIFICATIONS
7.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
Input Voltage Range
Operating Temperature
Storage Temperature
-0.5V to V+ + 0.5V
0℃ to + 60℃
TSTO
-50℃ to + 150℃
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause permanent damage to the device. For normal operational conditions,
see AC/DC Electrical Characteristics.
7.2. DC Characteristics (VDD=3.0V, for 2-battery application, internal regulator disable, TA =25℃)
Limit
Characteristics
Operating Voltage
Symbol
Unit
Test Condition
For 2-battery
Min.
Typ.
Max.
VDD
IOP
2.4
-
3.6
V
FCPU = 2.0MHz @ 3.0V
Operating Current
-
1.2
2.5
mA
FOSC = 8.0MHz, no load
VDD = 3.0V, 32K X’TAL ON, Strobe off
LCD ON, 1/5 bias, VLCD=5.75V, no
LCD panel
Halt Current
IHALT
-
30
60
uA
Standby Current
PWM Driver Current
Input High Level
Input Low Level
Output High Current (I/O)
Output Sink Current (I/O)
Input Pull-Low Resistor
PA
ISTBY
IPWM
VIH
VIL
-
0.6
100
-
1.0
-
uA
mA
V
VDD = 3.0V, all off
VDD = 3.0V, 8 Ohms load
VDD = 3.0V
-
0.7*VDD
0
VDD
0.3*VDD
3.3
-
V
VDD = 3.0V
IOH
2.0
2.6
4.0
mA
mA
VDD = 3.0V, VOH = 2.4V
VDD = 3.0V, VOL = 0.8V
IOL
3.0
5.0
KΩ
KΩ
RPL1
RPL2
90
35
180
70
270
105
VDD=3.0V
VDD=3.0V
PC4~PC7
Input Pull_high Resistor
PA
KΩ
KΩ
RPH1
RPH2
150
45
2.98
-
300
90
-
450
135
5.75
-
VDD=3.0V
PC4~PC7
VDD=3.0V
LCD Driver Voltage (VLCD - VSS)
OSC32K Resistor
CPU Clock
VLCD
V
VDD = 3.0V, no load
FOSC32K=32768Hz@3.0V
FCPU=FOSC/2@2.4V
MΩ
ROSC32K
FCPU
6.2
-
-
8
MHz
7.3. DC Characteristics (VDD=4.5V, for 3-battery application, internal regulator enable, TA =25℃)
Limit
Characteristics
Operating Voltage
Symbol
Unit
Test Condition
For 3-battery
Min.
Typ.
Max.
VDD
IOP
2.7
-
5.5
V
FCPU = 2.0MHz @ 4.5V
FOSC = 8.0MHz, no load
VDD = 4.5V, 32K X’TAL ON,
LCD ON, no LCD panel
VDD = 4.5V, all off
Operating Current
Halt Current
-
-
1.5
40
3.0
80
mA
IHALT
uA
Standby Current
PWM Driver Current
Input High Level
ISTBY
IPWM
VIH
-
3.0
200
-
4.0
-
uA
mA
V
-
VDD = 4.5V, 8 Ohms load
VDD = 4.5V
0.7*VDD
VDD
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GPLB38C
Limit
Typ.
-
Characteristics
Input Low Level
Symbol
Unit
Test Condition
VDD = 4.5V
Min.
0
Max.
0.3*VDD
6.8
VIL
IOH
IOL
V
Output High Current (I/O)
Output Sink Current (I/O)
Input Pull-Low Resistor
PA
4.0
3.6
5.4
4.8
mA
mA
VDD = 4.5V, VOH = 3.6V
VDD = 4.5V, VOL = 0.9V
6.0
KΩ
KΩ
RPL1
RPL2
100
40
200
80
300
120
VDD=4.5V
VDD=4.5V
PC4~PC7
Input Pull_high Resistor
PA
KΩ
KΩ
RPH1
RPH2
90
180
60
-
270
90
VDD=4.5V
PC4~PC7
30
VDD=4.5V
LCD Driver Voltage(VLCD - VSS)
OSC32K Resistor
CPU Clock
VLCD
4.47
5.75
-
V
VDD = 4.5V, no load
FOSC32K=32768Hz@4.5V
FCPU=FOSC/2@2.7V
MΩ
ROSC32K
FCPU
-
6.2
-
-
8
MHz
V
Regulator voltage
Regulator dropout voltage
Regulator Max. output current
Vreg
3.15
3.3
-
3.45
100
30
Vdrop
Imax
-
-
mV
mA
VDD=2.4v, iout=15mA,
VDD = 4.5V
-
Note: VLCD should be higher than VDD to prevent forward biasing the p-n junction of I/O output PMOS.
7.4. The Relationships between the Fosc4M and the VDD
7.6. The Relationships between the Fosc32k and the VDD
7.7. The Relationships between the FCPU and the Iop
7.5. The Relationships between the Fosc8M and the VDD
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GPLB38C
8. APPLICATION CIRCUITS
8.1. 1024 Dots LCD Driver, 64 Segments × 16 Commons, 2-battery application, internal regulator disabled, Xtal 32K
selected (1)
LCD Panel (16x 64)
VDD
VREG
VDD
PVDD
AUDA
AUDB
PVSS
µ
0.1µF 47 F
2.2µF*2
VSS
VLCD
CUP1
20pF*1
GPLB38C
X32I
X32O
0.022µF*2
CUP2
V2X
20 pF*1
*2
0.022µF
RESETB
0.1 µ F
SEG 0
SEG 1
SEG 2
SEG 14
SEG15
....
.
....
.
PA 1
....
.
PA 2
PA 3
....
.
....
.
PA 7
Note*1: These capacitor values are for design guidance only. Different capacitor values may be required for different crystal/resonator used.
Note*2: The LCD pump and VLCD capacitors are suggested using 0.022uF and 2.2uF for small or light loading of LCD panel, and 0.047uF and 2.2uF for large
or heavy loading of LCD panel.
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GPLB38C
8.2. 1024 Dots LCD Driver, 64 Segments × 16 Commons, 3-battery application, internal regulator enabled, Rosc32K
selected (2)
LCD Panel
(16x 64)
VDD
VREG
VDD
PVDD
AUDA
AUDB
PVSS
2.2µF*1
µ
µ
10 F
0.1µF 47 F
VLCD
CUP1
VSS
GPLB38C
X32I
0.022µF*1
0.022µF*1
6.2Mohm
CUP2
V2X
RESETB
0.1 µ F
SEG 0
SEG 1
SEG 2
SEG 14
SEG15
....
.
....
.
PA 1
....
.
PA 2
PA 3
....
.
....
.
PA 7
Note*1: The LCD pump and VLCD capacitor are suggested using 0.022uF and 2.2uF for small or light loading of LCD panel, and 0.047uF and 2.2uF for large
or heavy loading of LCD panel.
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Version: 1.5
GPLB38C
9. PACKAGE INFORMATION
9.1. Ordering Information
Product Number
Package Type
GPLB38C-NnnV-C
Chip form
Note1: Code number is assigned for customer.
Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
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Version: 1.5
GPLB38C
10. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
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Version: 1.5
GPLB38C
11. REVISION HISTORY
Date
Revision #
Description
1. Modified DC characteristics in section 7.2, 7.3.
Page
9
Jun. 26, 2017
Jul 31, 2014
1.5
1.4
2. Add “The Relationships between the FCPU and the Iop” in section7.7.
1. Modified features
10
3
2. Modified DC characteristics
8
DEC. 20, 2013
APR. 7, 2012
1.3
1.2
Modified LCD pump capacitor of Application circuit in section 8.1&8.2;
1.Modified Application circuit in section 8.2；
2.PAD assignment in section 9.1 removed；
10~11
11
12
SEP. 29, 2010
1.1
1.Modified features;
3
2.Add “Vdrop” & “Imax” of Regulator in section7.3;
3.Add relationship waveform of Frequency vs VDD in section 7.4, 7.5 & 7.6;
4.Modified Application circuit in section 8.1 & 8.2
1.Modified features;
8
9
10~11
APR. 28, 2010
1.0
3
4
2.Modified Signal description;
3.Modified Functional description;
4.DC characteristics;
6
7
5. Add “Pad Assignment and Locations” to section 9.1.
Original
10
12
Jul. 8, 2009
0.1
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Proprietary & Confidential
15
Jun. 26, 2017
Version: 1.5
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