SES2V8P8U [GOOD-ARK]

ESD Protector; ESD保护


型号：	SES2V8P8U
厂家：	GOOD-ARK ELECTRONICS
描述：	ESD Protector ESD保护
文件：	总3页 (文件大小：163K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SES*** Series

ESD Protector

SES2V8P8U

ROHS

Description

The SES2V8P8U is in

SOP-8 package and

may be used to protect two high-speed line

pairs. The “flow-thru” design minimizes trace

inductance and reduces voltage overshoot

associated with ESD events. The low clamping

voltage of the SES2V8P8U minimizes the stress

on the protected IC. The component in accordance

to RoHS.

Features

■ꢀ 400 W Peak Pulse Power per Line (t_p=8/20s)

■ꢀ Protects two line pairs(four lines).

■ꢀ Low capacitance

■ꢀ Low Leakage Current

■ꢀ Low Operating and Clamping Voltages.

■

ꢀ

Transient Protection for High Speed Data Lines to

IEC61000-4-2(ESD) 15kV(air), 8kV(Contact)

IEC61000-4-4(EFT) 40A(5/50ns)

IEC61000-4-5(lightning) 24A(8/20us)

Applications

■ꢀAudio/Video Input

■ꢀ Personal Digital Assistant(PDA)

■ꢀ Ethernet – 10/100/1000 Base T

■ꢀ WAN/LAN Equipment

■

ꢀDesktops, Servers, Notebooks & Handhelds, base stations Laser Diode Protection

Electrical Parameters

minimum

V_BR(V)

@ I_T=1mA

minimum

V_SB(V)

maximum

V_C(V)

@I_P= 2A

maximum

V_C(V)

maximum

Typical

Part

V_RWM

(V)

I_D(µA)

C_O(pF)

@0V,1MHZ

Number *

@I_SB= 50mA

@I_pp=24 A

@ V_RWM

SES2V8P8U

2.8

3.0

2.8

6.5

1.0

3.5

Thermal Consideration

Package

Symbol

T_J

Parameter

Value

-55 to +150

400

Unit

°C

SOP-8

Operating Junction Temperature

Storage Temperature Range

T_S

°C

P_PK

Peak Pulse Power (tp = 8/20μs)

ESD Protector

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SES**** Series

ESD Protector

SES2V8P8U

ROHS

Typical Characteristics

Fig1. Pulse Waveform

Fig2. Power Derating Curve

Fig3 Forward Voltage vs.

Forward Current

Application Note:

Electronic equipment is susceptible to damage caused by Electrostatic Discharge (ESD), Electrical Fast

Transients (EFT), and tertiary lightning effects. Knowing that equipment can be damaged, the SES2V8P8U

was designed to provide the level of protection required to safe guard sensitive equipment. This product can

be used in different configurations to provide a level of protection to meet unidirectional line requirements as

well as bidirectional requirements either in a common-mode or differential-mode configuration.

ESD Protector

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SES**** Series

ESD Protector

SES2V8P8U

ROHS

Configuration Diagram

Unidirectional Common-Mode Protection (Figure 5)

The SES2V8P8U provides up to four lines of protection in

a common-mode configuration as depicted in figure 5.

Circuit connectivity is as follows:

Line 1 is connected to Pin 1

Line 2 is connected to Pin 7

Line 3 is connected to Pin 3

Line 4 is connected to Pin 5

Pins 2, 4, 7 and 8 are connected to ground

Extermal diode to ground is a low capacitance

diode of less than 10PF

Fig5.

Bidirectional Common-Mode Protection (Figure 6)

The SES2V8P8U provides up to two lines of protection in

a common-mode configuration as depicted in figure 6.

Circuit connectivity is as follows:

Line 1 is connected to Pins 1 & 8

Line 2 is connected to Pins 4 & 5

Pins 2, 3, 6, and 7 are connected to ground

Fig6.

Bidirectional differential-Mode Protection (Figure 7)

The SES2V8P8U provides up to two-line pairs of protectio

in a differential-mode configuration as depicted in figure 7.

Circuit connectivity is as follows:

Line Pair 1 is connected to Pins 1 & 2

Line Pair 1 is connected to Pins 7 & 8

Line Pair 2 is connected to Pins 3 & 4

Line Pair 2 is connected to Pins 5 & 6

Fig7.

Circuit Board Layout Protection

Circuit board layout is critical for Electromagnetic Compatibility (EMC) protection. The following guidelines are

recommended:

The protection device should be placed near the input terminals or connectors, the device will divert the

transient current immediately before it can be coupled into the nearby traces.

The path length between the TVS device and the protected line should be minimized.

All conductive loops including power and ground loops should be minimized.

The transient current return path to ground should be kept as short as possible to reduce parasitic

inductance.

Ground planes should be used whenever possible. For multilayer PCBs, use ground vias.

ESD Protector

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