GLS37VF010 [GREENLIANT]
Many-Time Programmable Flash;
| 型号： | GLS37VF010 |
| 厂家： | 
Greenliant |
| 描述： | Many-Time Programmable Flash |
| 文件： | 总17页 (文件大小：612K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1 Mbit / 2 Mbit / 4 Mbitsn(x8)
Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
GLS37VF512 / 010 / 020 / 0402.7V-Read 512Kb / 1Mb / 2Mb / 4Mb (x8) MTP flash memories
Data Sheet
FEATURES:
•
•
•
Organized as 128K x8 / 256K x8 / 512K x8
2.7-3.6V Read Operation
•
Fast Byte-Program Operation:
– Byte-Program Time: 15 µs (typical)
– Chip Program Time:
Superior Reliability
2 seconds (typical) for GLS37VF010
4 seconds (typical) for GLS37VF020
8 seconds (typical) for GLS37VF040
– Endurance: At least 1000 Cycles
– Greater than 100 years Data Retention
•
Low Power Consumption:
•
Electrical Erase Using Programmer
– Active Current: 10 mA (typical)
– Standby Current: 2 µA (typical)
– Does not require UV source
– Chip-Erase Time: 100 ms (typical)
•
•
Fast Read Access Time:
– 70 ns
•
•
CMOS I/O Compatibility
JEDEC Standard Byte-wide Flash
EEPROM Pinouts
Latched Address and Data
•
Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
– 32-pin PDIP
– Non-Pb (lead-free) packages available
PRODUCT DESCRIPTION
The GLS37VF010/020/040 devices are 128K x8 / 256K x8
/ 512K x8 CMOS, Many-Time Programmable (MTP), low
cost flash, manufactured with high performance Super-
Flash technology. The split-gate cell design and thick-oxide
tunneling injector attain better reliability and manufacturabil-
ity compared with alternate approaches. The
GLS37VF010/020/040 can be electrically erased and pro-
grammed at least 1000 times using an external program-
mer, e.g., to change the contents of devices in inventory.
The GLS37VF010/020/040 have to be erased prior to pro-
gramming. These devices conform to JEDEC standard
pinouts for byte-wide flash memories.
To meet surface mount and conventional through hole
requirements, the GLS37VF010/020/040 are offered in 32-
lead PLCC, 32-lead TSOP, and 32-pin PDIP packages.
See Figures 2, 3, and 4 for pin assignments.
Device Operation
The GLS37VF010/020/040 devices are nonvolatile mem-
ory solutions that can be used instead of standard flash
devices if in-system programmability is not required. It is
functionally (Read) and pin compatible with industry stan-
dard flash products.The device supports electrical Erase
operation via an external programmer.
Featuring high performance Byte-Program, the
GLS37VF010/020/040 provide a typical Byte-Program
time of 15 µs. Designed, manufactured, and tested for a
wide spectrum of applications, these devices are offered
with an endurance of at least 1000 cycles. Data retention is
rated at greater than 100 years.
Read
The Read operation of the GLS37VF010/020/040 is con-
trolled by CE# and OE#. Both CE# and OE# have to be
low for the system to obtain data from the outputs. Once
the address is stable, the address access time is equal to
the delay from CE# to output (TCE). Data is available at the
output after a delay of TOE from the falling edge of OE#,
assuming the CE# pin has been low and the addresses
have been stable for at least TCE-TOE. When the CE# pin is
high, the chip is deselected and a standby current of only 2
µA (typical) is consumed. OE# is the output control and is
The GLS37VF010/020/040 are suited for applications that
require infrequent writes and low power nonvolatile stor-
age. These devices will improve flexibility, efficiency, and
performance while matching the low cost in nonvolatile
applications that currently use UV-EPROMs, OTPs, and
mask ROMs.
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
www.greenliant.com
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
used to gate data from the output pins. The data bus is in
high impedance state when either CE# or OE# is VIH.
Refer to Figure 5 for the timing diagram.
Product Identification Mode
The Product Identification mode identifies the devices as
GLS37VF010, GLS37VF020, and GLS37VF040 and man-
ufacturer as Greenliant. This mode may be accessed by
the hardware method. To activate this mode, the program-
ming equipment must force VH (11.4-12V) on address A9.
Two identifier bytes may then be sequenced from the
device outputs by toggling address line A0. For details, see
Table 3 for hardware operation.
Byte-Program Operation
The GLS37VF010/020/040 are programmed by using an
external programmer. The programming mode is activated
by asserting 11.4-12V on OE# pin and VIL on CE# pin. The
device is programmed using a single pulse (WE# pin low)
of 15 µs per byte. Using the MTP programming algorithm,
the Byte-Program process continues byte-by-byte until the
entire chip has been programmed. Refer to Figure 11 for
the flowchart and Figure 7 for the timing diagram.
TABLE 1: Product Identification
Address
Data
Manufacturer’s ID
Device ID
0000H
BFH
Chip-Erase Operation
GLS37VF010
GLS37VF020
GLS37VF040
0001H
0001H
0001H
C5H
C6H
C2H
The only way to change a data from a “0” to “1” is by
electrical erase that changes every bit in the device to
“1”. The GLS37VF010/020/040 use an electrical Chip-
Erase operation. The entire chip can be erased in 100
ms (WE# pin low). In order to activate erase mode, the
11.4-12V is applied to OE# and A9 pins while CE# is
low. All other address and data pins are “don’t care”.
The falling edge of WE# will start the Chip-Erase oper-
ation. Once the chip has been erased, all bytes must
be verified for FFH. Refer to Figure 10 for the flowchart
and Figure 6 for the timing diagram.
T1.2 1151
Design Considerations
The GLS37VF010/020/040 should have a 0.1 µF ceramic
high frequency, low inductance capacitor connected
between VDD and GND. This capacitor should be placed
as close to the package terminals as possible.
OE# and A9 must remain stable at VH for the entire dura-
tion of an Erase operation. OE# must remain stable at VH
for the entire duration of the Program operation.
SuperFlash
Memory
X-Decoder
Memory Address
Address Buffer
Y-Decoder
I/O Buffers
CE#
OE#
Control Logic
A
9
WE#
DQ - DQ
7
0
1151 B1.1
FIGURE 1: Functional Block Diagram
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
2
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
GLS37VF040 GLS37VF020 GLS37VF010
GLS37VF010 GLS37VF020 GLS37VF040
4
3
2
1
32 31 30
5
29
28
27
26
25
24
23
22
21
A7
A6
A7
A6
A7
A6
A14
A13
A8
A14
A13
A8
A14
A13
A8
6
7
A5
A5
A5
8
A4
A4
A4
A9
A9
A9
32-lead PLCC
To p Vi ew
9
A3
A3
A3
A11
OE#
A10
CE#
DQ7
A11
OE#
A10
CE#
DQ7
A11
OE#
A10
CE#
DQ7
10
11
12
13
A2
A2
A2
A1
A1
A1
A0
A0
A0
DQ0
DQ0
DQ0
14 15 16 17 18 19 20
1151 32-plcc P02a.4
FIGURE 2: Pin Assignments for 32-lead PLCC
GLS37VF040 GLS37VF020 GLS37VF010
GLS37VF010 GLS37VF020 GLS37VF040
A11
A9
A11
A9
A11
A9
OE#
A10
OE#
A10
OE#
A10
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
2
A8
A8
A8
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
3
A13
A14
A17
WE#
A13
A14
A17
WE#
A13
A14
NC
4
5
St an d ard Pi n o u t
To p Vi ew
6
WE#
7
V
V
V
8
DD
DD
DD
A18
A16
A15
A12
A7
NC
A16
A15
A12
A7
NC
A16
A15
A12
A7
V
V
V
9
SS
SS
SS
DQ2
DQ1
DQ0
A0
DQ2
DQ1
DQ0
A0
DQ2
DQ1
DQ0
A0
10
11
12
13
14
15
16
A6
A6
A6
A1
A1
A1
A5
A5
A5
A2
A2
A2
A4
A4
A4
A3
A3
A3
1151 32-tsop P01.
FIGURE 3: Pin Assignments for 32-lead TSOP (8mm x 14mm)
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
3
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
GLS37VF040 GLS37VF020 GLS37VF010
GLS37VF010 GLS37VF020 GLS37VF040
A18
A16
A15
A12
A7
NC
A16
A15
A12
A7
NC
A16
A15
A12
A7
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
V
V
DD
DD
DD
2
WE#
NC
WE#
A17
A14
A13
A8
WE#
A17
A14
A13
A8
3
4
A14
A13
A8
5
32-pin
PDIP
A6
A6
A6
6
A5
A5
A5
7
A9
A9
A9
A4
A4
A4
8
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
To p Vi ew
A3
A3
A3
9
A2
A2
A2
10
11
12
13
14
15
16
A1
A1
A1
A0
A0
A0
DQ0
DQ1
DQ2
DQ0
DQ1
DQ2
DQ0
DQ1
DQ2
V
SS
V
SS
V
SS
1151 32-pdip P02.b2
FIGURE 4: Pin Assignments for 32-pin PDIP
TABLE 2: Pin Description
Symbol
AMS1-A0
DQ7-DQ0
Pin Name
Functions
To provide memory addresses.
Address Inputs
Data Input/output
To output data during Read cycles and receive input data during Program cycles.
The outputs are in tri-state when OE# or CE# is high.
CE#
WE#
OE#
VDD
VSS
NC
Chip Enable
Write Enable
Output Enable
Power Supply
Ground
To activate the device when CE# is low.
To program or erase (WE# = VIL pulse during Program or Erase)
To gate the data output buffers during Read operation when low
To provide 3.0V supply (2.7-3.6V)
No Connection
Unconnected pins.
T2.1 1151
1. AMS = Most significant address
MS = A16 for GLS37VF010, A17 for GLS37VF020, and A18 for GLS37VF040
A
TABLE 3: Operation Modes Selection
Mode
CE#
VIL
VIL
VIH
VIL
VIL
X
WE#
VIH
X
A9
AIN
X
OE#
DQ
Address
Read
VIL
DOUT
AIN
AIN
X
Output Disable
Standby
VIH
High Z
High Z
High Z
DIN
X
X
X
VH
Chip-Erase
Byte-Program
Program/Erase Inhibit
VIL
VIL
VIH
X
VH
AIN
X
X
VH
AIN
X
X
High Z
High Z/ DOUT
X
X
VIL or VIH
VIL
X
Product Identification
VIL
VIH
VH
Manufacturer’s ID (BFH)
Device ID1
AMS2 - A1=VIL, A0=VIL
AMS2 - A1=VIL, A0=VIH
T3.2 1151
1. Device ID = C5H for GLS37VF020, C6H for GLS37VF020, and C2H for GLS37VF040
2. AMS = Most significant address
A
MS = A16 for GLS37VF010, A17 for GLS37VF020, and A18 for GLS37VF040
Note: X = VIL or VIH (or VH in case of OE# and A9)
H = 11.4-12V
V
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
4
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum
Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these conditions or conditions greater than those defined in the operational sections of this data
sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to VDD+0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-2.0V to VDD+2.0V
Voltage on A9 Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 13.2V
Package Power Dissipation Capability (TA = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Through Hole Lead Soldering Temperature (10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Surface Mount Solder Reflow Temperature: . . . . . . . . . . . . . . . . . . . . . . . . . “with-Pb” units1: 240°C for 3 seconds
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . “non-Pb” units: 260°C for 3 seconds
Output Short Circuit Current2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
1. Certain “with-Pb” package types are capable of 260°C for 3 seconds; please consult the factory for the latest information.
2. Outputs shorted for no more than one second. No more than one output shorted at a time.
OPERATING RANGE
AC CONDITIONS OF TEST
Input Rise/Fall Time . . . . . . . . . . . . . . . 5 ns
Output Load . . . . . . . . . . . . . . . . . . . . . CL = 100 pF
See Figures 8 and 9
Range
Ambient Temp
VDD
Commercial
0°C to +70°C
2.7-3.6V
TABLE 4: Read Mode DC Operating Characteristics VDD=2.7-3.6V (TA = 0°C to +70°C (Commercial))
Limits
Symbol
Parameter
Min
Max
Units Test Conditions
Address input=VILT/VIHT, at f=1/TRC Min
IDD
VDD Read Current
VDD=VDD Max
12
15
1
mA
µA
µA
µA
V
CE#=VIL, OE#=VIHT, all I/Os open
CE#=VIHC, VDD=VDD Max
VIN=GND to VDD, VDD=VDD Max
VOUT=GND to VDD, VDD=VDD Max
VDD=VDD Min
ISB
ILI
Standby VDD Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
ILO
VIL
VIH
VIHC
VOL
VOH
IH
10
0.8
Input High Voltage
0.7 VDD
VDD-0.3
V
VDD=VDD Max
Input High Voltage (CMOS)
Output Low Voltage
V
VDD=VDD Max
0.2
V
IOL=100 µA, VDD=VDD Min
IOH=-100 µA, VDD=VDD Min
CE#=OE#=VIL, A9=VH Max
Output High Voltage
Supervoltage Current for A9
VDD-0.3
V
200
µA
T4.6 1151
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
5
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
TABLE 5: Program/Erase DC Operating Characteristics VDD=2.7-3.6V (TA = 25°C±5°C)
Limits
Symbol Parameter
IDD VDD Erase or Program Current
ILI
Min
Max
20
Units Test Conditions
mA
µA
µA
V
CE#=VIL, OE#=VH, VDD=VDD Max, WE#=VIL
Input Leakage Current
1
VIN=GND to VDD, VDD=VDD Max
VOUT=GND to VDD, VDD=VDD Max
ILO
VH
IHA9
Output Leakage Current
Supervoltage for A9 and OE#
Supervoltage Current for A9
10
11.4
12
200
µA
OE#=VH Max, A9=VH Max,
VDD=VDD Max, CE# = VIL
IHOE#
Supervoltage Current for OE#
3
mA
CE#=VIL, OE#=11.4-12V,
VDD=VDD Max, WE#=VIL
T5.2 1151
TABLE 6: Recommended System Power-up Timings
Symbol
Parameter
Minimum
100
Units
1
TPU-READ
Power-up to Read Operation
Power-up to Write Operation
µs
µs
1
TPU-WRITE
100
T6.1 1151
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 7: Capacitance (TA = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
VI/O = 0V
Maximum
1
CI/O
I/O Pin Capacitance
Input Capacitance
12 pF
6 pF
1
CIN
VIN = 0V
T7.0 1151
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 8: Reliability Characteristics
Symbol
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
Units
Test Method
1
NEND
10,000
100
Cycles JEDEC Standard A117
1
TDR
Years
mA
JEDEC Standard A103
JEDEC Standard 78
1
ILTH
100 + IDD
T8.3 1151
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
6
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
AC CHARACTERISTICS
TABLE 9: Read Cycle Timing Parameters VDD = 2.7-3.6V (TA = 0°C to +70°C (Commercial))
GLS37VF010-70
GLS37VF020-70
GLS37VF040-70
Symbol
TRC
Parameter
Min
Max
Units
ns
Read Cycle Time
70
TCE
Chip Enable Access Time
Address Access Time
70
70
35
ns
TAA
ns
TOE
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
ns
1
TCLZ
0
0
ns
1
TOLZ
ns
1
TCHZ
25
25
ns
1
TOHZ
ns
1
TOH
0
ns
T9.3 1151
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 10: Program/Erase Cycle Timing Parameters VDD = 2.7-3.6V (TA = 25°C±5°C)
Symbol
TBP
Parameter
Min
Max
Units
µs
µs
µs
µs
µs
µs
µs
ns
Byte-Program Time
20
TCES
TCEH
TAS
CE# Setup Time
1
1
CE# Hold Time
Address Setup Time
1
TAH
Address Hold Time
1
TDS
Data Setup Time
1
TDH
Data Hold Time
1
TPRT
TVPS
TVPH
TPW
TEW
TVR
OE# Rise Time for Program and Erase
OE# Setup Time for Program and Erase
OE# Hold Time for Program and Erase
WE# Program Pulse Width
WE# Erase Pulse Width
OE#/A9 Recovery Time for Erase
A9 Rise Time to 12V during Erase
A9 Setup Time during Erase
A9 Hold Time during Erase
50
1
µs
µs
µs
ms
µs
ns
1
15
100
1
25
200
TART
TA9S
TA9H
50
1
µs
µs
1
T10.1 1151
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
7
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
T
T
AA
RC
ADDRESS
T
CE
CE#
OE#
WE#
T
OE
T
T
OHZ
V
OLZ
IH
T
CHZ
T
OH
T
HIGH-Z
CLZ
HIGH-Z
DQ
7-0
DATA VALID
DATA VALID
1151 F03.0
FIGURE 5: Read Cycle Timing Diagram
ADDRESS
(EXCEPT A )
9
CE#
T
CEH
DQ
7-0
V
H
T
T
VPS
V
V
DD
T
VPH
OE#
T
SS
PRT
V
T
H
VR
A9S
A
9
V
IH
V
IL
T
ART
T
A9H
T
EW
WE#
T
CES
1151 F04.0
FIGURE 6: Chip-Erase Timing Diagram
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
8
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
T
PC
ADDRESS
CE#
ADDRESS VALID
T
T
AH
T
AS
T
CEH
T
DS
DH
DATA VALID
DQ
7-0
HIGH-Z
V
H
T
VPS
T
V
V
PRT
DD
T
PW
OE#
SS
T
VPH
WE#
T
CES
1151 F05.0
FIGURE 7: Byte-Program Timing Diagram
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
9
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
V
IHT
V
V
INPUT
REFERENCE POINTS
OUTPUT
OT
IT
V
ILT
1151 F06.1
AC test inputs are driven at VIHT (0.9 VDD) for a logic “1” and VILT (0.1 VDD) for a logic “0”. Measurement reference points
for inputs and outputs are VIT (0.5 V) and VOT (0.5 VDD). Input rise and fall times (10% 90%) are <5 ns.
Note: VIT - VINPUT Test
V
V
V
OT - VOUTPUT Test
IHT - VINPUT HIGH Test
ILT - VINPUT LOW Test
FIGURE 8: AC Input/Output Reference Waveforms
TO TESTER
TO DUT
C
L
1151 F07.1
FIGURE 9: A Test Load Example
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
10
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
Start
A
= V , OE# = V
H H
9
CE# = V
IL
Erase 100ms pulse
(WE# = V
)
IL
WE# = V
IH
OE#/A = V or V
IL
9
IH
Wait T
Recovery Time
VR
Read Device
No
Compare all
bytes to FF
Yes
Device Passed
Device Failed
1151 F08.0
FIGURE 10: Chip-Erase Algorithm
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
11
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
Start
Erase*
OE# = V
H
Address = First Location;
Load Data
CE# = V
IL
Program 15 µs pulse
(WE# = V
)
IL
Increment Address
Last Address?
OE# = V
IL
No
Yes
Wait T
VR
Read Device
No
Compare all bytes
to original data
Yes
Device Passed
Device Failed
1151 F09.2
*See Figure 10
FIGURE 11: Byte-Program Algorithm
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
12
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
PRODUCT ORDERING INFORMATION
GLS 37 VF
040
-
70
-
3C
-
NH
E
XX XX XXXX - XXX
-
XX - XXX
X
Environmental Attribute
E1 = non-Pb
Package Modifier
H = 32 pins or leads
Package Type
N = PLCC
P = PDIP
W = TSOP (type 1, die up, 8mm x 14mm)
Operating Temperature
C = Commercial = 0° to +70°C
Minimum Endurance
3 = 1,000 cycles
Read Access Speed
70 = 70 ns
Device Density
040 = 4 Mbit
020 = 2 Mbit
010 = 1 Mbit
Voltage
V = 2.7-3.6V
Product Series
37 = Many-Time Programmable Flash
Flash memories with flash pinout
1. Environmental suffix “E” denotes non-Pb solder.
Greenliant non-Pb solder devices are “RoHS Compli-
ant”.
Valid combinations for GLS37VF010
GLS37VF010-70-3C-NHE GLS37VF010-70-3C-WHE GLS37VF010-70-3C-PHE
Valid combinations for GLS37VF020
GLS37VF020-70-3C-NHE GLS37VF020-70-3C-WHE GLS37VF020-70-3C-PHE
Valid combinations for GLS37VF040
GLS37VF040-70-3C-NHE GLS37VF040-70-3C-WHE GLS37VF040-70-3C-PHE
Note: Valid combinations are those products in mass production or will be in mass production. Consult your Greenliant sales
representative to confirm availability of valid combinations and to determine availability of new combinations.
* Not recommended for new designs.
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
13
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
PACKAGING DIAGRAMS
TOP VIEW
SIDE VIEW
BOTTOM VIEW
.495
.485
.453
.447
.112
.106
Optional
Pin #1
Identifier
.048
.042
.029
.023
.040
.030
.020 R.
MAX.
x 30˚
R.
2
1
32
.042
.048
.021
.013
.400
BSC
.530
.490
.595 .553
.585 .547
.032
.026
.050
BSC
.015 Min.
.095
.075
.050
BSC
.032
.026
.140
.125
Note: 1. Complies with JEDEC publication 95 MS-016 AE dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in inches (max/min).
3. Dimensions do not include mold flash. Maximum allowable mold flash is .008 inches.
4. Coplanarity: 4 mils.
32-plcc-NH-3
FIGURE 12: 32-lead Plastic Lead Chip Carrier (PLCC)
Greenliant Package Code: NH
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
14
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
1.05
0.95
Pin # 1 Identifier
0.50
BSC
8.10
7.90
0.27
0.17
0.15
0.05
12.50
12.30
DETAIL
1.20
max.
0.70
0.50
14.20
13.80
0˚- 5˚
0.70
0.50
Note: 1. Complies with JEDEC publication 95 MO-142 BA dimensions,
although some dimensions may be more stringent.
2. All linear dimensions are in millimeters (max/min).
3. Coplanarity: 0.1 mm
32-tsop-WH-7
1mm
4. Maximum allowable mold flash is 0.15 mm at the package ends, and 0.25 mm between leads.
FIGURE 13: 32-lead Thin Small Outline Package (TSOP) 8mm x 14mm
Greenliant Package Code: WH
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
15
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
32
C
L
1
Pin #1 Identifier
.625
.600
.550
.530
1.655
1.645
.075
.065
7˚
4 PLCS.
Base
Plane
.200
.170
Seating
Plane
.050
.015
0˚
15˚
.012
.008
.150
.120
.100 BSC
.022
.016
.080
.070
.600 BSC
.065
.045
Note: 1. Complies with JEDEC publication 95 MO-015 AP dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in inches (max/min).
3. Dimensions do not include mold flash. Maximum allowable mold flash is .010 inches.
32-pdip-PH-3
FIGURE 14: 32-pin Plastic Dual In-line Pins (PDIP)
Greenliant Package Code: PH
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
16
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
TABLE 11: Revision History
Number
02
Description
Date
Feb 2002
Mar 2003
•
•
•
2002 Data Book
03
Part number changes - see page 13 for additional information
Clarified the Test Conditions for VDD Read Current parameter in Table 4 on page 5
– Address input = VILT/VIHT
– CE#=OE#=VILT
04
05
Nov 2003
May 2004
•
•
•
•
•
•
•
•
•
2004 Data Book
Added non-Pb MPNs and removed footnote (See page 13)
Removed 90 ns parts, related footnote, and MPNs (See page 13)
Added 70 ns parts and MPNs for the PH package
Changed Byte-Program time from 10 µs to 15 µs
Updated chip program times
Separated Supervoltage Current for A9 and OE# in Table 5 on page 6
Added non-Pb 32-PDIP MPNs for 1, 2, and 4 Mbit devices
06
Dec 2004
Clarified the solder temperature profile under “Absolute Maximum Stress Ratings” on
page 5
07
08
Aug 2006
Apr 2007
•
•
•
•
•
•
Changed program voltage from 12.6V to 12V globally
EOLed all valid combinations of SST37VF512, See S71151(03).
Removed 64K x 8 organization and leaded parts
File name correction
09
10
11
Apr 2008
May 2008
May 2010
Fixed mistake in document status by removing “EOL”
Transferred from SST to Greenliant
© 2010 Greenliant Systems, Ltd. All rights reserved.
Greenliant, the Greenliant logo and NANDrive are trademarks of Greenliant Systems, Ltd.
All trademarks and registered trademarks are the property of their respective owners.
These specifications are subject to change without notice.
MTP is a trademark and SuperFlash is a registered trademark of Silicon Storage Technology, Inc., a wholly owned subsidiary of
Microchip Technology Inc.
©2010 Greenliant Systems, Ltd.
S71151-11-000
05/10
17
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